Semiconductor Device Modeling and Fabrication

Course Code: EC 5102/EC 4137

Lab Code: EC 5106

Dr. Ramakant Yadav

[email protected]
Assistant Professor
Department of Electrical and Computer Engineering
École Centrale School of Engineering
Mahindra University, Hyderabad

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 Instructors Brief Introduction

Professional Experience (more than 11 yrs)

▪ Assistant Professor, Electrical and Electronics Engineering, École Centrale School of
Engineering, Mahindra University, Hyderabad, India. [June 2022 onwards]
▪ Assistant Professor, Electrical and Electronics Engineering, BITS-Pilani, Hyderabad
Campus, Hyderabad, India. [Feb 2016 – June 2022]
▪ Lecturer, Electronics and Communication Engineering, Rajiv Gandhi University of
Knowledge Technologies, IIIT R K Valley, Andhra Pradesh. [July 2012 – Jan 2016]

Research Areas:
Semiconductor Device Modeling, FinFETs, Nanosheet FETs, NC-FETs, and Low Power
digital and ternary circuits.
❑ Published 16 research articles (10 Intern. Journals + 3 International Conferences +
4 Book chapters). One Indian Patent filed.
https://www.mahindrauniversity.edu.in/dr-ramakant
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 Administrative Matters

◼ Course Code: EC 5102/EC 4137 and EC 5106, L T P C (3-0-2 3)

◼ Instructor: Dr. Ramakant Yadav
◼ E-mail: [email protected]
◼ Office: Faculty office, IT Block 2, next to Synopsys VLSI Lab
◼ Students’ Contact Hour: Friday 11.35 – 12.35 PM

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 Semiconductor Device Modelling Lab

• Synopsys Sentaurus TCAD Simulation Tool

• TA: Sujaya Grace Ch, PhD student

• Email: [email protected]

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 Things to Remember
• Lecture slides and Lab materials will be uploaded on OneDrive in PDF
format.

• OneDrive link of Lecture slides and Lab materials will be shared via email.

• Keep your mobiles Switched off or in Silent mode.

• Lectures: Mon (3:35 – 4:30 PM), Tue (3:35 – 4:30 PM), Thu (12:35 – 1:30 PM)

• Lab: Fri (3:35 – 5:30 PM)

• Students’ Contact Hour: Friday 11.35 – 12.35 AM

• Email: [email protected]

August 22, 2024 5

 Why learn this subject?
• VLSI design is a very important aspect of the electronic industry; mostly, all the
electronic items that we use in our day-to-day life, like LCD monitors, TV,
smartphones, and laptops, are designed using Integrated Circuits.
• Semiconductor devices are at the heart of the present technological
revolution, and they are increasingly prominent in our daily life.
• India is taking considerable steps to expand the electronic manufacturing sector.
• India’s own consumption of semiconductors is expected to cross $80 billion by
2026.
• So, the demand for VLSI-qualified professionals is increasing as the design and
production industries increase.
➢ Scope of Placements:
Intel, Qualcomm, Synopsys, Broadcom, AMD, NVidia, Apple, TSMC, Global
Foundries, Samsung, and many other companies that are in the semiconductor
design or manufacturing and are having difficulty in finding talent to meet their
needs.
➢ Research (Ph.D.)
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 Course Contents
1. Basics of Field-effect devices: Introduction to the VLSI device
technology, Semiconductors, p-n junctions, Metal – semiconductor
Junction.
2. Metal-Insulator Semiconductor: MOS capacitors, Surface potential,
Band Diagram, Threshold voltage, C-V characteristic.
3. MOSFET Models and Short channel effects: Basic MOSFET
behavior, short-channel effects, MOSFET scaling, CMOS leakage
current.
4. CMOS Fabrication Process: Clean room and safety requirements,
Wafer cleaning processes, Oxidation technologies, Impurity
incorporation, Lithography, Etching.
5. Numerical Simulation Lab: Introduction to the Synopsys Sentaurus
TCAD Simulation Tool, DC and AC analysis of the PN junction Diode,
MOSFETs and SOI Devices using the Synopsys Sentaurus TCAL tool.
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 Scope and Objective:

◼ Study semiconductor device operation, emphasizing CMOS technology at the

current state-of-the-art and beyond.

◼ Study submicron MOS devices and what happens as these devices get smaller
and faster.

◼ study various aspects of device modeling of long-channel and short-channel

MOSFETs and advanced field effect devices.

◼ Covers the fundamental concepts relevant to CMOS fabrication.

◼ Device simulation and analysis using Synopsys Sentaurus TCAD tool.

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 Course Outcomes
After successful completion of the course, students will be able to:
1. Understand the operation, and characterization of PN junction diode.
2. Understand the various modeling and simulation techniques used for
the performance characterization of Metal-oxide-semiconductor field-
effect transistors (MOSFETs).
3. Study of device phenomena in very small and high-speed devices
including effects of scaling, and interfaces.
4. Understand the CMOS fabrication process.
5. Simulate characteristics of MOS Devices using Synopsys Sentaurus
TCAD tool.

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 Reference Books/Tools
Required Textbook:
1. Y. Tsividis and C. McAndrew, "Operation and Modeling of the MOS Transistor", Oxford
Univ. Press.

2. Y. Taur, T. H. Ning, Fundamentals of Modern VLSI devices, Cambridge, (2013).

Reference Books:
1. M. S. Tyagi, Introduction to Semiconductor Materials and Devices, John Wiley & Sons,
(2012).
2. Science and engineering of microelectronic Fabrication by Stephen Campbell (Oxford
University Press; Second edition (2012))
3. VLSI Technology by S.M.Sze (McGraw Hill Education; 2 edition (2017)).

◼ TCAD tools:
– Synopsys Sentaurus TCAD: Device Design Simulator : Available

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 Grading Policy

◼ Grading:
– Minor I: 20%
– Minor II: 20%
– Assignments/Quizzes: 20%
– End Sem: 40%

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 Introduction
Digital Integrated Circuits:
• Why is designing ICs different today that It was before?
• Integrated Circuits: a semiconductor wafer on which thousands or millions of tiny
resistors, capacitors, diodes and transistors are fabricated.

• Will it change in the future?

• Samsung and TSMC’s 3nm (N3) Fin Field-Effect Transistor (FinFET)

technology successfully entered volume production in 2022.
• TSMC 2nm (N2) technology volume production is expected in 2025

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 Introduction

Source: https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_3nm

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 Design Abstraction Levels

Materials
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 Some History
The First Calculator (1832)

15

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 Electronic Numerical Integrator and Computer (ENIAC)

80 feet x 8.5 feet x

several feed wide

17,468 vacuum tubes

and consumed 160 kW

16

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 The Transistor Revolution

First transistor
Bell Labs, 1948

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 Intel 4004 Microprocessor

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 Intel 8080 Microprocessor

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 Latest Intel Microprocessor

Intel Core i9-14900K

Technology: 14nm
Clock 36 GHz

Latest Trends:- 14 nm, 7nm, 5nm, 3nm……

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 Moore’s Law
• In 1965, Gordon E. Moore—co-
founder of Intel—postulated that
the number of transistors that can
be packed into a given unit of space
will double every 18 to 24 months.

• He made a prediction that semiconductor

technology will double its effectiveness every 18 to
24 months.

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 Transistor Counts
1 Billion Transistors
K
1,000,000

100,000
Pentium® III
10,000 Pentium® II
Pentium® Pro
1,000 Pentium®
i486
100 i386
80286
10 8086
Source: Intel
1
1975 1980 1985 1990 1995 2000 2005 2010
Projected

22
Courtesy, Intel
8/22/2024
 Transistor Counts
1 Billion Transistors
K
1,000,000

100,000
Pentium® III
10,000 Pentium® II
Pentium® Pro
1,000 Pentium®
i486
100 i386
80286
10 8086
Source: Intel
1
1975 1980 1985 1990 1995 2000 2005 2010
Projected

23
Courtesy, Intel
8/22/2024
 Transistor Counts

24

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 Moore’s law in Microprocessors

1000

100 2X growth in 1.96 years!

Transistors (MT)

10
P6
Pentium® proc
1 486
386
0.1 286
8085 8086
0.01 8080
8008
4004
0.001
1970 1980 1990 2000 2010
Year

Transistors on Lead Microprocessors double every 2 years

8/22/2024 Courtesy, Intel
 Frequency
10000
Doubles every
1000 2 years
Frequency (Mhz)

P6
100
Pentium ® proc
486
10 8085 386
8086 286

1 8080
8008
4004
0.1
1970 1980 1990 2000 2010
Year
Lead Microprocessors frequency doubles every 2 years

Courtesy, Intel
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 Power Dissipation
100

P6
Pentium ® proc
Power (Watts)

10
486
8086 286
386
8085
1 8080
8008
4004

0.1
1971 1974 1978 1985 1992 2000
Year
Lead Microprocessors power continues to increase

Courtesy, Intel
8/22/2024
 Power will be a major problem
100000
18KW
10000 5KW
1.5KW
Power (Watts)

1000 500W
Pentium® proc
100
286 486
10 8086 386
8085
8080
8008
1 4004

0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year

Power delivery and dissipation will be prohibitive

Courtesy, Intel
8/22/2024
 ITRS - International Technology Roadmap for Semiconductors
(http://public.itrs.net)

YEAR 2002 2005 2008 2011 2014

TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm
CHIP SIZE 400 mm2 600 mm2 750 mm2 800 mm2 900 mm2
NUMBER OF
TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion
DRAM CAPACITY
2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits
MAXIMUM CLOCK
FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz

MINIMUM SUPPLY
VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V

MAXIMUM POWER
DISSIPATION 130 W 160 W 170 W 175 W 180 W

MAXIMUM NUMBER OF
I/O PINS 2500 4000 4500 5500 6000

Predictions of the worldwide semiconductor / IC industry about its own

future prospects
29

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 Shrinking Device Dimensions

YEAR 2002 2005 2008 2011 2014

TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm
CHIP SIZE 400 mm2 600 mm2 750 mm2 800 mm2 900 mm2
NUMBER OF
TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion

DRAM CAPACITY
2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits
MAXIMUM CLOCK
FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz

MINIMUM SUPPLY
VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V

MAXIMUM POWER
DISSIPATION 130 W 160 W 170 W 175 W 180 W

MAXIMUM NUMBER OF
I/O PINS 2500 4000 4500 5500 6000

30

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 Increasing Function Density

YEAR 2002 2005 2008 2011 2014

TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm
CHIP SIZE 400 mm2 600 mm2 750 mm2 800 mm2 900 mm2
NUMBER OF
TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion

DRAM CAPACITY 2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits

MAXIMUM CLOCK
FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz

MINIMUM SUPPLY
VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V

MAXIMUM POWER
DISSIPATION 130 W 160 W 170 W 175 W 180 W

MAXIMUM NUMBER OF
I/O PINS 2500 4000 4500 5500 6000

31

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 Increasing Clock Frequency

YEAR 2002 2005 2008 2011 2014

TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm
CHIP SIZE 400 mm2 600 mm2 750 mm2 800 mm2 900 mm2
NUMBER OF
TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion

DRAM CAPACITY
2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits
MAXIMUM CLOCK
FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz

MINIMUM SUPPLY
VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V

MAXIMUM POWER
DISSIPATION 130 W 160 W 170 W 175 W 180 W

MAXIMUM NUMBER
OF I/O PINS 2500 4000 4500 5500 6000

32

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 Decreasing Supply Voltage

YEAR 2002 2005 2008 2011 2014

TECHNOLOGY 130 nm 100 nm 70 nm 50 nm 35 nm
CHIP SIZE 400 mm2 600 mm2 750 mm2 800 mm2 900 mm2
NUMBER OF
TRANSISTORS (LOGIC) 400 M 1 Billion 3 Billion 6 Billion 16 Billion

DRAM CAPACITY
2 Gbits 10 Gbits 25 Gbits 70 Gbits 200 Gbits
MAXIMUM CLOCK
FREQUENCY 1.6 GHz 2.0 GHz 2.5 GHz 3.0 GHz 3.5 GHz

MINIMUM SUPPLY
VOLTAGE 1.5 V 1.2 V 0.9 V 0.6 V 0.6 V

MAXIMUM POWER
DISSIPATION 130 W 160 W 170 W 175 W 180 W

MAXIMUM NUMBER
OF I/O PINS 2500 4000 4500 5500 6000

Energy/transition = CL * V dd^2
Power = Energy/transition * f = CL * V dd^2 * f
33

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 IRDS - International Roadmap for Devices and Systems
(https://irds.ieee.org/)

34

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 ITRS Prediction of Power Consumption

35
Semiconductor Industry Assoc., International Technology Roadmap for Semiconductors,
8/22/2024 2002 Update; http://public.itrs.net.
 ITRS Prediction of Power Consumption

36
Semiconductor Industry Assoc., International Technology Roadmap for Semiconductors,
8/22/2024 2002 Update; http://public.itrs.net.
 ITRS Prediction of Power Consumption

37
Semiconductor Industry Assoc., International Technology Roadmap for Semiconductors,
8/22/2024 2002 Update; http://public.itrs.net.