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demux

A De-Multiplexer (De-Mux) is a combinational circuit that takes a single input and uses 'n' selection lines to route the input to one of the multiple outputs. The document explains the operation and implementation of 1x4, 1x8, and 1x16 De-Multiplexers, detailing their truth tables and how to construct higher-order De-Multiplexers using lower-order ones. It also provides Boolean functions for the outputs and circuit diagrams for better understanding.

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0% found this document useful (0 votes)
8 views

demux

A De-Multiplexer (De-Mux) is a combinational circuit that takes a single input and uses 'n' selection lines to route the input to one of the multiple outputs. The document explains the operation and implementation of 1x4, 1x8, and 1x16 De-Multiplexers, detailing their truth tables and how to construct higher-order De-Multiplexers using lower-order ones. It also provides Boolean functions for the outputs and circuit diagrams for better understanding.

Uploaded by

mdmitttt
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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De-Multiplexer is a combinational circuit that performs the reverse operation of

Multiplexer. It has single input, ‘n’ selection lines and maximum of 2 outputs. The n

input will be connected to one of these outputs based on the values of selection lines.
Since there are ‘n’ selection lines, there will be 2 possible combinations of zeros and
n

ones. So, each combination can select only one output. De-Multiplexer is also called
as De-Mux.

1x4 De-Multiplexer
1x4 De-Multiplexer has one input I, two selection lines, s & s and four outputs Y , Y ,
1 0 3 2

Y &Y . The block diagram of 1x4 De-Multiplexer is shown in the following figure.
1 0

The single input ‘I’ will be connected to one of the four outputs, Y to Y based on the
3 0

values of selection lines s & s0. The Truth table of 1x4 De-Multiplexer is shown
1

below.

Selection Inputs Outputs

S 1 S
0 Y 3 Y 2 Y 1 Y 0

0 0 0 0 0 I

0 1 0 0 I 0

1 0 0 I 0 0

1 1 I 0 0 0

From the above Truth table, we can directly write the Boolean functions for each
output as
Y3=s1s0I
Y2=s1s0′I
Y1=s1′s0I
Y0=s1′s0′I
We can implement these Boolean functions using Inverters & 3-input AND gates.
The circuit diagram of 1x4 De-Multiplexer is shown in the following figure.

We can easily understand the operation of the above circuit. Similarly, you can
implement 1x8 De-Multiplexer and 1x16 De-Multiplexer by following the same
procedure.

Implementation of Higher-order De-Multiplexers


Now, let us implement the following two higher-order De-Multiplexers using lower-
order De-Multiplexers.

 1x8 De-Multiplexer
 1x16 De-Multiplexer

1x8 De-Multiplexer
In this section, let us implement 1x8 De-Multiplexer using 1x4 De-Multiplexers and
1x2 De-Multiplexer. We know that 1x4 De-Multiplexer has single input, two selection
lines and four outputs. Whereas, 1x8 De-Multiplexer has single input, three selection
lines and eight outputs.
So, we require two 1x4 De-Multiplexers in second stage in order to get the final
eight outputs. Since, the number of inputs in second stage is two, we require 1x2
DeMultiplexer in first stage so that the outputs of first stage will be the inputs of
second stage. Input of this 1x2 De-Multiplexer will be the overall input of 1x8 De-
Multiplexer.
Let the 1x8 De-Multiplexer has one input I, three selection lines s , s & s and outputs
2 1 0

Y to Y . The Truth table of 1x8 De-Multiplexer is shown below.


7 0

Selection Inputs Outputs


s 2 s 1 s 0 Y 7 Y 6 Y 5 Y 4 Y 3 Y 2 Y 1 Y 0

0 0 0 0 0 0 0 0 0 0 I

0 0 1 0 0 0 0 0 0 I 0

0 1 0 0 0 0 0 0 I 0 0

0 1 1 0 0 0 0 I 0 0 0

1 0 0 0 0 0 I 0 0 0 0

1 0 1 0 0 I 0 0 0 0 0

1 1 0 0 I 0 0 0 0 0 0

1 1 1 I 0 0 0 0 0 0 0

We can implement 1x8 De-Multiplexer using lower order Multiplexers easily by


considering the above Truth table. The block diagram of 1x8 De-Multiplexer is
shown in the following figure.

The common selection lines, s & s are applied to both 1x4 De-Multiplexers. The
1 0

outputs of upper 1x4 De-Multiplexer are Y to Y and the outputs of lower 1x4 De-
7 4

Multiplexer are Y to Y .
3 0
The other selection line, s is applied to 1x2 De-Multiplexer. If s is zero, then one of
2 2

the four outputs of lower 1x4 De-Multiplexer will be equal to input, I based on the
values of selection lines s & s . Similarly, if s is one, then one of the four outputs of
1 0 2

upper 1x4 DeMultiplexer will be equal to input, I based on the values of selection
lines s & s .
1 0

1x16 De-Multiplexer
In this section, let us implement 1x16 De-Multiplexer using 1x8 De-Multiplexers and
1x2 De-Multiplexer. We know that 1x8 De-Multiplexer has single input, three
selection lines and eight outputs. Whereas, 1x16 De-Multiplexer has single input, four
selection lines and sixteen outputs.
So, we require two 1x8 De-Multiplexers in second stage in order to get the final
sixteen outputs. Since, the number of inputs in second stage is two, we require 1x2
DeMultiplexer in first stage so that the outputs of first stage will be the inputs of
second stage. Input of this 1x2 De-Multiplexer will be the overall input of 1x16 De-
Multiplexer.
Let the 1x16 De-Multiplexer has one input I, four selection lines s , s , s & s and
3 2 1 0

outputs Y to Y . The block diagram of 1x16 De-Multiplexer using lower order


15 0

Multiplexers is shown in the following figure.

The common selection lines s , s & s are applied to both 1x8 De-Multiplexers. The
2 1 0

outputs of upper 1x8 De-Multiplexer are Y to Y and the outputs of lower 1x8
15 8

DeMultiplexer are Y to Y .
7 0

The other selection line, s is applied to 1x2 De-Multiplexer. If s is zero, then one of
3 3

the eight outputs of lower 1x8 De-Multiplexer will be equal to input, I based on the
values of selection lines s , s & s . Similarly, if s3 is one, then one of the 8 outputs of
2 1 0
upper 1x8 De-Multiplexer will be equal to input, I based on the values of selection
lines s , s & s .
2 1 0

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