IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 69, NO.

7, JULY 2022 3681

Channel Thickness and Grain Size Engineering

for Improvement of Variability and Performance
in 3-D NAND Flash Memory
Kihoon Nam , Member, IEEE, Chanyang Park , Member, IEEE, Jun-Sik Yoon , Member, IEEE,
Giho Yang , Student Member, IEEE, Min Sang Park , and Rock-Hyun Baek , Member, IEEE

Abstract — In this study, to improve the threshold Its structure was further developed to consist of a three-
voltage (Vth ) variability and cell performance in three- dimensional (3-D) architecture and multilevel cell (MLC),
dimensional (3-D) NAND flash memory, we analyzed the to achieve excellent integration beyond simple geometry
electrical characteristics with respect to various channel
thickness (Tch ) and average grain size (GS) values. The 3-D shrinkage. In particular, 3-D NAND flash has a significantly
random Voronoi grain patterns were applied to a polycrys- increased capacity due to structural innovation from horizontal
talline silicon (poly-Si) channel to determine the actual grain to vertical cell strings [2]–[5]. Furthermore, MLC, which
shape using technology computer-aided design (TCAD). stores multiple bits in a single cell, has accelerated the
For statistical analysis, key electrical characteristics such improvement of bit density [3], [6]. However, the overlap
as the threshold voltage (Vth ), subthreshold swing (SS),
maximum transconductance (gm ), and on-current (ION ) were of threshold voltage (Vth ) distributions has been aggravated
extracted from samples with different patterns of grain when subdividing the Vth states to contain more bits due to an
boundaries (GBs) at specific Tch and GS values. The stan- increase in density [7]. The grain boundary (GB) is a major
dard deviation of Vth (σ Vth ) increased with an increase in cause of the widening of the Vth distribution. Single-crystalline
GS at Tch > 22 nm, and no increase trend was observed for silicon (c-Si) is used as a channel material in the planar
σ Vth at Tch < 22 nm. The mean SS, gm , and ION related to the
performance improved overall with an increase in GS at the structure, whereas polycrystalline silicon (poly-Si) containing
same Tch value. Based on a comprehensive analysis of vari- GBs is used in the 3-D structure for the deposition process.
ous 3-D grain patterns, optimal structures were proposed in In general, GBs have surface states that interfere with carrier
terms of variability and/or performance. Furthermore, based transport [8]–[10]; thus, the performance of 3-D NAND flash
on the results, we suggest suitable Tch and GS parameters is degraded [11], [12]. To reduce the GB effect, a Macaroni
for the given target of 3-D NAND flash devices.
structure with an oxide deposit at the center of the channel hole
Index Terms — 3-D NAND flash memory, channel thickness, was adopted [13]. However, the GB effect was not completely
grain size (GS), polycrystalline silicon (poly-Si), random eliminated from the poly-Si channel.
grain boundary (GB), threshold voltage (Vth ) variability.
In general, the electrical characteristics improve as the
average grain size (GS) increases, due to the reduced number
I. I NTRODUCTION of GBs. On the other hand, the Vth variation is significant

D UE to its high capacity and low bit cost, NAND flash has
achieved the greatest utility in non-volatile memories [1].
due to the high sensitivity of the small number of GBs in
the poly-Si channel [14]. In a previous study, it was reported
that the Vth variation does not increase with a decrease in the
Manuscript received March 11, 2022; revised May 3, 2022; accepted number of GBs as the GS increases [15]. We inferred that
May 12, 2022. Date of publication May 25, 2022; date of current version
June 21, 2022. This work was supported in part by the POSTECH these contradictory results can be attributed to the channel
and SK hynix Inc., through the Semiconductor Industry Collaborative thickness (Tch ). In practice, as Tch changes, the number, posi-
Project, in part by the National Research Foundation of Korea (NRF) tions, and areas of the GBs change simultaneously, and they
grant funded by the Korea Government (MSIT) under Grant NRF-
2020R1A4A4079777, and in part by the National Research Foundation of directly influence the GB behaviors. Previously, the electrical
Korea (NRF) grant funded by the Korea Government (MSIT) under Grant characteristics of Tch and GS in 3-D NAND Flash memory
NRF-2020M3F3A2A02082436. The review of this article was arranged were investigated [14]–[19]. However, the correlation between
by Editor P.-Y. Du. (Corresponding author: Rock-Hyun Baek.)
Kihoon Nam, Chanyang Park, Jun-Sik Yoon, Giho Yang, and the Vth variation and electrical characteristics has not been
Rock-Hyun Baek are with the Department of Electrical Engineering, extensively investigated with respect to various Tch and GS
Pohang University of Science and Technology (POSTECH), Pohang values.
37673, South Korea (e-mail: namgee4970@postech.ac.kr; rh.baek@
postech.ac.kr). In this study, we quantitatively analyzed the GB effect
Min Sang Park is with SK hynix Inc., Icheon 17336, South Korea by considering the tradeoff between the Vth variation and
(e-mail: minsang.park@sk.com). electrical characteristics with respect to various Tch and GS
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TED.2022.3175681. values. In particular, 3-D random Voronoi grain patterns [20]
Digital Object Identifier 10.1109/TED.2022.3175681 were applied to the poly-Si channel to model the natural Vth

0018-9383 © 2022 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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 3682 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 69, NO. 7, JULY 2022

TABLE I
M AJOR PARAMETERS IN 3-D NAND F LASH C ELL S IMULATION

Fig. 1. (a) 3-D random Voronoi grain patterns in the poly-Si channel.
(b) Entire cylindrical simulation structure of the 3-D NAND Flash device,
considering the GB. (c) Y-cut cross-sectional view of the cell string,
in addition to major parameters of the stack. The channel thickness (Tch )
and average GS were split, and the remaining parameters were fixed.

variation by conducting Sentaurus technology computer-aided

design (TCAD) simulation [21]. At a given combination of
Tch and GS values, 88 samples of 3-D NAND Flash cells
were simulated with different grain patterns (on average). The
selected curves of the word line (WLsel ) voltage with respect
to the bitline (BL) current (IBL ) exhibited different profiles
and major electrical characteristics. Moreover, the Vth , sub-
threshold swing (SS), maximum transconductance (gm ), and
ON -current (ION ) were extracted from the curves. Thereafter, gate, blocking oxide (BOX), charge trap nitride (N), tunneling
we proposed an optimal structure based on the analysis results. oxide (TOX), poly-Si channel, and Macaroni oxide filler. Only
Tch and GS were split to verify the random GB effect; whereas,
the other parameters were fixed.
II. M ATERIALS AND M ETHODS The major dimension parameters and trap density profiles in
GBs are randomly generated during the fabrication of the the GB are summarized in Table I. First, we set a simulation
poly-Si channel; thus, the number and location of GBs cannot structure similar to that of the actual device. The underlying
be precisely controlled. Only the deposition and annealing simulation structure was experimentally calibrated and the
processes can determine the GS of the poly-Si channel [22]. calibration method was described in detail [23]. Based on
In practice, the analysis of electrical characteristics is chal- this structure, we split Tch and GS within a reasonable range
lenging, as it is difficult to identify randomly generated GBs. considering previous research studies [16], [19]. Energetic trap
A statistical numerical simulation is therefore a useful alter- distributions were proposed with double Gaussian distribution
native for the quantitative analysis of the random GB effect. composed of deep and tail states in the poly-Si channel
Fig. 1(a) shows a poly-Si channel with a 3-D random [24], [25]. Donor-like states, which trap holes, and acceptor-
Voronoi grain pattern. Grain seeds were set randomly in the like states, which trap electrons, are within the forbidden
poly-Si channel depending on the given GS, and the simu- energy bandgap. The total density of states was described
lation structures were then completed with different Voronoi in [26]. The energetic trap distributions were fixed for all
patterns [20]. Depending on the Tch and GS values, the 3-D values of Tch and GS. In addition, only the trap density of
random Voronoi grain patterns caused different Vth variations. the GB was assumed, as its effect is more significant than
The complete structure of the 3-D NAND Flash string is shown the trap density of the channel/oxide interface [27]. For a
in Fig. 1(b). The string contained a drain select line (DSL) 3-D NAND cell simulation, drift–diffusion, Shockley–Read–
and source select line (SSL), and was connected to a BL and a Hall recombination, mobility (doping, high field, and interface-
source line (SL) at both ends of the poly-Si channel. The string dependent), and Hurkx band-to-band tunneling models were
consisted of a four-word line (WL) to minimize the simulation implemented in the poly-Si channel. In particular, at Tch =
time and focus on the random GB effect while considering the 5.5 nm, a modified local density approximation model was
target and neighboring cells. Fig. 1(c) shows the Y-cut cross- applied to consider the quantum confinement effect of a thin
sectional view of Fig. 1(b). A cell was stacked with a metal film [28]. Consequently, the electrons were distributed away

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 NAM et al.: CHANNEL THICKNESS AND GS ENGINEERING FOR IMPROVEMENT 3683

Fig. 2. Cumulative probabilities of Vth , SS, maximum transconductance

(gm ), and ON-current (ION ) with various Tch and GS. Based on Tch and
GS, a tradeoff can be realized.

from the interface, and the value of the bandgap expansion

matched the value reported in [29] (not shown).
Fig. 2 shows the cumulative distribution functions of Vth ,
SS, gm , and ION , which are important factors in determining the Fig. 3. Trends of the mean (a) Vth , (b) SS, (c) gm , and (d) ION with
electrical characteristics of a 3-D NAND cell. Ideally, the SS respect to various Tch and GS values. The mean values were extracted
from 88 samples (on average) to statistically analyze the random GB
should be small, and gm and ION should be large for a higher effect. c-Si) exhibited changes only with respect to Tch without GBs. The
performance. The standard deviation of Vth (σ Vth ) associated structure with Tch = 46 nm represents the channel without Macaroni
with the dispersion of the distribution should be small for a filler.
lower variability. From a statistical standpoint, we evaluated
each characteristic as mean and σ parameters. As Tch and GS
were changed, not all electrical characteristics and Vth varia- exhibited a more significant influence than the increase in Tch .
tions were simultaneously improved or degraded. For example, This finding is detailed in Fig. 5(c).
at Tch = 38.5 nm and GS = 60 nm (closed circle, red), As can be seen from Fig. 3(b), the mean SS increased
when Tch decreased to 5.5 nm (open circle, red), the σ Vth as Tch increased in c-Si; given that, with an increase in
and mean SS decreased (improved), but the mean gm and Tch , the gate controllability of the channel decreased. For
ION decreased (degraded). Moreover, when GS increased to Tch < 33 nm, SS decreased as GS increased, given that the
105 nm (closed left triangle, purple), the mean gm and ION reduced number of GBs lowered the potential barrier under the
increased (improved), the mean SS was similar, but the σ Vth WLsel . However, for Tch > 33 nm, SS converged (except for
increased (degraded). Therefore, determining the optimal Tch GS = 130 nm). This implies that the area of GBs under the
and GS is critical for the optimization of the tradeoff between WLsel exhibited a more significant influence than the number
variability and performance. of GBs. These results are shown in Fig. 6.
Fig. 3(c) and (d) shows the mean gm and ION , respectively,
which exhibited similar trends. In particular, gm , and ION
III. R ESULTS AND D ISCUSSION
increased until Tch = 11 nm, and then reached saturation in
A. Electrical Characteristics and Vth Variation With c-Si. This is because the electrons were sufficiently concen-
Respect to Tch and GS trated close to the surface of the channel. Overall, gm and ION
Fig. 3 shows the electrical characteristics with respect to increased as GS increased at the same Tch values. The number
Tch and GS values. One grain in the channel was considered of electrons contributing to the carrier transport increased with
in c-Si to verify the changes without grains. Furthermore, a decrease in the interface states of the GBs.
we analyzed all the electrical characteristics using a Seto’s Fig. 4(a) shows the profile of σ Vth for various Tch and GS
method developed in a previous study, which models a poten- values. For Tch > 22 nm, with the exception of GS = 130 nm,
tial barrier at the GB, thus resulting in a depletion region [30]. σ Vth increased as GS increased, due to the high sensitivity of
Afterwards, the analysis of the Vth variation will be discussed the reduced number of GBs. In Fig. 4(b), we chose GS = 40,
in the following Fig. 4. 60, 80, 105, and 130 nm, at which the average number of
As can be seen from Fig. 3(a), the mean Vth decreased as grains (nGrains) distinctly differed, because the exact number
Tch increased in c-Si, given that the channel was less depleted. of GBs was hard to know by randomly generated 3-D Voronoi
Overall, Vth decreased as GS increased at the same Tch value, grains. At GS = 130 nm, the σ Vth was significantly small at
given that the number of GBs decreased as GS increased, thus all Tch values, as there were only three nGrains, and the GB
resulting in a decreased expansion of the depletion region by was not located under the WLsel . This implies that if GS is
the GBs. For GS < 105 nm, unlike c-Si, Vth increased over large, as in the case of c-Si, σ Vth decreases. However, a grain
a certain Tch range, given that the increased area of the GBs that is the size of the total channel height is difficult to achieve.

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 3684 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 69, NO. 7, JULY 2022

Fig. 4. (a) Trends of σVth with respect to various Tch and GS values.
For Tch > 22 nm, σVth increased with an increase in GS (except for
GS = 130 nm). For Tch < 22 nm, no trend was observed with
respect to GS due to the smaller area for GBs. (b) Average number
of grains (nGrains) in the poly-Si channel according to the GS. It should
be noted that nGrains was split at the red circles, thus indicating the
significant difference.

Although the growth of large grains can be achieved [31], [32],

it is unsuitable for mass production. For Tch < 22 nm, the
trend of σ Vth was not consistent with an increase in GS. The
sensitivity to the number of GBs decreased due to the reduced
GB areas at significantly small Tch values. In other words, for
medium GS of 60, 80, and 105 nm, σ Vth increased with an
increase in Tch , and it becomes saturated for Tch > 22 nm.
Figs. 5 and 6 show the quantitative analysis of representa- Fig. 5. (a) Cross-sectional views of 3-D NAND Flash along the channel
direction with the electron density (eDensity) in the poly-Si channel.
tive samples, close to the mean value of Fig. 3 for the specific (b) WLsel voltage versus IBL curves. (c) Total number of charges cal-
Tch and GS values. Thereafter, the electrical characteristics culated by eDensity and the trapped electron charge (eTrappedCharge)
were analyzed based on the electron density (eDensity) in the were compared with different Tch and GS for representative samples.
poly-Si channel and the trapped electron charge (eTrapped-
Charge) of the GBs in the poly-Si channel.
Fig. 5(a) shows the cross-sectional views of Fig. 1(b) along degraded due to the already high OFF-current of IBL as the
the channel direction. In all the samples, the WLsel voltage WLsel voltage was supplied.
was −0.98 V, the WLunsel pass voltage was 7 V, and the other Fig. 5(c) shows the total number of charges calculated by
bias conditions were the same. At the same Tch value, the the eDensity and eTrappedCharge of the GBs in the poly-
number of GBs decreased as the GS increased. It should be Si channel, excluding the volume of the Macaroni filler.
noted that the eDensity was concentrated on the surface of We calculated the total number of charges by integrating the
the channel and decreased as it goes to the bulk. In particular, channel volume (cm3 ) and each component (cm−3 ) under the
the eDensity was lower when the GS was small (S3). When same conditions as those in Fig. 5(a). When Tch increases at
Tch was small at the same GS, the GB effect was relatively the same GS, the eDensity of the channel volume may increase
small, given that the eDensity was high throughout the poly-Si by leakage current, in addition to the area of the GBs, thus
channel. In addition, when Tch was small, no trend of σ Vth was resulting in an increase in the eTrappedCharge. Therefore,
observed regardless of the GS, as shown in Fig. 4(a). This is we compared the total number of charges by the eDensity
because the Voronoi grain patterns were not clearly revealed and eTrappedCharge, considering the channel volume as Tch
in the channel under the WLsel , compared to the thicker Tch . changed. When Tch increased at the same GS value, the total
Fig. 5(b) shows the curves of the WLsel voltage with respect number of charges by eDensity decreased; whereas that by the
to IBL for each representative sample. For S3 (Tch = 38.5 nm eTrappedCharge increased. This resulted in IBL degradation at
and GS = 40 nm, the least-optimal case), GS was the smallest the same gate bias, i.e., a positive shift in Vth . In particular,
and Vth was the largest due to the delayed activation of unlike c-Si, Vth could increase as Tch increased, as shown
the poly-Si channel, given that the number of GBs was the in Fig. 3(a).
highest, as shown in Fig. 5(a). In particular, gm and ION were Fig. 6(a) shows the conduction band energy (E C ) of the
dominated by GS instead of Tch , given that the eDensity of Z –Z ‘ cut (near the surface) and under the same conditions as
the bulk was insignificant when compared with that of the those in Fig. 5(a). In particular, the GB enlarged the potential
surface [see Fig. 5(a)]. Therefore, the random GB effect near barrier along the channel direction and interfered with the
the surface exhibited a more significant influence than the carrier transport. For S3, gm and ION were severely degraded
increase in Tch . Furthermore, when Tch was large, SS was by several potential barriers in the poly-Si channel. In addition,

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 NAM et al.: CHANNEL THICKNESS AND GS ENGINEERING FOR IMPROVEMENT 3685

Fig. 6. (a) Conduction band energy (EC ) and Z–Z ‘ cut in Fig. 5(a).
Several potential barriers were created by the GBs. (b) Under the WLsel , Fig. 7. (a) Vth distribution at Tch = 22 nm and GS = 60 nm. (b) Schematic
at Tch = 11 nm, the potential barrier height was steep in the subthreshold diagrams of 3-D random Voronoi grain patterns with the eDensity at the
region due to the enhanced gate controllability. minimum, mean, and maximum corresponding Vth distributions. With an
increase in the number of intersections of GBs under the WLsel , the
eDensity decreased.

the surface potential barrier combined with the GB resulted in

inadequate subthreshold behavior when compared with that of
maximum Vth , the most significant feature was that the
c-Si [33].
three-way intersections of the GBs were formed under the
Fig. 6(b) shows that the barrier height under the WLsel
WLsel . In particular, the depletion region was most enlarged
decreased as the WLsel voltage increased. The increasing gate
by increasing the cross-sectional area of the GBs as the oblique
bias suppressed the enlarged surface potential barrier due
GBs were combined. Therefore, the eDensity was the lowest
to the GB, which is referred to as the gate-induced grain
among the three patterns. In conclusion, for the same Tch and
barrier-lowering (GIGBL) effect [34]. As can be observed
GS values, the profile of the GBs under the WLsel was the
from the figure, the change in the barrier height determined the
major influencing factor of the Vth variation.
subthreshold behavior in the poly-Si channel. At Tch = 11 nm,
the barrier height decreased significantly in the subthreshold
region when compared with Tch = 38.5 nm. In other words, C. Proposed Structure to Optimize Target Characteristics
the surface potential barrier was significantly influenced by An optimal structure was proposed for the target character-
the gate, which led to SS enhancement. However, at Tch = istics (σ Vth , mean SS, gm , and ION ). First, we normalized each
38.5 nm, the SS was similar regardless of the GS, as shown characteristic between 0 and 1, such that all values were on the
in Fig. 3(b). This is because Tch was sufficiently large, and same scale. We then selected the largest evaluation value by
one GB under the WLsel exhibited a significant influence on calculating the following equation according to the weights:
the SS. Therefore, even if the number of GBs is small due to
a large GS, the SS can be significantly degraded. f (Tch , GS)
= (1 − σ Vth (Tch , GS))wσ V th + (1 − SS(Tch , GS))wSS
B. 3-D Random Voronoi Grain Patterns Widening + gm (Tch , GS)wgm + I ON (Tch , GS)w ION (1)
Vth Distribution where σ Vth (Tch , GS), SS (Tch , GS), gm (Tch , GS), and
Fig. 7(a) shows the Vth distribution from 88 samples at ION (Tch , GS) are the σ Vth , mean SS, gm , and ION at the specific
Tch = 22 nm and GS = 60 nm. The Vth distribution was Tch and GS values, respectively, as shown in Figs. 3 and 4(a).
obtained by randomly generated 3-D Voronoi grain patterns in The weights (wσ V th , wSS , wgm , and w ION ) determine the priority,
the poly-Si channel. We investigated the patterns that resulted and their total sum is 100. For the σ Vth and mean SS, the
in a large Vth distribution (i.e., Vth variation). In addition, value subtracted from 1 was multiplied by the weight, given
the Vth distribution exhibited a similar profile for the other that a lower value resulted in less variability and a higher
Tch and GS. performance. The structures of GS = 130 nm were excluded,
Fig. 7(b) shows the schematic diagrams of the 3-D ran- given that all values of the characteristics were improved but
dom Voronoi grain patterns with the minimum, mean, and it was difficult to make GS as large as the total channel height.
maximum Vth of Fig. 7(a). First, at the minimum Vth , the Fig. 8 shows an example of the evaluation values for the
number of GBs under the WLsel was small; and the cross- preferred target by weight. The weights (wσ V th = wSS =
sectional area of the GBs was therefore small. Hence, the wgm = w ION = 25) determined the evaluation values of the
depletion region was less enlarged, and Vth decreased. At the balanced target with respect to various Tch and GS values.
mean Vth , more than two GBs were under the WLsel , inclined The most optimized structure for the balance was Tch = 11 nm
vertically and horizontally to the channel. In addition, if more and GS = 105 nm. The structures suitable for the remaining
GBs were located under the WLsel , Vth could increase further, characteristics are listed with their weights in Table II. For
due to the extended depletion region of the GBs. At the example, the device with Tch = 5.5 nm and GS = 80 nm

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 3686 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 69, NO. 7, JULY 2022

increased, thus resulting in an increase in σ Vth . Based on the

results, this article proposes an optimal structure for the target
variability and/or performance. The findings of this study can
serve as an engineering basis for the determination of suitable
Tch and GS values for the design of 3-D NAND flash devices.

ACKNOWLEDGMENT
The EDA tool was supported by the IC Design Education
Center (IDEC), South Korea.

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