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8085 - Unit 3

This document discusses looping, counting, and indexing techniques in programming, particularly in the context of the 8085 microprocessor. It explains continuous and conditional loops, the use of counters, and the generation of delays, as well as the concept of interrupts, including their types, priorities, and how they function within the microprocessor. The document also provides examples of programs for counting and generating waveforms.

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0% found this document useful (0 votes)
33 views16 pages

8085 - Unit 3

This document discusses looping, counting, and indexing techniques in programming, particularly in the context of the 8085 microprocessor. It explains continuous and conditional loops, the use of counters, and the generation of delays, as well as the concept of interrupts, including their types, priorities, and how they function within the microprocessor. The document also provides examples of programs for counting and generating waveforms.

Uploaded by

vaishnavin707
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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UNIT-3

LOOPING-COUNTING –INDEXING
Looping-In this technique, the program is instructed to execute certain set of
instructions repeatedly to execute a particular task number of times.

 Counting-This technique allows programmer to count how many times the


instruction/set of instructions are executed.

 Indexing-This technique allows programmer to point or refer the data


stored in sequential memory location one by one.

Looping in 8085

Looping is a programming technique that instructs the


Microprocessor to repeat tasks. It is accomplished by changing the
sequence of execution using jump instructions.

Loops can be classified into two groups:

1. Continous Loops.
2. Conditional Loops.
Continous Loops

A continuous loops repeats a task continuously. It is setup by using


unconditional jump instruction. A program with a continuous loop will
keep repeating tasks until the system is reset as shown in the flowchart.
Flowchart of a Continous Loop
Conditional Loops

A conditional loop repeat a task if some conditions are satisfied. They are
setup by conditional jump instructions. These instructions check flags(Z,
CY, P, S) and repeat the tasks based on the flag values. These loops
include counting and indexing.

Conditional Loop and Counter

A counter is a typical application of the conditional loop. To achieve the


looping task, the microprocessor requires a counter and a flag. A counter
is set up by loading a suitable count into a register. Counting is
accomplished by either incrementing or decrementing the counter. A
conditional jump instruction creates the loop and the end of counting is
indicated by a flag.

The following flowchart illustrates the approach needed for the


microprocessor to repeat a task five times.
Task Repetition Using Conditional Loops

Indexing

Pointing objects with sequential numbers is called indexing. Data bytes


are stored in memory locations and are referred to by their memory
locations.

Delay Generation in 8085

The counting method described above has a significant downside in that


it is performed at such a high speed that only the final count can be
seen. So to notice the counting, there must be an appropriate time delay
between counts.

Depending on the time delay required, a register is loaded with a


number, and then the register is decremented until it reaches zero by
setting up a loop with a conditional jump instruction. The delay is caused
by the loop, which is determined by the system’s clock period.

Time Delay Using One Register

The following program will demonstrate the time delay using 8-bit
counter.

MVI B, FFH

LOOP: DCR B

JNZ LOOP

RET

Time Delay Using a Register Pair

Instead of an 8-bit counter, we can do the same task with a 16-bit


register pair. More time delay can be generated using this method. For
example:

LXI B,FFFFH

LOOP: DCX B

MOV A,B

ORA C

JNZ LOOP

RET

8085 program for hexadecimal counter


Write a program to count continuously in hexadecimal from FFH to 00H
in a system with clock frequency 0.5 microseconds.

1. The hexadecimal counter is set by loading a register with starting


number and decrementing it till zero is reached and then again
decrementing it to will produce -1, which is two’s complement of
FFH. Hence, the register again reaches FFH.
8085 program for pulse waveform

To generate square wave with 8085, we will rotate 10101010


(AAH) continuously. We have to send D 0 as output. We will
mask the accumulator content by 01H. If this is 0, then output
will be 0, if it is 1, output will be 1, thus the pulse will be
generated.

a program to generate continuous square wave. Use D 0 bit to output


the square wave. The required waveform is:

Program Description –
1. Register D is loaded with AAH(10101010).
2. Bit pattern is moved to accumulator.
3. Bit pattern is rotated left and saved again in register D. This save is
necessary as accumulator is used again in the program.
4. Mask all bits but 0th bit.
5. Output A at port 1.
ZERO TO NINE (MODULO TEN) COUNTER

Stack and Subroutine


Interrupts in 8085 microprocessor
Introduction :
In the 8085 microprocessor, an interrupt is a signal that temporarily
suspends the normal execution of a program and redirects the control
to a specific interrupt service routine (ISR). Interrupts allow the
microprocessor to respond to external events, such as user input,
system events, or hardware signals, without the need for constant
polling.
There are five interrupt signals in the 8085 microprocessor:
1. TRAP: The TRAP interrupt is a non-maskable interrupt that is
generated by an external device, such as a power failure or a
hardware malfunction. The TRAP interrupt has the highest priority
and cannot be disabled.
2. RST 7.5: The RST 7.5 interrupt is a maskable interrupt that is
generated by a software instruction. It has the second highest
priority.
3. RST 6.5: The RST 6.5 interrupt is a maskable interrupt that is
generated by a software instruction. It has the third highest priority.
4. RST 5.5: The RST 5.5 interrupt is a maskable interrupt that is
generated by a software instruction. It has the fourth highest priority.
5. INTR: The INTR interrupt is a maskable interrupt that is generated
by an external device, such as a keyboard or a mouse. It has the
lowest priority and can be disabled.

How Interrupts works?


 When microprocessor receives any interrupt signal from
peripheral(s) which are requesting its services, it stops its current
execution and program control is transferred to a sub-routine by
generating CALL signal and after executing sub-routine by
generating RET signal again program control is transferred to main
program from where it had stopped. When microprocessor receives
interrupt signals, it sends an acknowledgement (INTA) to the
peripheral which is requesting for its service.
 Interrupts can be classified into various categories based on
different parameters:

1. Hardware and Software Interrupts – When microprocessors receive


interrupt signals through pins (hardware) of microprocessor, they are
known as Hardware Interrupts. There are 5 Hardware Interrupts in
8085 microprocessor. They are – INTR, RST 7.5, RST 6.5, RST 5.5,
TRAP Software Interrupts are those which are inserted in between the
program which means these are mnemonics of microprocessor. There
are 8 software interrupts in 8085 microprocessor. They are – RST 0,
RST 1, RST 2, RST 3, RST 4, RST 5, RST 6, RST 7.
2. Vectored and Non-Vectored Interrupts – Vectored Interrupts are
those which have fixed vector address (starting address of sub-routine)
and after executing these, program control is transferred to that
address. Vector Addresses are calculated by the formula 8 * TYPE

INTERRUPT VECTOR ADDRESS

TRAP (RST 4.5) 24 H

RST 5.5 2C H

RST 6.5 34 H

RST 7.5 3C H

1. For Software interrupts vector addresses are given by:


INTERRUPT VECTOR ADDRESS

RST 0 00 H

RST 1 08 H

RST 2 10 H

1. Non-Vectored Interrupts are those in which vector address is not


predefined. The interrupting device gives the address of sub-routine for
these interrupts. INTR is the only non-vectored interrupt in 8085
microprocessor.
2. Maskable and Non-Maskable Interrupts – Maskable Interrupts are
those which can be disabled or ignored by the microprocessor. These
interrupts are either edge-triggered or level-triggered, so they can be
disabled. INTR, RST 7.5, RST 6.5, RST 5.5 are maskable interrupts in
8085 microprocessor. Non-Maskable Interrupts are those which cannot
be disabled or ignored by microprocessor. TRAP is a non-maskable
interrupt. It consists of both level as well as edge triggering and is used
in critical power failure conditions.
Priority of Interrupts – When microprocessor receives multiple interrupt
requests simultaneously, it will execute the interrupt service request (ISR)
according to the priority of the interrupts.

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