Scribd
Upload
11 views1 page

UEC001 Tutorial 5

This document is a tutorial sheet for Electronic Engineering (UEC001) for the Even Semester 2022-23, containing a series of questions related to unsigned representation, Boolean expression minimization, standard to canonical conversions, and implementations using logic gates. It includes tasks such as solving arithmetic operations using 1's and 2's complement methods, minimizing Boolean expressions, and simplifying functions using K-maps. The sheet emphasizes practical applications of digital logic design concepts.

Uploaded by

Vaishnavi Chaursia
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
11 views1 page

UEC001 Tutorial 5

This document is a tutorial sheet for Electronic Engineering (UEC001) for the Even Semester 2022-23, containing a series of questions related to unsigned representation, Boolean expression minimization, standard to canonical conversions, and implementations using logic gates. It includes tasks such as solving arithmetic operations using 1's and 2's complement methods, minimizing Boolean expressions, and simplifying functions using K-maps. The sheet emphasizes practical applications of digital logic design concepts.

Uploaded by

Vaishnavi Chaursia
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 1

Electronic Engineering (UEC001) Even Semester 2022-23 Pa g e | 1

Tutorial Sheet-5

Q1. Solve the following using unsigned representation


A) (40)10 - (12)10 using 1's complement method.
B) (13)10 - (45)10 using 2's complement method.
Q2. Minimize the following Boolean expressions:
a) F=AB+AB’C+AB’C’
b) F=(A+B+C)(A+B’+C)(A+B+C’)
Q3. Minimize the following Boolean expressions (Specify the name of theorem used):
a) AB+A’C+BC
b) AB+BC’+AC
c) AB’+BC+AC
d) (A+B)(A’+C)(B+C)
Q4. For the given SOP form for Y’, write the equivalent POS form of Y.
Y’=A’B’C’+A’B’C+A’BC
Then find the minimal POS form for function Y.
Q5. Perform the standard to canonical conversions for the following SOP/POS form
a) Y=A+B’C
b) Y=(A+B+C’)(A’+C)
Q6. Implement the following Boolean function using NAND Gate only.

𝐹𝐹(𝑥𝑥, 𝑦𝑦, 𝑧𝑧) = Σ(1,2,3,4,5,7)


Q7. Simplify the following Boolean function using K-Map:

𝐹𝐹(𝑤𝑤, 𝑥𝑥, 𝑦𝑦, 𝑧𝑧) =


Σ(0,1,2,4,5,6,8,9,12,13,14)
Q8. Implement the following Boolean function F(A, B, C, D), together with don’t
care combination d(A, B, C, D), using not more than two NOR gates.
𝐹𝐹(𝐴𝐴, 𝐵𝐵, 𝐶𝐶, 𝐷𝐷) = Σ(0,1,2,9,11)
𝑑𝑑(𝐴𝐴, 𝐵𝐵, 𝐶𝐶, 𝐷𝐷) = Σ(8,10,14,15)
Assume that both normal and complement inputs are available.
Q.9 Simplify the following function using K-map in terms of SOP and implement using NAND
logic:
F (A, B, C, D) = ∑ m (4, 5, 6, 7, 8, 12) + d (1, 2, 3, 9, 11, 14)

Q10. Minimize the following function using K-map in terms of POS and implement using NOR
logic:
F (A, B, C, D) = ∏ M (1, 4, 5, 6, 7, 8, 12) + d (3, 9, 11, 14)

You might also like