BACHELOR OF SCIENCE DEGREE IN ELECTRICAL ENGINEERING

Power Electronics – ELEC325

Department of Electrical Engineering
Qatar University

Design and Simulation of a Single-Phase Grid-

Connected PWM Voltage Source Inverter

Report by
Hamza Darwish
Mohamed Farag
Karim Massoud
Moamen Megreya

Instructor
Dr.Lazhar Ben-Brahim

Date
05/04/2025
Department of Electrical Engineering Power Electronics – ELEC325

ABSTRACT
The goal of this project is to integrate renewable energy sources into a 230V, 50Hz grid by designing,
modelling, and controlling a single-phase grid-connected Pulse Width Modulation (PWM) Voltage
Source Inverter (VSI). The inverter, which has a 5 kW rating, was made to meet to strict power quality
requirements, such as Total Harmonic Distortion (THD) of less than 5% and a power factor of at least
0.98, as required by IEEE 519. The system was modelled using MATLAB/Simulink and included
proportional-integral (PI) controllers for real and reactive power regulation, a sinusoidal PWM (SPWM)
scheme, and a Phase-Locked Loop (PLL) for synchronization. Through efficient synchronization, power
control, and stability, the simulations verified and guaranteed the inverter's operation under varied grid
situations. By optimizing control parameters, issues like harmonic distortion and synchronization were
resolved. This report details the system design, control strategies, simulation results and conclusions.

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TABLE OF CONTENTS
ABSTRACT .............................................................................................................................................. i

LIST OF FIGURES ..................................................................................................................................iii

LIST OF TABLES ................................................................................................................................... iv

1 Introduction ..................................................................................................................................... 1

1.1 Project Objectives ......................................................................................................................... 1

2 System Design ............................................................................................................................... 1

2.1 Design Specifications ............................................................................................................... 1

2.2 Design Constraints ................................................................................................................... 2

2.3 System Architecture ................................................................................................................. 2

3 Modeling and Control Strategies .................................................................................................... 3

3.1 Subsystem: DC/AC Inverter and Sinusoidal PWM (SPWM) .................................................... 4

3.2 Subsystem: Inductor ................................................................................................................. 5

3.3 Subsystem: Phase-Locked Loop (PLL) .................................................................................... 6

3.3.3 Phase Error Correction using PI Controller: .......................................................................... 7

3.4 Subsystem: Proportional-Integral (PI) Controller ..................................................................... 9

4 Results .......................................................................................................................................... 11

4.1 Under normal operating conditions Case Results .................................................................. 11

4.1 Modified Case Results: .......................................................................................................... 12

5 CONCLUSIONS ........................................................................................................................... 15

REFERENCES ...................................................................................................................................... 16

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LIST OF FIGURES
Figure 1 System Architecture .................................................................................................................. 3

Figure 2 The the relationship betwe

Table 1 Design Specifications ................................................................................................................. 1

Table 2 Inductor’s Value Vs THD ............................................................................................................ 5

en the value of the inductor and the THD ............................................................................................... 5

Figure 3 Apha, Beta Generation ............................................................................................................. 6

Figure 4 PLL ciruit ................................................................................................................................... 7

Figure 5 PLL Response Vs Diffrent values of Kp and Ki ........................................................................ 8

Figure 6 Proportional-Integral (PI) Controller .......................................................................................... 9

Figure 7 Inverter Voltage Vs Grid Voltage ............................................................................................ 11

Figure 8 Grid Voltage Vs Grid current ................................................................................................... 11

Figure 9 Measurment Block Under Normal Operating Conditions........................................................ 12

Figure 10 Grid voltage Vs Grid Current 200Rms Grid .......................................................................... 12

Figure 11 Measurment Block When The Grids Voltage Changed To 200Rms .................................... 13

Figure 12 Grid Voltage Vs Grid Current When Pi Controller Is Supplied With Sin (ωt) ........................ 13

Figure 13 Measurment Block When The Pi Controller Is Supplied With Sin (ωt) ................................. 14

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LIST OF TABLES
Table 1 Design Specifications ................................................................................................................. 1

Table 2 Inductor’s Value Vs THD ............................................................................................................ 5

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1 INTRODUCTION
The increasing adoption of renewable energy sources, such as solar and wind, necessitates
efficient power electronic interfaces to connect these sources to the utility grid. Unlike
traditional synchronous generators, renewable systems rely on Voltage Source Inverters
(VSIs) to convert DC power to grid-compatible AC power. This project designs a single-
phase grid-following VSI to deliver 5 kW of power at 230V RMS and 50 Hz, ensuring
synchronization, power regulation, and compliance with grids tandards.

1.1 Project Objectives

• Developing a DC/AC converter model for efficient power conversion.

• Implementing a PLL for grid synchronization.
• Controlling real and reactive power to maintain grid stability.
• Simulating and analyzing performance under various operating conditions.

2 SYSTEM DESIGN
2.1 Design Specifications

The inverter was designed with the following specifications (Table 1):

Table 1 Design Specifications

Parameter Value

DC Voltage 400 V

Grid Voltage 230 V RMS

Grid Frequency 50 Hz

Interface Inductor 1.2 mH

Switching Frequency 10 kHz

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2.2 Design Constraints

The system adheres to:

• THD: < 5% (IEEE 519 standard).

• Power Factor: ≥ 0.98 for efficient power transfer.

• Synchronization Accuracy: Inverter output in phase with grid voltage.

• Control Response Time: Fast response to grid fluctuations.

• Efficiency: ≥ 95% to minimize losses.

2.3 System Architecture

The system architecture of the single-phase grid-connected SPWM VSI is composed of several
interconnected components, as shown in Figure 1. The main elements include:

• DC/AC converter: An H-bridge topology with four IGBT switches converts the 400 V DC input
into a modulated AC output. The inverter is controlled using SPWM signals.

• Grid: The grid is modeled as a 230 V RMS, 50 Hz AC source.

• Sinusoidal PWM (SPWM): The SPWM block generates switching signals for the inverter by
comparing a 50 Hz sinusoidal reference with a 10 kHz triangular carrier wave. The output
provides gate signals to the IGBTs, ensuring the inverter produces an AC voltage synchronized
with the grid.

• Phase-Locked Loop (PLL): The PLL synchronizes the inverter’s output with the grid by
extracting the grid voltage phase angle. It uses a synchronous reference frame approach,
providing both sine and cosine components of the phase angle for control purposes.

• Proportional-Integral (PI) Controller: The Proportional-Integral (PI) current controller is

responsible for regulating the inverter’s output current to ensure accurate delivery of 5 kW
active power and maintain a power factor of 0.98 or higher when interfacing with the 230 V
RMS, 50 Hz grid

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Figure 1 System Architecture

3 MODELING AND CONTROL STRATEGIES

The system was modeled in MATLAB/Simulink using a modular approach, where each component is
represented as a subsystem. The overall model includes the DC/AC converter, PLL, PI Controller, and
SPWM blocks, interconnected as shown in Figure 1. The model incorporates the following elements:

• H-Bridge Inverter: Simulated using Simulink’s power electronics library, with IGBT switches
and a DC link capacitor.

• Grid Model: A 230 V, 50 Hz AC source with a series impedance to emulate grid conditions.

• Interface Inductor : L = 1.2 mH.

• Control Blocks: PLL, SPWM generator, and PI controllers, each modeled as subsystems.

The following subsections provide detailed descriptions of each subsystem, including their operation,
mathematical models, and equations.

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3.1 Subsystem: DC/AC Inverter and Sinusoidal PWM (SPWM)

This subsystem is responsible for converting the DC voltage (400 V) into an AC voltage suitable for grid
connection. A full-bridge inverter topology is implemented using IGBT switches, which are chosen for
their high efficiency, fast switching, and robustness in medium to high-power applications.

To control the inverter switching, we used Unipolar Sinusoidal Pulse Width Modulation (SPWM) instead
of the conventional bipolar method. In unipolar switching, each leg of the inverter is modulated
separately, allowing the output voltage to switch between three levels (e.g., +Vdc, 0, -Vdc), rather than
just two levels in bipolar SPWM [3].

Why Unipolar SPWM?

• Lower Total Harmonic Distortion (THD): Unipolar switching effectively shifts dominant
harmonics to higher frequencies (multiples of the switching frequency), making them easier to
filter and significantly reducing THD at the fundamental frequency.

• Better Power Quality: The output waveform is smoother, which improves grid compliance and
reduces electromagnetic interference.

• Reduced Filter Size: Because of the lower harmonic content, the filter requirements are
relaxed, which improves system efficiency and reduces cost.

Key Features of the Subsystem:

• IGBT Full-Bridge Topology: Four IGBT switches are used in an H-bridge configuration. Their
gate signals are generated by the control system using unipolar PWM logic.

• DC Input: A constant 400 V input supplies the inverter from a renewable source or a DC link.

• AC Output: The modulated output voltage passes through a filter and is then injected into the
grid at 230 V RMS, 50 Hz.

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3.2 Subsystem: Inductor

To reduce the Total Harmonic Distortion (THD) at the output of the inverter, various
inductor values were tested to evaluate their impact on current waveform quality [3]. The
goal was to achieve a THD below the standard 5% threshold while keeping the inductor as
small as possible to reduce size, cost, and weight.
By experimenting with different inductance values, it was observed that increasing the
inductance led to a noticeable improvement in THD. However, larger inductors come with
drawbacks such as increased physical size and potential response time limitations.
After evaluating several options, a value of 0.0012 H was selected as optimal. It achieves a
THD of 4.29%, which satisfies power quality standards while keeping the inductor relatively
compact and efficient .

Table 2 Inductor’s Value Vs THD

Value of Inductor (H) THD (%)

0.001 5.20

0.0012 4.29

0.0015 3.44

0.002 2.58

0.005 1.00

0.006 0.84

y = 0.0623e-351.3x
THD Vs Inductor R² = 0.9414

6.00%
5.00%
4.00%
THD%

3.00%
2.00%
1.00%
0.00%
0 0.001 0.002 0.003 0.004 0.005 0.006 0.007
Inductor Value

Figure 2 The the relationship between the value of the inductor and
the THD

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3.3 Subsystem: Phase-Locked Loop (PLL)

To ensure proper synchronization between the inverter and the power grid, a Phase-Locked Loop
(PLL) is used. The PLL is responsible for aligning the frequency and phase of the inverter’s output
with that of the grid, which is essential for efficient power transfer, reduced harmonic distortion, and
overall system stability.

In this project, a synchronous reference frame PLL (SRF-PLL) is implemented for a single-phase 50
Hz, 230 V RMS grid. The SRF-PLL is particularly suited for single-phase systems because it allows
accurate phase detection by generating a virtual two-phase (αβ) representation of the input signal.

3.3.1 α-β Signal Generation make this sub:

Since the input is a single-phase sinusoidal voltage (Vgrid), we cannot directly use the Park (dq0)
transformation which requires a two-axis system. To overcome this, we first generate a alpha
component that is 90° phase-shifted from the original grid voltage (beta). This is achieved by using
two cascaded low-pass filters (LPFs).

• Beta (β) = original grid voltage (Vgrid)

• Alpha (α) = phase-shifted version of Vgrid (90° lag), achieved through LPFs

• A gain of 2 is used after the filters to correct for magnitude attenuation introduced by the
filtering process

This αβ pair now acts like a virtual orthogonal set (as if we had a second phase), enabling the use of
the dq0 transformation.

Figure 3 Apha, Beta Generation

3.3.2 dq Transformation and Phase Error Correction :

After generating the α and β signals from the grid voltage, they are passed into the dq0 transformation
block, also called the Park Transform. This block converts the stationary αβ frame into a rotating dq
frame using the estimated phase angle (θ). The purpose of this is to figure out how far off the inverter
is from the grid's actual phase[2].

• The inputs to this block are:

• β (from the grid),
• α (90° shifted version of β),
• and a dummy 0, which is just added because the block expects 3 inputs.

• The outputs of this block are:

• d-axis component: which gives us the voltage aligned with the rotating frame — this is
basically the useful power signal.
• q-axis component (Vq): this tells us how off the phase is. If it’s zero, it means we are in
perfect sync with the grid.
• 0-axis component: not used in single-phase systems, so we ignore it.

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Now, the key part here is the Vq component, which tells us if we are leading or lagging the grid in
terms of phase. Based on its value, the system knows how to correct the inverter’s frequency:

• If Vq > 0, that means the inverter is ahead of the grid → so we slow it down by reducing the
frequency.

• If Vq < 0, it means the inverter is behind → so we speed it up by increasing the frequency.

• This keeps happening until Vq gets close to zero, and once it does, the inverter is considered
locked and synchronized with the grid phase.

This loop is the heart of how the PLL keeps the inverter phase in line with the grid.

Figure 4 PLL ciruit

3.3.3 Phase Error Correction using PI Controller:

Once the q-axis voltage (Vq) is obtained from the dq transformation, it is fed into a Proportional-
Integral (PI) controller. The job of the PI controller is to continuously drive Vq → 0, meaning it adjusts
the inverter’s estimated frequency until the inverter is fully synchronized with the grid phase. In our
design, we selected the gains Kp = 10 and Ki = 50,000. These values were carefully chosen to ensure
fast tracking of the grid signal while maintaining system stability. The proportional gain (Kp) reacts
quickly to the present error (Vq), providing immediate correction, while the integral gain (Ki)
accumulates past errors and eliminates steady-state error by continuously updating the estimated
frequency.

The controller’s output is the estimated frequency deviation (Δω), which is then integrated to generate
the estimated phase angle (θ):
𝑡 𝑡
𝛥𝜔(𝑡) = 𝐾𝑝 ⋅ 𝑉𝑞 (𝑡) + 𝐾𝑖 ∫ 𝑉𝑞 (𝜏)𝑑𝜏 ⇒ 𝜃(𝑡) = ∫ 𝛥 𝜔(𝜏)𝑑𝜏
0 0

This phase angle θ is then used to rotate the αβ signals, forming a feedback loop that keeps the
inverter phase aligned with the grid.

Choosing the right values of Kp and Ki is critical. If Kp is too low, the system responds slowly to
changes in phase, which means delayed synchronization. If Kp is too high, the system may react too
aggressively and cause oscillations or instability. Similarly, increasing Ki helps eliminate long-term
error faster, but if it’s too high, it can also cause overshoot and instability. In our case, the chosen
values lead to a system with a natural frequency of:

𝜔𝑛 = √𝐾𝑝 ⋅ 𝐾𝑖 = √10 ⋅ 50000 = 707 rad/s

and a damping ratio of:

𝐾𝑝 10
𝜁= = ≈ 0.035
2 ⋅ √𝐾𝑝 ⋅ 𝐾𝑖 2 ⋅ √10 ⋅ 50000

This combination gives a fast but controlled dynamic response — the PLL locks quickly without
overshooting or becoming unstable. These values were tested and validated in simulation to offer
optimal performance for our single-phase 50 Hz grid.

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Figure 5 PLL Response Vs Diffrent values of Kp and Ki

Left graph: Increasing Kp makes the response faster, but too high a Kp could cause
oscillation or instability.
Right graph: Increasing Ki also improves response time by reducing steady-state error faster,
but very high Ki may lead to overshoot or slow initial reaction.

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3.4 Subsystem: Proportional-Integral (PI) Controller

3.4.1 Reference Current Generation

Figure 6 illustrates the structure of a current control loop implemented in Simulink to regulate the
output current of a single-phase grid-connected inverter. The main goal of this controller is to ensure
that the inverter supplies 5 kW of active power to a 230 V RMS, 50 Hz grid, while maintaining a
power factor of at least 0.98.The control begins with generating a sinusoidal reference current. A
cosine waveform, cos(ωt), is used because it is in phase with the grid voltage. This ensures that
the inverter injects active power with minimal reactive content.This waveform is multiplied by 30.74,
which represents the peak amplitude of the reference current required to deliver 5 kW at nearly
unity power factor. The calculation is as follows:

𝑃out
𝐼peak = ⋅ √2
𝑉RMS ⋅ cos(𝜃)

Assuming unity power factor (cos(𝜃) = 1):

5000
𝐼peak = ⋅ √2 = 21.74 ⋅ 1.4142 ≈ 31 A
230 ⋅ 1

Figure 6 Proportional-Integral (PI) Controller

3.4.2 PI Controller Block

The measured inverter output current, denoted as [I_NV], is subtracted from the reference current to
calculate the current error. This error indicates how much the actual current deviates from the desired
waveform.The error signal is processed by a Proportional-Integral (PI) controller, which generates the
appropriate control voltage. The PI controller is expressed in the Laplace domain as:
𝐾𝑖
𝐺𝑐 (𝑠) = 𝐾𝑝 +
𝑠
To tune this controller, the inductance 𝐿 and resistance 𝑅 of the filter or grid interface are used. Given:

• 𝐿 = 1.2 × 10−3 H

• 𝑅 = 1 × 10−3 𝛺

• Desired controller time constant: 𝑇 = 200 𝜇𝑠 = 200 × 10−6 s

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Proportional Gain:

𝐿 5 × 10−3
𝐾𝑝 = = =6
𝑇 200 × 10−6
Integral Gain:

𝑅 1 × 10−3
𝐾𝑖 = = =5
𝑇 200 × 10−6

3.4.3 Voltage Scaling and Output

To enhance tracking performance and reduce disturbance sensitivity, the measured grid voltage
[VGRID] is added to the controller output. This feedforward strategy helps the inverter maintain
correct output even when the grid voltage fluctuates. The combined control signal is passed through a
gain block labeled 1/400, which scales the voltage command to match the acceptable input range of
the inverter’s PWM modulation unit.The final output, [Vref], is a voltage reference signal used by the
PWM block to control the switching of the inverter and enforce the desired output current shape and
magnitude.

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4 RESULTS
4.1 Under normal operating conditions Case Results

Figure 7 Inverter Voltage Vs Grid Voltage

The figure shows the output voltage of the inverter plotted against the grid voltage. The close
alignment in both phase and frequency indicates that the PLL has successfully synchronized the
inverter with the grid.

Figure 8 Grid Voltage Vs Grid current

Figure 8 presents the grid voltage and grid current waveforms under nominal operating conditions for
the 5 kW single-phase grid-connected PWM Voltage Source Inverter (VSI). The top subplot displays
the grid voltage, which operates at 230V RMS (peak amplitude ≈325V) and 50 Hz, matching the design
specifications. The bottom subplot shows the grid current, with a peak amplitude of approximately 31A,
5000 √2
consistent with the calculated value required to deliver 5 kW at near-unity power factor 𝐼peak = =
230⋅1
31𝐴.

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Figure 9 Measurment Block Under Normal Operating Conditions

Figure 9 shows the MATLAB/Simulink measurement block results for the 5 kW single-phase grid-
connected PWM VSI under nominal conditions (230V RMS, 50 Hz). The inverter delivers 5018 W
(target: 5 kW), with a reactive power of 1067 VAR. The power factor is 0.9984 (≥0.98), efficiency is
99.92% (≥95%), current THD is 4.291% (<5%), and voltage THD is 0.0005372%, meeting IEEE 519
standards. The in-phase voltage and current confirm PLL synchronization, while the PI controller (Kp=6,
Ki=5) and 1.2 mH inductor ensure low THD and fast response, fulfilling all design specifications: rated
power, power factor, THD, efficiency, synchronization, and control response.

4.1 Modified Case Results:

4.1.1 the grids voltage changed to 200Rms

Graph 1
Figure 10 Grid voltage Vs Grid Current 200Rms Grid

Figure 10 displays the grid voltage and current waveforms for the VSI when the grid voltage is reduced
to 200V RMS (peak ≈282.84V) at 50 Hz, simulating a 13% voltage sag. The grid voltage reflects the
expected amplitude reduction from 325.27V peak (230V RMS) to ≈282.84V peak, while the grid current
is constant at 31A. The voltage and current remain in phase, indicating that the PLL maintains
synchronization and the power factor stays near unity (≥0.98). The feedforward of [VGRID] in the control

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loop enables the inverter to adapt to the voltage sag, ensuring stable operation and compliance with
design specifications under this grid disturbance.

Figure 11 Measurment Block When The Grids Voltage Changed To 200Rms

Figure 11 presents the measurement block results for the VSI under a grid voltage sag to 200V RMS
(peak ≈282.84V) at 50 Hz. The inverter delivers 3088 W, a reduction from the target 5 kW due to the
lower grid voltage, while reactive power is 945.8 VAR. The power factor remains at 0.9984 (≥0.98),
efficiency is 99.87% (≥95%), current THD is 4.534% (<5%), and voltage THD is 0.005284%, meeting
IEEE 519 standards. The reduced power output reflects the fixed reference current (Ipeak=31 A, which
doesn’t adjust to maintain 5 kW at the lower voltage. However, the PI controller, 1.2 mH inductor, and
feedforward of [VGRID] ensure stable operation, low THD, and synchronization (using PLL), fulfilling all
design specifications except the power target, which can be addressed by adjusting the current
reference in future tests.

4.1.2 The Pi controller is supplied with Sin (ωt)

Figure 12 Grid Voltage Vs Grid Current When Pi Controller Is Supplied With Sin (ωt)

Figure 12 shows the grid voltage and current waveforms for the VSI when the reference current is
changed from cos(ωt) to sin(ωt), introducing a 90-degree phase shift. The grid voltage (top subplot)

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remains at 230V RMS (peak ≈325V) and 50 Hz, while the grid current (bottom subplot, peak ≈31A) is
now orthogonal to the voltage, indicating full reactive power injection. This results in near-zero active
power and a power factor of ≈ 0 .The PLL maintains grid synchronization, but the phase mismatch
highlights the need for phase correction to restore active power delivery and meet design specifications.

Figure 13 Measurment Block When The Pi Controller Is Supplied With Sin (ωt)

Figure 13 presents the measurement block results for the 5-kW VSI when the reference current is
changed from cos(ωt) to sin(ωt), causing a 90-degree phase shift. The inverter delivers 315.7 W of real
power (far below the 5 kW target) and 4265 VAR of reactive power, reflecting the orthogonal relationship
between voltage and current. The power factor drops to 0.0878, failing to reach the ≥ 0.98 requirement.
However, efficiency is 98.7% (≥95%), current THD is 4.404% (<5%), and voltage THD is 0.005328%,
meeting IEEE 519 standards. The low THD is maintained by the 1.2 mH inductor and PI controller, but
the phase mismatch significantly reduces active power.

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5 CONCLUSIONS
Throughout this project, we successfully designed and simulated a single-phase grid-
connected PWM inverter with a focus on efficient synchronization using a Phase-Locked Loop
(PLL). We gained valuable experience in understanding dq transformation, tuning PI
controllers, and aligning the inverter’s output with the grid’s phase and frequency. One of the
main challenges we faced was selecting appropriate inductor values to minimize THD without
increasing system size or cost. We also had to carefully tune the PI controller parameters (Kp
and Ki), as poor tuning either slowed down the system or caused instability. By experimenting
with different values and analyzing the system response, we were able to achieve a well-
balanced design with good synchronization and acceptable THD levels. This project gave us
practical insight into control theory, grid integration, and the dynamics of real-world power
systems.

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REFERENCES
[1] An introduction to Buck, Boost, and Buck-Boost converters | RECOM. (n.d.).
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converters-131.html?0

[2] Alpha-Beta-Zero to dq0, dq0 to Alpha-Beta-Zero - Perform transformation from αβ0

stationary reference frame to dq0 rotating reference frame or the inverse - Simulink.
(n.d.).
https://www.mathworks.com/help/sps/powersys/ref/alphabetazerotodq0dq0toalphabeta
zero.html

[3] M. H. Rashid, Power Electronics: Circuits, Devices & Applications, 1st ed. New York,
NY, USA: McGraw-Hill, Jan. 2010.

[4] K. Ogata, Modern Control Engineering, 3rd ed. Upper Saddle River, NJ: Prentice Hall,
1996.

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