Chap 12 Merged
Chap 12 Merged
10. Of the values listed, the most realistic value for open-loop gain of an op-amp is
(a) 1 (b) 2000 (c) 80 dB (d) 100,000
11. A certain op-amp has bias currents of 50 mA and 49.3 mA. The input offset current is
(a) 700 nA (b) 99.3 mA (c) 49.7 mA (d) none of these
12. The output of a particular op-amp increases 8 V in 12 ms. The slew rate is
(a) 96 V/ms (b) 0.67 V/ms (c) 1.5 V/ms (d) none of these
Section 12–3 13. The purpose of offset nulling is to
(a) reduce the gain (b) equalize the input signals
(c) zero the output error voltage (d) answers (b) and (c)
14. The use of negative feedback
(a) reduces the voltage gain of an op-amp (b) makes the op-amp oscillate
(c) makes linear operation possible (d) answers (a) and (c)
Section 12–4 15. For an op-amp with negative feedback, the output is
(a) equal to the input
(b) increased
(c) fed back to the inverting input
(d) fed back to the noninverting input
16. A certain noninverting amplifier has an Ri of 1.0 kÆ and an Rf of 100 kÆ. The closed-loop
gain is
(a) 100,000 (b) 1000 (c) 101 (d) 100
17. If the feedback resistor in Question 16 is open, the voltage gain
(a) increases (b) decreases (c) is not affected (d) depends on Ri
18. A certain inverting amplifier has a closed-loop gain of 25. The op-amp has an open-loop gain
of 100,000. If another op-amp with an open-loop gain of 200,000 is substituted in the configu-
ration, the closed-loop gain
(a) doubles (b) drops to 12.5 (c) remains at 25 (d) increases slightly
19. A voltage-follower
(a) has a gain of 1 (b) is noninverting
(c) has no feedback resistor (d) has all of these
Section 12–5 20. Negative feedback
(a) increases the input and output impedances
(b) increases the input impedance and the bandwidth
(c) decreases the output impedance and the bandwidth
(d) does not affect impedances or bandwidth
Section 12–6 21. Bias current compensation
(a) reduces gain (b) reduces output error voltage
(c) increases bandwidth (d) has no effect
Section 12–7 22. The midrange open-loop gain of an op-amp
(a) extends from the lower critical frequency to the upper critical frequency
(b) extends from 0 Hz to the upper critical frequency
(c) rolls off at 20 dB/decade beginning at 0 Hz
(d) answers (b) and (c)
23. The frequency at which the open-loop gain is equal to 1 is called
(a) the upper critical frequency (b) the cutoff frequency
(c) the notch frequency (d) the unity-gain frequency
24. Phase shift through an op-amp is caused by
(a) the internal RC circuits (b) the external RC circuits
(c) the gain roll-off (d) negative feedback
656 ◆ T HE O PERATIONAL A MPLIFIER
PROBLEMS Answers to all odd-numbered problems are at the end of the book.
BASIC PROBLEMS
Vin1
– – –
+ + +
Vin
Vin Vin2
FIGURE 12–60
710 ◆ B ASIC O P -A MP C IRCUITS
3. If the zener diodes in Figure 13–13 are changed to ones with a rating of 5.6 V, the output volt-
age amplitude will
(a) increase (b) decrease (c) not change
4. If the top resistor in Figure 13–22 opens, the output voltage will
(a) increase (b) decrease (c) not change
5. If VIN2 is changed to -1 V in Figure 13–22, the output voltage will
(a) increase (b) decrease (c) not change
6. If VIN1 is increased to 0.4 V and VIN2 is reduced to 0.3 V in Figure 13–23, the output voltage
will
(a) increase (b) decrease (c) not change
7. If VIN3 is changed to -7 V in Figure 13–24, the output voltage will
(a) increase (b) decrease (c) not change
8. If Rf in Figure 13–25 opens, the output voltage will
(a) increase (b) decrease (c) not change
9. If the value of C in Figure 13–35 is reduced, the frequency of the output waveform will
(a) increase (b) decrease (c) not change
10. If the frequency of the input waveform in Figure 13–40 is increased, the amplitude of the
output voltage will
(a) increase (b) decrease (c) not change
9. If the voltage gain for each input of a summing amplifier with a 4.7 kÆ feedback resistor is
unity, the input resistors must have a value of
(a) 4.7 kÆ
(b) 4.7 kÆ divided by the number of inputs
(c) 4.7 kÆ times the number of inputs
10. An averaging amplifier has five inputs. The ratio Rf /Ri must be
(a) 5 (b) 0.2 (c) 1
11. In a scaling adder, the input resistors are
(a) all the same value (b) all of different values
(c) each proportional to the weight of its input (d) related by a factor of two
Section 13–3 12. In an ideal integrator, the feedback element is a
(a) resistor (b) capacitor (c) zener diode (d) voltage divider
13. For a step input, the output of an integrator is
(a) a pulse (b) a triangular waveform (c) a spike (d) a ramp
14. The rate of change of an integrator’s output voltage in response to a step input is set by
(a) the RC time constant (b) the amplitude of the step input
(c) the current through the capacitor (d) all of these
15. In a differentiator, the feedback element is a
(a) resistor (b) capacitor (c) zener diode (d) voltage divider
16. The output of a differentiator is proportional to
(a) the RC time constant (b) the rate at which the input is changing
(c) the amplitude of the input (d) answers (a) and (b)
17. When you apply a triangular waveform to the input of a differentiator, the output is
(a) a dc level (b) an inverted triangular waveform
(c) a square waveform (d) the first harmonic of the triangular waveform
PROBLEMS Answers to all odd-numbered problems are at the end of the book.
BASIC PROBLEMS
Section 13–1 Comparators
1. A certain op-amp has an open-loop gain of 80,000. The maximum saturated output levels of
this particular device are ;12 V when the dc supply voltages are ;15 V. If a differential
voltage of 0.15 mV rms is applied between the inputs, what is the peak-to-peak value of the
output?
2. Determine the output level (maximum positive or maximum negative) for each comparator in
Figure 13–60.
+1 V – – +7 V –
VOUT VOUT VOUT
+ +2 V + + +
5V
–
䊱 FIG UR E 1 3 –60
756 ◆ S PECIAL -P URPOSE O P -A MP C IRCUITS
7. If the value of R1 in Figure 16–32 is decreased, the peak value of the sawtooth output will
(a) increase (b) decrease (c) not change
8. If the diode in Figure 16–40 opens, the duty cycle will
(a) increase (b) decrease (c) not change
Section 16–6 14. Which one of the following is not an input or output of the 555 timer?
(a) Threshold (b) Control voltage (c) Clock
(d) Trigger (e) Discharge (f) Reset
D1 D2
6.8 V 6.8 V
R3
R1 47 k⍀
100 k⍀
–
Vout
+
R2
C1 R4
0.015 μ F 1.0 k⍀
R5 C2
1.0 k⍀ 0.015 μ F
䊱 FIGURE 16– 5 7
9. For the Wien-bridge oscillator in Figure 16–58, calculate the setting for Rf, assuming the inter-
nal drain-source resistance, r¿ds, of the JFET is 350 Æ when oscillations are stable.
10. Find the frequency of oscillation for the Wien-bridge oscillator in Figure 16–58.