Chapter 2- Boolean Algebra

1)​ Boolean Algebra :

Boolean algebra is a mathematical structure used to perform operations on binary values (0 and 1). It
forms the basis of digital electronics and logic circuits.

2)​ Postulates of Boolean Algebra

Boolean Algebra is governed by a set of fundamental postulates (or axioms) proposed by George Boole,
which form the basis for all logic operations. These postulates define how Boolean variables behave
under logical operations.

Let’s denote Boolean variables as A, B, C, etc., which can take values 0 (false) or 1 (true). The basic
operations are:

●​ Logical OR (+)​

●​ Logical AND (·)​

●​ Logical NOT (')

Postulates of Boolean Algebra (Based on Huntington Postulates)

1. Closure Postulate

For every pair of elements A and B in the Boolean set {0, 1}:

●​ A + B is also in the set.​

●​ A · B is also in the set.

➡️ The results of OR and AND are always either 0 or 1.

2. Identity Postulate

There exist identity elements for each operation:

●​ A + 0 = A (0 is the identity for OR)​

A · 1 = A (1 is the identity for AND)​

3. Commutative Postulate
The order of variables does not affect the result:

●​ A + B = B + A​

●​ A · B = B · A​

4. Distributive Postulate

Distributive laws hold for both operations:

●​ A · (B + C) = (A · B) + (A · C)​

●​ A + (B · C) = (A + B) · (A + C)

5. Complement Postulate

For every Boolean variable A, there exists a complement A′ (NOT A), such that:

●​ A + A′ = 1​

●​ A · A′ = 0

6. Duality Postulate

Every algebraic expression remains valid if:

●​ Replace + with ·​

●​ Replace · with +​

●​ Replace 0 with 1​

●​ Replace 1 with 0

This is known as the Principle of Duality.

Original Expression Dual Expression

A+0=A A·1=A

A + A′ = 1 A · A′ = 0

A · (B + C) = A·B + A·C A + (B·C) = (A + B) · (A + C)

7. Existence of at least two elements

There exist at least two elements in the Boolean system, typically denoted as:

●​ 0 (false)​

●​ 1 (true)

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3)​ Basic Boolean Laws:

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4)​ Logic Gates :

Logic gates are the fundamental building blocks in digital electronics. There are basically 7 types of logic
gates that are used to perform various logical operations in digital systems.

Types:

1. AND Gate

●​ Function: Performs logical multiplication.

●​ Output: HIGH (1) only when all inputs are HIGH (1).
●​ Boolean Expression: X = A · B
 Properties:

●​ Can accept two or more inputs.

●​ Output is 1 only when all inputs are 1.

2. OR Gate

●​ Function: Performs logical addition.

●​ Output: HIGH (1) if any input is HIGH (1).
●​ Boolean Expression: X = A + B

Properties:

●​ Can accept two or more inputs.

●​ Output is 0 only when all inputs are 0.
3. NOT Gate

●​ Function: Inverts the input (also called an inverter).

●​ Output: If input is 0, output is 1 and vice versa.
●​ Boolean Expression: Y = A′ or Y = ¯A

Properties:

●​ Has only one input and one output.

●​ Output is the complement of input.

4. NOR Gate

●​ Function: Performs the OR operation followed by NOT (i.e., inverted OR).

●​ Output: HIGH (1) only when all inputs are LOW (0).
●​ Boolean Expression: O = (A + B)′

Properties:

●​ Can accept two or more inputs.

●​ Output is 1 only when all inputs are 0.
5. NAND Gate

●​ Function: Performs the AND operation followed by NOT (i.e., inverted AND).
●​ Output: LOW (0) only when all inputs are HIGH (1).
●​ Boolean Expression: X = (A · B)′

Properties:

●​ Can accept two or more inputs.

●​ Output is 0 only when all inputs are 1.
6. XOR Gate (Exclusive OR)

●​ Function: Outputs HIGH (1) only when inputs are different.

●​ Boolean Expression: X = A′B + AB′

Properties:

●​ Accepts only two inputs.

●​ Output is 1 when inputs differ.

7. XNOR Gate (Exclusive NOR)

●​ Function: Outputs HIGH (1) when inputs are the same.

●​ Boolean Expression: Y = A ⊙ B = AB + A′B′ = (A ⊕ B)′

Properties:

●​ Accepts only two inputs.

●​ Output is 1 when inputs are equal (both 0 or both 1).
****Why NAND and NOR Gates Are Called Universal Gates

Universal gates are logic gates that can be used to implement any Boolean function or
logic gate (like AND, OR, NOT, XOR, etc.) using only that gate type.​
NAND and NOR gates are called universal gates because:

●​ You can build all other basic logic gates (NOT, AND, OR) using just NAND or
just NOR gates.​

●​ They simplify digital circuit design by reducing the number of components.​

Proof: NAND Gate as a Universal Gate

1. NOT Gate using NAND

Logic: Connect both inputs of a NAND gate to the same input (A).

2. AND Gate using NAND

Logic: Apply NAND, then invert the result using NAND-as-NOT.

​ ​

3. OR Gate using NAND

Logic: Use De Morgan's Law:​

A+B=(A′⋅B′)′A + B = (A' \cdot B')'A+B=(A′⋅B′)′

●​ Step 1: Get A' and B' using NAND-as-NOT.​

●​ Step 2: Input A' and B' into a NAND gate.

Proof: NOR Gate as a Universal Gate

1. NOT Gate using NOR

Logic: Connect both inputs of a NOR gate to the same input (A).
 ●​

2. OR Gate using NOR

Logic: Use NOR, then invert the output.

●​ Step 1: NOR = (A + B)'​

●​ Step 2: NOT of above = ((A + B)')' = A + B

 3. AND Gate using NOR

***Implement XOR using NAND gate:

***Implement XOR using NOR gate:

***Implement XNOR using NAND gate:

***Implement XNOR using NOR gate:

***De Morgan’s Theorem:

1. SOP (Sum of Products)

●​ Definition: It is a boolean expression consisting of the sum (OR) of multiple product

(AND) terms.​

●​ Example:

●​ Truth Table Representation: SOP corresponds to rows where output is 1.​

 ●​ Minterm: A product term that includes all variables (either complemented or not)
exactly once.

2. POS (Product of Sums)

●​ Definition: It is a boolean expression consisting of the product (AND) of multiple sum

(OR) terms.​

●​ Example:​
F = (X + Y + Z) . (X + Y + Z') . (X + Y' + Z') This is the canonical POS
form.​

●​ Truth Table Representation: POS corresponds to rows where output is 0.​

●​ Maxterm: A sum term that includes all variables, representing a 0 output row.​

●​
Canonical and Standard Forms of SOP & POS

🔹 1. Canonical Form
●​ Definition: A Boolean expression is in canonical form when each term includes all the
variables (either complemented or uncomplemented).

🟢 Canonical SOP (Sum of Products)

●​ Expression is a sum (OR) of minterms.​

●​ Each minterm is a product (AND) of all input variables in either true or complemented
form.​

●​ Corresponds to rows where output = 1 in the truth table.​

Example:

🔴 Canonical POS (Product of Sums)

●​ Expression is a product (AND) of maxterms.​

●​ Each maxterm is a sum (OR) of all input variables, in either true or complemented
form.​
 ●​ Corresponds to rows where output = 0 in the truth table.​

🔹 2. Standard Form
●​ In standard form, terms may not include all variables, and are not necessarily
complete minterms or maxterms.​

🟢 Standard SOP
●​ Product terms can have one or more variables, but not necessarily all.

🔴 Standard POS
●​ Sum terms can have one or more variables, but not all.​
🔁 Conversion to Canonical Form
To convert standard SOP to canonical SOP:

●​ Expand each term by multiplying with missing variables in both complemented and
uncomplemented form.​

*** Boolean expression Simplification using Laws :

​

**** K map
Karnaugh Maps for Four Input Functions

° Represent functions of 4 inputs with 16 minterms

° Use same rules developed for 3-input functions
° Note bracketed sections shown in example.
Karnaugh map: 4-variable example

° F(A,B,C,D) = m(0,2,3,5,6,7,8,10,11,14,15)
F=
C + A’BD + B’D’

A 1111
0111
1 0 0 1

0 1 0 0
D
C
1 1 1 1 D
A
C 1000
1 1 1 1 0000 B
B

Solution set can be considered as a coordinate

System!
 Design examples

A A A
0 0 0 0 1 0 0 0 0 1 1 1

1 0 0 0 0 1 0 0 0 0 1 1
D D D
1 1 0 1 0 0 1 0 0 0 0 0
C C C
1 1 0 0 0 0 0 1 0 0 1 0
B B B

K-map for LT K-map for EQ K-map for GT

LT = A' B' D + A' C + B' C D

EQ = A'B'C'D' + A'BC'D + ABCD + AB'CD’
GT = B C' D' + A C' + A B D'

Can you draw the truth table for these examples?

Physical Implementation

° Step 1: Truth table

A B C D
° Step 2: K-map
° Step 3: Minimized sum-of-
products
° Step 4: Physical
EQ implementation with gates
A
1 0 0 0

0 1 0 0
D
0 0 1 0
C
0 0 0 1
B

K-map for EQ
 Karnaugh Maps
° Four variable maps.
CD
00 01 11 10
AB
00 0 0 0 1 F=ABC +ACD +ABC
01 1 1 0 1 +AB CD +ABC +AB C
11 1 1 1 1 F=BC +CD + AC+ AD 
10 1 0 1 1
° Need to make sure all 1’s are covered
° Try to minimize total product terms.
° Design could be implemented using NANDs and NORs
 Karnaugh maps: Don’t cares

° In some cases, outputs are undefined

° We “don’t care” if the logic produces a 0 or a 1
° This knowledge can be used to simplify functions.

A
AB
CD 00 01 11 10
00 0 0 X 0 - Treat X’s like either 1’s or 0’s
- Very useful
01 1 1 X 1
D - OK to leave some X’s uncovered
11 1 1 0 0
C
10 0 X 0 0

B
 Karnaugh maps: Don’t cares
° f(A,B,C,D) = m(1,3,5,7,9) + d(6,12,13)
• without don't cares
- f=
A B C D f
0 0 0 0 0
A’D + C’D
0 0 0 1 1
0 0 1 0 0
A 0 0 1 1 1
AB 0 1 0 0 0
CD 00 01 11 10 0 1 0 1 1
00 0 0 X 0 0 1 1 0 X
+
0 +
1 1 1 1
01 1 1 X 1 1 0 0 0 0
D 1 0 0 1 1
11 1 1 0 0 1 0 1 0 0
C 1 0 1 1 0
10 0 X 0 0 1 1 0 0 X
1 1 0 1 X
B 1 1 1 0 0
1 1 1 1 0
Don’t Care Conditions

° In some situations, we don’t care about the value of a

function for certain combinations of the variables.
• these combinations may be impossible in certain contexts
• or the value of the function may not matter in when the combinations occur

° In such situations we say the function is incompletely

specified and there are multiple (completely specified) logic
functions that can be used in the design.
• so we can select a function that gives the simplest circuit

° When constructing the terms in the simplification

procedure, we can choose to either cover or not cover the
don’t care conditions.
Map Simplification with Don’t Cares

CD
00 01 11 10
AB
00 0 1 0 0
01 x x x 1 F=ACD+B+AC
11 1 1 1 x
10 x 0 1 1
° Alternative covering.
CD
00 01 11 10
AB
00 0 1 0 0
01 x x x 1 F=ABCD+ABC+BC+AC
11 1 1 1 x
10 x 0 1 1
Karnaugh maps: don’t cares (cont’d)

° f(A,B,C,D) = m(1,3,5,7,9) + d(6,12,13)

• f = A'D + B'C'D without don't cares
• f= with don't cares

A'D+ C'D

A
by using don't care as a "1"
0 0 X 0 a 2-cube can be formed
1 1 X 1
rather than a 1-cube to cover
D this node
1 1 0 0
C don't cares can be treated as
0 X 0 0 1s or 0s
B depending on which is more
advantageous
 Definition of terms for two-level simplification

° Implicant
• Single product term of the ON-set (terms that create a logic 1)

° Prime implicant
• Implicant that can't be combined with another to form an implicant with
fewer literals.

° Essential prime implicant

• Prime implicant is essential if it alone covers a minterm in the K-map
• Remember that all squares marked with 1 must be covered

° Objective:
• Grow implicant into prime implicants (minimize literals per term)
• Cover the K-map with as few prime implicants as possible
(minimize number of product terms)
Examples to illustrate terms

A
0 X 1 0 6 prime implicants:
A'B'D, BC', AC, A'C'D, AB, B'CD
1 1 1 0
D
essential
1 0 1 1
C
0 0 1 1 minimum cover: AC + BC' +
B A'B'D

A
5 prime implicants: 0 0 1 0
BD, ABC', ACD, A'BC, A'C'D
1 1 1 0
D
essential 0 1 1 1
C
0 1 0 0
minimum cover: 4 essential implicants
B
Prime Implicants

Any single 1 or group of 1s in the Karnaugh map of a

function F is an implicant of F.
A product term is called a prime implicant of F if it
cannot be combined with another term to eliminate a
variable. If a function F is represented by
A this Karnaugh Map. Which of the
following terms are implicants of
Example: 1 1 1 F, and which ones are prime
implicants of F?
1 1
D (a) AC’D’ Implicants:
1 (b) BD (a),(c),(d),(e)
C
1 1 (c) A’B’C’D’
(d) AC’ Prime Implicants:
(e) B’C’D’ (d),(e)
B
 Essential Prime Implicants
A product term is an essential prime implicant if
there is a minterm that is only covered by that
prime implicant.
- The minimal sum-of-products form of F must include
all the essential prime implicants of F.
 Summary

° K-maps of four literals considered

• Larger examples exist
° Don’t care conditions help minimize functions
• Output for don’t cares are undefined
° Result of minimization is minimal sum-of-products
° Result contains prime implicants
° Essential prime implicants are required in the
implementation