5 4 3 2 1

WD-2 AMD Logic Schematics

eleTro-X Technical
1.TITLE PAGE 36.USB TYPE-C CONNECTOR 71.DC/DC VCC5M/VCC3M (TPS71285B-1)
2.EC HISTORY 37.HDMI CONNECTOR 72.DC/DC IMVP8 (NCP81218)
D
3.CPU(1/16) : DDI/EDP 38.STORAGE I/F REDRIVER 73.DC/DC CPUCORE(NCP302035) D

4.CPU(2/16) : DDR CHANNEL-A 39.SATA EXPRESS CONNECTOR 74.DC/DC VCCGFXCORE_I(NCP302035)

5.CPU(3/16) : DDR CHANNEL-B 40.USB POWER/CONN 75.DC/DC VCCSA(NCP302035)
6.CPU(4/16) : MISC/JTAG 41.GBE JACKSONVILLE 76.BLANK
7.CPU(5/16) : LPC/SPI/SMBUS/C-LINK 42.GBE LAN SWITCH 77.BLANK
8.CPU(6/16) : LPSS/ISH 43.GBE MAGNETICS 78.DC/DC VCC1R0_SUS(TPS51367RV)
9.CPU(7/16) : AUDIO/SDXC 44.RJ45 CONNECTOR 79.LOAD SW VCCST & VCCSTG

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10.CPU(8/16) : PCIE/USB/SATA 45.M.2 SOCKET 1 MODULE I/F 80.DC/DC VCC1R2A/0R6B/2R5A(NB687)
11.CPU(9/16) : CSI-2/EMMC 46.M.2 SOCKET 2 MODULE I/F 81.BLANK
12.CPU(10/16) : CLOCK SIGNALS 47.MEDIA CARD CONTROLLER 82.BLANK
13.CPU(11/16) : SYSTEM PM 48.MEDIA CARD INTERFACE 83.DC/DC VCC1R8_SUS(BU90104GWZ)

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14.CPU(12/16) : CPU POWER (1/2) 49.AUDIO ALC3267-CG 84.BLANK

15.CPU(13/16) : CPU POWER (2/2) 50.AUDIO CONNECTOR 85.BLANK
16.CPU(14/16) : PCH POWER 51.BLANK 86.BLANK

-X
17.CPU(15/16) : GND 52.AUDIO EXT MIC I/F 87.LOAD SW PCH SUS/TRACK POINT
18.CPU(16/16) : CFG/RESERVED 53.AUDIO SPEAKER 88.LOAD SW LAN
19.XDP CONNECTOR 54.AUDIO BEEP 89.LOAD SW B

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20.RTC BATTERY 55.MEC1653(1/3) 90.LOAD SW WWAN & WLAN
21.SPI FLASH 56.MEC1653(2/3) 91.SCREW
22.DDR4 SO DIMM CHANNEL-A (1/2) 57.MEC1653(3/3) 92.N17S-G1 (1/6) : PEG I/F

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23.DDR4 SO DIMM CHANNEL-A (2/2) 58.KEYBOARD/TRACK POINT 93.N17S-G1 (2/6) : VRAM I/F
B
24.DDR4 SO DIMM CHANNEL-B (1/2) 59.TOUCH PAD/NFC/FPR/SCR 94.N17S-G1 (3/6) : POWER 1 B

25.DDR4 SO DIMM CHANNEL-B (2/2) 60.BLANK 95.N17S-G1 (4/6) : POWER 2

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26.LCD/LID/MIC/CAMERA/PWR SW 61.FAN CONNECTOR 96.N17S-G1 (5/6) : GND
27.BLANK 62.APS G-SENSOR 97.N17S-G1 (6/6) : GPIO / XTAL

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28.DDI DEMULTIPLEXER 63.DISCRETE TPM 2.0 98.VRAM CHANNEL-A
29.USB TYPE-C SWITCH 64.SMBUS SWITCH/LPC DEBUG PORT 99.MEMORY TERMINATION
30.BLANK 65.THINK ENGINE-2(1/2) 100.DC/DC VCC1R0VIDEO(BD9B304QWZ)

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31.ALPINE RIDGE (1/2) 66.THINK ENGINE-2(2/2) 101.DC/DC VCCGFXCORE_D(NCP81278T)
32.ALPINE RIDGE (2/2) 67.DC-IN 102.DC/DC VCC1R35VIDEO(NB693)
33.USB PD CONTROLLER(1/2) 68.BATTERY INPUT 103.DC/DC VCC1R8VIDEO_AON(BD9B304QWZ)
A
34.USB PD CONTROLLER(1/2) 69.BATTERY CHARGER(BQ25700A) 104.LOAD SW VIDEO A

35.DOCKING CONNECTOR 70.CHARGER SELECTOR

eleTro-X Technical Security Classification

Issued Date 2015/11/02
LC Future Center Secret Data
Deciphered Date 2015/8/10
Title
TITLE PAGE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 1 of 66
5 4 3 2 1
 5 4 3 2 1

TABLE: Chip Capacitor Thermal Characteristics

DDR4 / 1.2V
LCD CONN
Code eleTro-X Technical
eDP 14" DP0x2
Channel A DDR4
-55 to 150degC +/-30ppm/degC NPO
HD/FHD AMD Raven Ridge DDR4 SO-DIMMA -55 to 125degC +/-30ppm/degC C0G
26
22,23
-55 to 125degC +/-15% X7R
D
HDMI 2.0 Re-timer TMDS -55 to 105degC +/-22% X6S D
Connector Parade PS8409A Channel B DDR4 -55 to 85degC +/-15% X5R
29 28
DDR4 SO-DIMMB
Antenna Antenna
USB Type-C Conn USB&DP repeater 24,25
USBC0
Full function type C TI TUSB1044
36 31

APU HDT (M.2 WLAN Card) (M.2 WWAN Card)

6

PD Controller Bluetooth 45 46
I2C
TPS65988ABRJTR
33
Type-A M.2 Card Type-B M.2 Card

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Side Dock(CS18) SD Micro SIM
USB Type-C Conn USB&DP repeater Card Slot 48
TI TUSB1044
USBC1 USB USB Card Slot
Full function type C 46
32 HUB1 HUB2
35
USB 3.1 repeater Multi-Media Controller GPP2:3 X2
USB 3.1 Gen 2 Parade USB3 Port 1
GPP0 X1
AOU (USB1) Bayhub
40 PS8801 OZ711LV1LN
37

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C C
USB 3.1 repeater GPP4 X1
USB 3.1 Gen 2 Parade
GPP6:7 X2
USB3 Port 2 HDD CONN
CONN (USB2) PS8801 10 GPP[0:7] Re-Driver 38
40 37 SSD 39

USB Type-C Conn GPP1 X1 GPP5 X1

USB2.0 port0 HDA
Full function type C36 USB2.0 X6

-X
USB 3.1 Gen 2 SPI Flash
AOU (USB1) USB2.0 port1 LAN Chip
40
128Mbits ALC3287-CG LAN Chip
(SPI1) 8 HDA CODEC RTL8111EPV-CG RTL8111GUL
USB 3.1 Gen 2 3,4,5,6,7,8,9,10,11,12 49 W/DASH 41
W/O DASH 41
W25Q64FWSSIQ_SO8
CONN (USB2) 40 USB2.0 port2

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Side Dock (CS18) RTC Battery 14 Stereo
full function type-C33 USB2.0 port3 Speaker
53
Side Dock MAGNETICS
USB2.0 TPM 2.0 Internal (CS18) RJ45
Fingerprint 59
USB2.0 HUB2 P1 FA N Mic 35 43,44
61 63
GL852G-OHY50
USB2.0 Hub2

Microphone 26

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USB2.0 Headphone
USB2.0 HUB2 P2 G-Sensor
2D Camera 26 62 50
KX022-1020
USB2.0 port4
B B
USB2.0 USB2.0 HUB2 P3
M.2 WWAN Slot 46
Thermal SM Bus
USB2.0 Sensor Embedded

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USB2.0 HUB2 P4 54
Smart Card 59 F75303M Controller
IT8186VG-192/BX TABLE: Chip Part Dimension
LED for ThinkPad Logos Audio 50
USB2.0 55,56,57 Combo Jack Size [mm] mm Size Code Inch Size Code
USB2.0 HUB1 P1
IR Camera 26

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GL852G-OHY50
USB2.0 Hub1

SM Bus TABLE: Chip Capacitor Tolerance 0.40 x 0.20 0402 01005

USB2.0 45 0.60 x 0.30 0603 0201
USB2.0 HUB1 P2
M.2 WLAN Slot (BT) 1.00 x 0.50 1005 0402
USB2.0 port5 Tolerance Code 1.60 x 0.80 1608 0603
External Connector/Socket 2.00 x 1.25 2125 0805
USB2.0 USB2.0 HUB1 P3 2.00 x 1.60 2016 0806
Touch Panel 26 Keyboard Power Button +/-0.25pF C
2520 1008
ClickPad Internal Connector/Socket +/-0.5pF D 2.50 x 2.00

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3.20 x 1.60 3216 1206
59 58 26 3225 1210
3.20 x 2.50
+/-5% J 4.50 x 1.60 4516 1806
+/-10% K 4.50 x 2.50 4525 1810
+/-20% M 4.50 x 3.20 4532 1812
+80/-20% Z 5.00 x 2.50 5025 2010
6.40 x 3.20 6432 2512

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 BLOCK DIAGRAM

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 2 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D
UC1B
PCIE

N1 P8
N3 P_GFX_TXP0 P_GFX_RXP0 P9
P_GFX_TXN0 P_GFX_RXN0
M2 N6
M4 P_GFX_TXP1 P_GFX_RXP1 N7
P_GFX_TXN1 P_GFX_RXN1
L2 M8
L4 P_GFX_TXP2 P_GFX_RXP2 M9
P_GFX_TXN2 P_GFX_RXN2
L1 L6
L3 P_GFX_TXP3 P_GFX_RXP3 L7
P_GFX_TXN3 P_GFX_RXN3
K2 K11
K4 P_GFX_TXP4 P_GFX_RXP4 J11
P_GFX_TXN4 P_GFX_RXN4
J2 H6
J4 P_GFX_TXP5 P_GFX_RXP5 H7
P_GFX_TXN5 P_GFX_RXN5

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H1 G6
H3 P_GFX_TXP6 P_GFX_RXP6 F7
P_GFX_TXN6 P_GFX_RXN6
H2 G8
H4 P_GFX_TXP7 P_GFX_RXP7 F8
P_GFX_TXN7 P_GFX_RXN7

CC8794 2 1 0.1U_0201_6.3V6-K GPP_WLAN_TXP_C N2 N10

C 35 GPP_WLAN_TXP GPP_WLAN_TXN_C P_GPP_TXP0 P_GPP_RXP0 GPP_WLAN_RXP 35 C
WLAN CC8795 2 1 0.1U_0201_6.3V6-K P3 N9 WLAN
35 GPP_WLAN_TXN P_GPP_TXN0 P_GPP_RXN0 GPP_WLAN_RXN 35

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CC8796 2 1 0.1U_0201_6.3V6-K GPP_LAN_TXP_C P4 L10
32 GPP_LAN_TXP GPP_LAN_TXN_C P_GPP_TXP1 P_GPP_RXP1 GPP_LAN_RXP 32
DOCK LAN W/ DASH CC8797 2 1 0.1U_0201_6.3V6-K P2 L9 DOCK LAN W/ DASH
32 GPP_LAN_TXN P_GPP_TXN1 P_GPP_RXN1 GPP_LAN_RXN 32
CC8798 2 1 0.22U_0201_6.3V6-K GPP_WWAN_TXP0_C R3 L12
36 GPP_WWAN_TXP0 GPP_WWAN_TXN0_C P_GPP_TXP2 P_GPP_RXP2 GPP_WWAN_RXP0 36
CC8799 2 1 0.22U_0201_6.3V6-K R1 M11
36 GPP_WWAN_TXN0 P_GPP_TXN2 P_GPP_RXN2 GPP_WWAN_RXN0 36
WWAN/2nd SSD GPP_WWAN_TXP1_C WWAN/2nd SSD
CC8800 2 1 0.22U_0201_6.3V6-K T4 P12
36 GPP_WWAN_TXP1 GPP_WWAN_TXN1_C P_GPP_TXP3 P_GPP_RXP3 GPP_WWAN_RXP1 36
CC8801 2 1 0.22U_0201_6.3V6-K T2 P11
36 GPP_WWAN_TXN1 P_GPP_TXN3 P_GPP_RXN3 GPP_WWAN_RXN1 36

CC8791 2 1 0.1U_0201_6.3V6-K GPP_CR_TXP1_C W2 V6

-X
37 GPP_CR_TXP1 GPP_CR_TXN1_C P_GPP_TXP4 P_GPP_RXP4 GPP_CR_RXP1 37
CR CC8790 2 1 0.1U_0201_6.3V6-K W4 V7 CR
37 GPP_CR_TXN1 P_GPP_TXN4 P_GPP_RXN4 GPP_CR_RXN1 37
CC8792 2 1 0.1U_0201_6.3V6-K GPP_SYS_LAN_TXP_C W3 T8
31 GPP_SYS_LAN_TXP GPP_SYS_LAN_TXN_C P_GPP_TXP5 P_GPP_RXP5 GPP_SYS_LAN_RXP 31
SYS LAN W/O DASH CC8793 2 1 0.1U_0201_6.3V6-K V2 T9 SYS LAN W/O DASH
31 GPP_SYS_LAN_TXN P_GPP_TXN5 P_GPP_RXN5 GPP_SYS_LAN_RXN 31
V1 R6
28 GPP_SSD_TXP0 P_GPP_TXP6/SATA_TXP0 P_GPP_RXP6/SATA_RXP0 GPP_SSD_RXP0 28
V3 R7
28 GPP_SSD_TXN0 P_GPP_TXN6/SATA_TXN0 P_GPP_RXN6/SATA_RXN0 GPP_SSD_RXN0 28
SSD/HDD SSD/HDD
U2 R9

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28 GPP_SSD_TXP1 P_GPP_TXP7/SATA_TXP1 P_GPP_RXP7/SATA_RXP1 GPP_SSD_RXP1 28
U4 R10
28 GPP_SSD_TXN1 P_GPP_TXN7/SATA_TXN1 P_GPP_RXN7/SATA_RXN1 GPP_SSD_RXN1 28

FP5 REV 0.90

PART 2 OF 13

AMD-RAVEN-FP5_BGA1140
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B B

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A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 PCIE/SATA I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 3 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

UC1A

DDR_A_MA0
MEMORY A
eleTro-X Technical
AF25
DDR_A_MA1 AE23 MA_ADD0/MAB_CS0 J21 DDR_A_D0
DDR_A_MA2 MA_ADD1/RSVD MA_DATA0/MAA_DATA8 DDR_A_D1 DDRA_MA_DM[0..7] 16
AD27 H21
DDR_A_MA3 AE21 MA_ADD2/RSVD MA_DATA1/MAA_DATA9 F23 DDR_A_D2
DDR_A_MA4 MA_ADD3/RSVD MA_DATA2/MAA_DATA13 DDR_A_D3 DDR_A_DQS#[0..7] 16
AC24 H23
DDR_A_MA5 AC26 MA_ADD4/RSVD MA_DATA3/MAA_DATA12 G20 DDR_A_D4
D DDR_A_MA6 MA_ADD5/RSVD MA_DATA4/MAA_DATA11 DDR_A_D5 DDR_A_DQS[0..7] 16 D
AD21 F20
DDR_A_MA7 AC27 MA_ADD6/RSVD MA_DATA5/MAA_DATA10 J22 DDR_A_D6
DDR_A_MA8 MA_ADD7/MAA_CA3 MA_DATA6/MAA_DATA15 DDR_A_D7 DDR_A_D[0..63] 16
AD22 J23
DDR_A_MA9 AC21 MA_ADD8/MAA_CA4 MA_DATA7/MAA_DATA14
DDR_A_MA10 MA_ADD9/MAA_CKE1 DDR_A_D8 DDR_A_MA[0..13] 16
AF22 G25
DDR_A_MA11 AA24 MA_ADD10/MAB_CKE0 MA_DATA8/MAA_DATA0 F26 DDR_A_D9
DDR_A_MA12 AC23 MA_ADD11/MAA_CA5 MA_DATA9/MAA_DATA1 L24 DDR_A_D10
DDR_A_MA13 AJ25 MA_ADD12/MAA_CA2 MA_DATA10/MAA_DATA5 L26 DDR_A_D11
DDR_A_WE# AG27 MA_ADD13_BANK2/RSVD MA_DATA11/MAA_DATA4 L23 DDR_A_D12
16 DDR_A_WE# DDR_A_CAS# MA_WE_L_ADD14/MAB_CA2 MA_DATA12/MAA_DATA7 DDR_A_D13
AG23 F25
16 DDR_A_CAS# DDR_A_RAS# MA_CAS_L_ADD15/MAB_CA4 MA_DATA13/MAA_DATA6 DDR_A_D14
AG26 K25
16 DDR_A_RAS# MA_RAS_L_ADD16/MAB_CA3 MA_DATA14/MAA_DATA2 DDR_A_D15
K27
MA_DATA15/MAA_DATA3
DDR_A_BA0 AF21 M25 DDR_A_D16
16 DDR_A_BA0 DDR_A_BA1 MA_BANK0/MAB_CS1 MA_DATA16/MAA_DATA17 DDR_A_D17
AF27 M27
16 DDR_A_BA1 MA_BANK1/MAB_CA0 MA_DATA17/MAA_DATA16 DDR_A_D18
P27
DDR_A_BG0 AA21 MA_DATA18/MAA_DATA23 R24 DDR_A_D19
16 DDR_A_BG0 DDR_A_BG1 MA_BG0/MAA_CS1 MA_DATA19/MAA_DATA20 DDR_A_D20
AA27 L27
16 DDR_A_BG1 MA_BG1/MAA_CKE0 MA_DATA20/MAA_DATA19 DDR_A_D21
M24
DDR_A_ACT_N AA22 MA_DATA21/MAA_DATA18 P24 DDR_A_D22
16 DDR_A_ACT_N MA_ACT_L/MAA_CS0 MA_DATA22/MAA_DATA21 DDR_A_D23
P25
DDRA_MA_DM0 F21 MA_DATA23/MAA_DATA22
DDRA_MA_DM1 MA_DM0/MAA_DM1 DDR_A_D24

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G27 M22
DDRA_MA_DM2 N24 MA_DM1/MAA_DM0 MA_DATA24/MAA_DATA30 N21 DDR_A_D25
DDRA_MA_DM3 N23 MA_DM2/MAA_DM2 MA_DATA25/MAA_DATA31 T22 DDR_A_D26
DDRA_MA_DM4 AL24 MA_DM3/MAA_DM3 MA_DATA26/MAA_DATA26 V21 DDR_A_D27
DDRA_MA_DM5 AN27 MA_DM4/MAB_DM2 MA_DATA27/MAA_DATA27 L21 DDR_A_D28
DDRA_MA_DM6 AW25 MA_DM5/MAB_DM3 MA_DATA28/MAA_DATA28 M20 DDR_A_D29
DDRA_MA_DM7 AT21 MA_DM6/MAB_DM1 MA_DATA29/MAA_DATA29 R23 DDR_A_D30
T27 MA_DM7/MAB_DM0 MA_DATA30/MAA_DATA24 T21 DDR_A_D31
RSVD_36 MA_DATA31/MAA_DATA25
DDR_A_DQS0 F22 AL27 DDR_A_D32
C DDR_A_DQS#0 G22 MA_DQS_H0/MAA_DQS_H1 MA_DATA32/MAB_DATA16 AL25 DDR_A_D33 C
DDR_A_DQS1 H27 MA_DQS_L0/MAA_DQS_L1 MA_DATA33/MAB_DATA17 AP26 DDR_A_D34
MA_DQS_H1/MAA_DQS_H0 MA_DATA34/MAB_DATA22

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DDR_A_DQS#1 H26 AR27 DDR_A_D35
DDR_A_DQS2 N27 MA_DQS_L1/MAA_DQS_L0 MA_DATA35/MAB_DATA20 AK26 DDR_A_D36
DDR_A_DQS#2 N26 MA_DQS_H2/MAA_DQS_H2 MA_DATA36/MAB_DATA19 AK24 DDR_A_D37
DDR_A_DQS3 R21 MA_DQS_L2/MAA_DQS_L2 MA_DATA37/MAB_DATA18 AM24 DDR_A_D38
DDR_A_DQS#3 P21 MA_DQS_H3/MAA_DQS_H3 MA_DATA38/MAB_DATA23 AP27 DDR_A_D39
DDR_A_DQS4 AM26 MA_DQS_L3/MAA_DQS_L3 MA_DATA39/MAB_DATA21
DDR_A_DQS#4 AM27 MA_DQS_H4/MAB_DQS_H2 AM23 DDR_A_D40
DDR_A_DQS5 AN24 MA_DQS_L4/MAB_DQS_L2 MA_DATA40/MAB_DATA30 AM21 DDR_A_D41
DDR_A_DQS#5 AN25 MA_DQS_H5/MAB_DQS_H3 MA_DATA41/MAB_DATA31 AR25 DDR_A_D42
DDR_A_DQS6 AU23 MA_DQS_L5/MAB_DQS_L3 MA_DATA42/MAB_DATA26 AU27 DDR_A_D43
DDR_A_DQS#6 AT23 MA_DQS_H6/MAB_DQS_H1 MA_DATA43/MAB_DATA27 AL22 DDR_A_D44
DDR_A_DQS7 AV20 MA_DQS_L6/MAB_DQS_L1 MA_DATA44/MAB_DATA28 AL21 DDR_A_D45

-X
DDR_A_DQS#7 AW20 MA_DQS_H7/MAB_DQS_H0 MA_DATA45/MAB_DATA29 AP24 DDR_A_D46
V24 MA_DQS_L7/MAB_DQS_L0 MA_DATA46/MAB_DATA24 AP23 DDR_A_D47
V23 RSVD_41 MA_DATA47/MAB_DATA25
RSVD_40 AW26 DDR_A_D48
SA_CLK_DDR0 AD25 MA_DATA48/MAB_DATA11 AV25 DDR_A_D49
16 SA_CLK_DDR0 SA_CLK_DDR#0 MA_CLK_H0/MAA_CKT MA_DATA49/MAB_DATA10 DDR_A_D50
AD24 AV22
16 SA_CLK_DDR#0 SA_CLK_DDR1 MA_CLK_L0/MAA_CKC MA_DATA50/MAB_DATA15 DDR_A_D51
AE26 AW22
16 SA_CLK_DDR1 SA_CLK_DDR#1 MA_CLK_H1/MAB_CKT MA_DATA51/MAB_DATA14 DDR_A_D52
AE27 AU26
16 SA_CLK_DDR#1 MA_CLK_L1/MAB_CKC MA_DATA52/MAB_DATA12 DDR_A_D53
AV27

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MA_DATA53/MAB_DATA13 AW23 DDR_A_D54
MA_DATA54/MAB_DATA9 AT22 DDR_A_D55
MA_DATA55/MAB_DATA8
AW21 DDR_A_D56
DDR_A_CS0# AG21 MA_DATA56/MAB_DATA5 AU21 DDR_A_D57
16 DDR_A_CS0# DDR_A_CS1# MA_CS_L0/MAB_CKE1 MA_DATA57/MAB_DATA6 DDR_A_D58
AJ27 AP21
16 DDR_A_CS1# MA_CS_L1/RSVD MA_DATA58/MAB_DATA2 DDR_A_D59
AN20
MA_DATA59/MAB_DATA3 AR22 DDR_A_D60
MA_DATA60/MAB_DATA7 AN22 DDR_A_D61
MA_DATA61/MAB_DATA4 DDR_A_D62

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B AT20 B
MA_DATA62/MAB_DATA1 AR20 DDR_A_D63
DDR_A_CKE0 Y23 MA_DATA63/MAB_DATA0
16 DDR_A_CKE0 DDR_A_CKE1 MA_CKE0/MAA_CA0
Y26 T24
16 DDR_A_CKE1 MA_CKE1/MAA_CA1 RSVD_34 T25
RSVD_35 W25
RSVD_51 W27
DDR_A_ODT0 AG24 RSVD_52 R26
16 DDR_A_ODT0 DDR_A_ODT1 MA_ODT0/MAB_CA5 RSVD_27
AJ22 R27
16 DDR_A_ODT1 MA_ODT1/RSVD RSVD_28 V27
RSVD_43

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V26
RSVD_42
DDR_A_ALERT_N AA25
16 DDR_A_ALERT_N MA_ALERT_L/MA_TEST DDR_A_PARITY
AF24 DDR_A_PARITY 16
DDR_A_EVENT# AE24 MA_PAROUT/MAB_CA1
16 DDR_A_EVENT# DDR4_A_DRAMRST# Y24 MA_EVENT_L
16 DDR4_A_DRAMRST# MA_RESET_L
FP5 REV 0.90
PART 1 OF 13

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AMD-RAVEN-FP5_BGA1140
@

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A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 Memory
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 4 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

DDRA_MB_DM[0..7] 17

DDR_B_DQS#[0..7] 17
eleTro-X Technical
UC1I DDR_B_DQS[0..7] 17
MEMORY B
DDR_B_D[0..63] 17
DDR_B_MA0 AG30
D DDR_B_MA1 MB_ADD0/MBB_CS0 DDR_B_D0 DDR_B_MA[0..13] 17 D
AC32 B21
DDR_B_MA2 AC30 MB_ADD1/RSVD MB_DATA0/MBA_DATA8 D21 DDR_B_D1
DDR_B_MA3 AB29 MB_ADD2/RSVD MB_DATA1/MBA_DATA9 B23 DDR_B_D2
DDR_B_MA4 AB31 MB_ADD3/RSVD MB_DATA2/MBA_DATA13 D23 DDR_B_D3
DDR_B_MA5 AA30 MB_ADD4/RSVD MB_DATA3/MBA_DATA12 A20 DDR_B_D4
DDR_B_MA6 AA29 MB_ADD5/RSVD MB_DATA4/MBA_DATA11 C20 DDR_B_D5
DDR_B_MA7 Y30 MB_ADD6/RSVD MB_DATA5/MBA_DATA10 A22 DDR_B_D6
DDR_B_MA8 AA31 MB_ADD7/MBA_CA3 MB_DATA6/MBA_DATA15 C22 DDR_B_D7
DDR_B_MA9 W29 MB_ADD8/MBA_CA4 MB_DATA7/MBA_DATA14
DDR_B_MA10 AH29 MB_ADD9/MBA_CKE1 D24 DDR_B_D8
DDR_B_MA11 Y32 MB_ADD10/MBB_CKE0 MB_DATA8/MBA_DATA0 A25 DDR_B_D9
DDR_B_MA12 W31 MB_ADD11/MBA_CA5 MB_DATA9/MBA_DATA1 D27 DDR_B_D10
DDR_B_MA13 AL30 MB_ADD12/MBA_CA2 MB_DATA10/MBA_DATA5 C27 DDR_B_D11
DDR_B_WE# AK30 MB_ADD13_BANK2/RSVD MB_DATA11/MBA_DATA4 C23 DDR_B_D12
17 DDR_B_WE# DDR_B_CAS# MB_WE_L_ADD14/MBB_CA2 MB_DATA12/MBA_DATA7 DDR_B_D13
AK32 B24
17 DDR_B_CAS# DDR_B_RAS# MB_CAS_L_ADD15/MBB_CA4 MB_DATA13/MBA_DATA6 DDR_B_D14
AJ30 C26
17 DDR_B_RAS# MB_RAS_L_ADD16/MBB_CA3 MB_DATA14/MBA_DATA2 DDR_B_D15
B27
MB_DATA15/MBA_DATA3
DDR_B_BA0 AH31 C30 DDR_B_D16
17 DDR_B_BA0 DDR_B_BA1 MB_BANK0/MBB_CS1 MB_DATA16/MBA_DATA19 DDR_B_D17
AG32 E29
17 DDR_B_BA1 MB_BANK1/MBB_CA0 MB_DATA17/MBA_DATA18 DDR_B_D18
H29
DDR_B_BG0 V31 MB_DATA18/MBA_DATA22 H31 DDR_B_D19
17 DDR_B_BG0 DDR_B_BG1 MB_BG0/MBA_CS1 MB_DATA19/MBA_DATA23 DDR_B_D20

Ele
V29 A28
17 DDR_B_BG1 MB_BG1/MBA_CKE0 MB_DATA20/MBA_DATA20 DDR_B_D21
D28
DDR_B_ACT_N V30 MB_DATA21/MBA_DATA21 F31 DDR_B_D22
17 DDR_B_ACT_N MB_ACT_L/MBA_CS0 MB_DATA22/MBA_DATA17 DDR_B_D23
G30
DDRA_MB_DM0 C21 MB_DATA23/MBA_DATA16
DDRA_MB_DM1 C25 MB_DM0/MBA_DM1 J29 DDR_B_D24
DDRA_MB_DM2 E32 MB_DM1/MBA_DM0 MB_DATA24/MBA_DATA30 J31 DDR_B_D25
DDRA_MB_DM3 K30 MB_DM2/MBA_DM2 MB_DATA25/MBA_DATA31 L29 DDR_B_D26
DDRA_MB_DM4 AP30 MB_DM3/MBA_DM3 MB_DATA26/MBA_DATA26 L31 DDR_B_D27
DDRA_MB_DM5 AW31 MB_DM4/MBB_DM2 MB_DATA27/MBA_DATA27 H30 DDR_B_D28
C DDRA_MB_DM6 BB26 MB_DM5/MBB_DM3 MB_DATA28/MBA_DATA28 H32 DDR_B_D29 C
DDRA_MB_DM7 BD22 MB_DM6/MBB_DM1 MB_DATA29/MBA_DATA29 L30 DDR_B_D30
MB_DM7/MBB_DM0 MB_DATA30/MBA_DATA25

tro
N32 L32 DDR_B_D31
RSVD_21 MB_DATA31/MBA_DATA24
DDR_B_DQS0 D22 AP29 DDR_B_D32
DDR_B_DQS#0 B22 MB_DQS_H0/MBA_DQS_H1 MB_DATA32/MBB_DATA16 AP32 DDR_B_D33
DDR_B_DQS1 D25 MB_DQS_L0/MBA_DQS_L1 MB_DATA33/MBB_DATA17 AT29 DDR_B_D34
DDR_B_DQS#1 B25 MB_DQS_H1/MBA_DQS_H0 MB_DATA34/MBB_DATA21 AU32 DDR_B_D35
DDR_B_DQS2 F29 MB_DQS_L1/MBA_DQS_L0 MB_DATA35/MBB_DATA20 AN30 DDR_B_D36
DDR_B_DQS#2 F30 MB_DQS_H2/MBA_DQS_H2 MB_DATA36/MBB_DATA19 AP31 DDR_B_D37
DDR_B_DQS3 K31 MB_DQS_L2/MBA_DQS_L2 MB_DATA37/MBB_DATA18 AR30 DDR_B_D38
DDR_B_DQS#3 K29 MB_DQS_H3/MBA_DQS_H3 MB_DATA38/MBB_DATA23 AT31 DDR_B_D39
DDR_B_DQS4 AR29 MB_DQS_L3/MBA_DQS_L3 MB_DATA39/MBB_DATA22
DDR_B_DQS#4 AR31 MB_DQS_H4/MBB_DQS_H2 AU29 DDR_B_D40

-X
DDR_B_DQS5 AW30 MB_DQS_L4/MBB_DQS_L2 MB_DATA40/MBB_DATA24 AV30 DDR_B_D41
DDR_B_DQS#5 AW29 MB_DQS_H5/MBB_DQS_H3 MB_DATA41/MBB_DATA25 BB30 DDR_B_D42
DDR_B_DQS6 BC25 MB_DQS_L5/MBB_DQS_L3 MB_DATA42/MBB_DATA29 BA28 DDR_B_D43
DDR_B_DQS#6 BA25 MB_DQS_H6/MBB_DQS_H1 MB_DATA43/MBB_DATA28 AU30 DDR_B_D44
DDR_B_DQS7 BC22 MB_DQS_L6/MBB_DQS_L1 MB_DATA44/MBB_DATA31 AU31 DDR_B_D45
DDR_B_DQS#7 BA22 MB_DQS_H7/MBB_DQS_H0 MB_DATA45/MBB_DATA30 AY32 DDR_B_D46
N31 MB_DQS_L7/MBB_DQS_L0 MB_DATA46/MBB_DATA26 AY29 DDR_B_D47
N29 RSVD_20 MB_DATA47/MBB_DATA27
RSVD_18 BA27 DDR_B_D48

Te
SB_CLK_DDR0 AC31 MB_DATA48/MBB_DATA11 BC27 DDR_B_D49
17 SB_CLK_DDR0 SB_CLK_DDR#0 MB_CLK_H0/MBA_CKT MB_DATA49/MBB_DATA10 DDR_B_D50
AD30 BA24
17 SB_CLK_DDR#0 SB_CLK_DDR1 MB_CLK_L0/MBA_CKC MB_DATA50/MBB_DATA14 DDR_B_D51
AD29 BC24
17 SB_CLK_DDR1 SB_CLK_DDR#1 MB_CLK_H1/MBB_CKT MB_DATA51/MBB_DATA15 DDR_B_D52
AD31 BD28
17 SB_CLK_DDR#1 MB_CLK_L1/MBB_CKC MB_DATA52/MBB_DATA12 DDR_B_D53
AE30 BB27
AE32 RSVD_89 MB_DATA53/MBB_DATA13 BB25 DDR_B_D54
AF29 RSVD_90 MB_DATA54/MBB_DATA9 BD25 DDR_B_D55
AF31 RSVD_91 MB_DATA55/MBB_DATA8
RSVD_92 BC23 DDR_B_D56
DDR_B_CS0# MB_DATA56/MBB_DATA6 DDR_B_D57

ch
B AJ31 BB22 B
17 DDR_B_CS0# DDR_B_CS1# MB_CS_L0/MBB_CKE1 MB_DATA57/MBB_DATA7 DDR_B_D58
AM31 BC21
17 DDR_B_CS1# MB_CS_L1/RSVD MB_DATA58/MBB_DATA2 DDR_B_D59
AJ29 BD20
AM29 RSVD_95 MB_DATA59/MBB_DATA3 BB23 DDR_B_D60
RSVD_97 MB_DATA60/MBB_DATA4 BA23 DDR_B_D61
MB_DATA61/MBB_DATA5 BB21 DDR_B_D62
MB_DATA62/MBB_DATA1 BA21 DDR_B_D63
DDR_B_CKE0 U29 MB_DATA63/MBB_DATA0
17 DDR_B_CKE0 DDR_B_CKE1 MB_CKE0/MBA_CA0
T30 M31
17 DDR_B_CKE1 MB_CKE1/MBA_CA1 RSVD_17
V32 N30
RSVD_93 RSVD_19

ni
U31 P31
RSVD_94 RSVD_26 R32
DDR_B_ODT0 AL31 RSVD_29 M30
17 DDR_B_ODT0 DDR_B_ODT1 MB_ODT0/MBB_CA5 RSVD_16
AM32 M29
17 DDR_B_ODT1 MB_ODT1/RSVD RSVD_15
AL29 P30
AM30 RSVD_96 RSVD_25 P29
RSVD_98 RSVD_24
DDR_B_ALERT_N W30
17 DDR_B_ALERT_N

ca
MB_ALERT_L/MB_TEST AG31 DDR_B_PARITY
DDR_B_EVENT# MB_PAROUT/MBB_CA1 DDR_B_PARITY 17
AG29
17 DDR_B_EVENT# DDR4_B_DRAMRST# MB_EVENT_L
T31
17 DDR4_B_DRAMRST# MB_RESET_L
FP5 REV 0.90
PART 9 OF 13

AMD-RAVEN-FP5_BGA1140
@

l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 Memory
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 5 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

UC1C
+1.8VS DISPLAY/SVI2/JTAG/TEST
EDP_TXP0 C8 G15 DP_ENBKL +3VS_APU
RC18 1 2 300_0402_5% APU_RST# 18 EDP_TXP0 EDP_TXN0 A8 DP0_TXP0 DP_BLON F15 DP_ENVDD To EDP panel
18 EDP_TXN0 DP0_TXN0 DP_DIGON DP_EDP_PWM
L14
DP_VARY_BL

1
CC16 1 2 56P_0402_50V8-J EDP_TXP1 D8
@
18
18
EDP_TXP1
EDP_TXN1
EDP_TXN1

EDP_TXP2
B8 DP0_TXP1
DP0_TXN1 DP0_AUXP
DP0_AUXN
D9
B9
EDP_AUXP
EDP_AUXN
APU_EDP_HPD
EDP_AUXP 18
EDP_AUXN 18
eleTro-X Technical +3VALW_APU
RC77
2.2K_0402_5%
B6 C10
PLACE CC16 CAPS CLOSE TO APU,CRB reserve 27pf
eDP 18 EDP_TXP2 EDP_TXN2 C7 DP0_TXP2 DP0_HPD APU_EDP_HPD 18
18 EDP_TXN2

2
DP0_TXN2

2
G11 APU_DDC_CLK
EDP_TXP3 DP1_AUXP APU_DDC_DATA APU_DDC_CLK 20 @
C6 F11 RC3057 ENBKL
18 EDP_TXP3 EDP_TXN3 DP0_TXP3 DP1_AUXN APU_HDMI_HPD APU_DDC_DATA 20
D6 G13 10K_0402_5%
+1.8VS 18 EDP_TXN3 DP0_TXN3 DP1_HPD APU_HDMI_HPD 20
D APU_HDMI_TX2+ E6 J12 DP2_AUXP D
20 APU_HDMI_TX2+ DP2_AUXP 23

1
DP1_TXP0 DP2_AUXP

3
APU_HDMI_TX2- D5 H12 DP2_AUXN D
APU_PWROK 20 APU_HDMI_TX2- DP1_TXN0 DP2_AUXN DP2_HPD DP2_AUXN 23 @
RC19 1 2 300_0402_5% K13 5 QC10B
APU_HDMI_TX1+ DP2_HPD DP2_HPD 23,24
E1 G DMN5L06DWK-7 2N SOT363-6
20 APU_HDMI_TX1+ APU_HDMI_TX1- DP1_TXP1 DP3_AUXP
CC17 1 2 56P_0402_50V8-J C1 J10
20 APU_HDMI_TX1- DP1_TXN1 DP3_AUXP DP3_AUXN DP3_AUXP 22
@ H10 S
HDMI

4
DP3_AUXN DP3_AUXN 22

6
APU_HDMI_TX0+ F3 K8 DP3_HPD D
20 APU_HDMI_TX0+ APU_HDMI_TX0- DP1_TXP2 DP3_HPD DP3_HPD 22,24 DP_ENBKL @
E4 2 QC10A
20 APU_HDMI_TX0- DP1_TXN2 DP_STEREOSYNC
K15 G DMN5L06DWK-7 2N SOT363-6
APU_HDMI_CLK+ F4 DP_STEREOSYNC
PLACE CC17 CAPS CLOSE TO APU,CRB reserve 27pf 20 APU_HDMI_CLK+ DP1_TXP3

2
APU_HDMI_CLK- F2 F14 1 @ TC34 S
20 APU_HDMI_CLK-

1
DP1_TXN3 RSVD_4 F12 1 @ TC33 RC3055
+3VS_APU RSVD_3 @
100K_0402_5%
F10 1 @ TC32
2.2K_0404_4P2R_5% RSVD_2 +3VS_APU

1
1 4 APU_SIC
2 3 APU_SID
UC7
RPC8 1 5
DP_ENBKL 2 OE VCC
3 A 4 ENBKL
1K_0402_5% 1 APU_PROCHOT#_R GND Y ENBKL 44
2 RC128
1K_0402_5% 1

Ele
2 RC127 ALERT# AP14 TEST4 1 @ TC31
TEST4 AN14 TEST5 1 @ TC30 SN74LV1T125DCKR_SC70-5
TEST5 +1.8VS
F13 1 @ TC29
RC22 1 2 1K_0402_1% APU_THERMTRIP# TEST6 RPC3
G18 APU_TEST14 1 8
TEST14 H19 APU_TEST15
APU_TEST15
2 7
TEST15 F18 APU_TEST16 3 6
TEST16 F19 APU_TEST17 4 5 +3VS_APU
TEST17
C W24 APU_TEST31 1 @ TC24 10K_0804_8P4R_5% C
TEST31/RSVD

1
CC9 1 2 1000P_0402_50V7-K APU_SVC
@

tro
@ +3VALW_APU RC3053
CC10 1 2 1000P_0402_50V7-K APU_SVD AR11 1 @ TC23 4.7K_0402_5%
@ TEST41

2
CC1392 1 2 1000P_0402_50V7-K APU_SVT APU_TDI_H AU2 AJ21 TEST470 1 @ TC22

2
@ APU_TDO_H AU4 TDI TEST470 AK21 TEST471 1 @ TC21 RC73
APU_TCK_H TDO TEST471 @ APU_ENVDD 18
AU1 10K_0402_5%
APU_TMS_H AU3 TCK
CRB reserve SVC SVD 27pf APU_TRST#_H TMS
AV3

1
TRST_L

3
APU_DBREQ# AW3 D
DBREQ_L +0.9VS @
5 QC9B
G DMN5L06DWK-7 2N SOT363-6
+1.8VS PD FOR CUSTOMER APU_RESET#_H HDT@ 1 RC3192 2 0_0402_5% APU_RST# AW4 V4 SMU_ZVDDP RC3 1 2 196_0402_0.5%

-X
APU_PWROK RESET_L SMU_ZVDD +3VALW_APU @
PU FOR INTERNAL AW2 S
61 APU_PWROK

4
PWROK

6
RC3101 1 2 1K_0402_5% DP_STEREOSYNC D
@
RC3129 1 @ 2 0_0402_5% APU_SIC H14 AW11 CORETYPE RC3113 1 2 10K_0402_5% DP_ENVDD 2 QC9A
20,44,45,50 EC_SMB_CK3 SIC CORETYPE
RC3102 1 @ 2 1K_0402_5% 20,44,45,50 EC_SMB_DA3 RC3130 1 @ 2 0_0402_5% APU_SID J14 G DMN5L06DWK-7 2N SOT363-6
ALERT# J15 SID
ALERT_L

2
APU_THERMTRIP# AP16 AN11 APU_VDDP_RUN_FB_H 1 @ TC35 S
44 APU_THERMTRIP#

1
RC3070 1 @ 2 0_0402_5% APU_PROCHOT#_R L19 THERMTRIP_L VDDP_SENSE J19 VDDCR_SOC_VCC_SENSE RC13
44 APU_PROCHOT# PROCHOT_L VDDCR_SOC_SENSE VDDCR_SOC_VCC_SENSE 61 @
RC3056 1 2 100K_0402_5% APU_EDP_HPD K18 VDDCR_VCC_SENSE
100K_0402_5%
VDDCR_SENSE VDDCR_VCC_SENSE 61
@

Te
RC279 1 @ 2 0_0402_5% APU_SVC_RA F16
61 APU_SVC

1
RC213 1 @ 2 0_0402_5% APU_SVD_RA H16 SVC0 J18 VDDCR_VSS_SENSE RC206 1 @ 2 0_0402_5%
61 APU_SVD SVD0 VSS_SENSE_A VDDCR_VSS_SENSE 61
RC215 1 @ 2 0_0402_5% APU_SVT_RA J16 FP5 REV 0.90 AM11 VSS_SENSEB 1 @ TC40 LCD Power IC can change for PCH_ENVDD for cost down
APU_PROCHOT# 61 APU_SVT SVT0 VSS_SENSE_B
CC8789 1 2 56P_0402_50V8-J PART 3 OF 13
@
AMD-RAVEN-FP5_BGA1140
@
VDDCR_SOC_VCC_SENSE 1 @ TC52 +3VS_APU
VDDCR_VCC_SENSE

ch
B 1 @ TC53 B
VDDCR_VSS_SENSE 1 @ TC54

1
+3VALW_APU RC70
4.7K_0402_5%
+1.8VALW
HDT

2
JHDT1

2
APU_TDI_H 1 2 APU_TCK_H RC3054
1 2 @ PANEL_BKLT_CTRL
10K_0402_5%
+1.8VALW RPC52 3 4 APU_TMS_H
1 3 4

ni
HDT@

1
1 8 APU_TDI_H CC212 5 6 RC20 1 2 APU_TDI_H
5 6 @

3
2 7 APU_TMS_H 0.01U_0201_6.3V7-K 0_0402_5% +1.8VALW D
3 6 APU_TCK_H 2 7 8 APU_TDO_H 5 QC8B
APU_TRST#_H @ Cap close to JHDT.9 RC21 7 8
4 5 G DMN5L06DWK-7 2N SOT363-6

1
APU_TRST#_H 1 2 9 10 APU_PWROK_BUF
1K_0804_8P4R_5% 33_0402_5% 9 10 RC3188 S
HDT@

4
6
11 12 APU_RST#_BUF HDT@ 1K_0402_1% D
HDT@ 1 @

ca
CC11 11 12 DP_EDP_PWM 2 QC8A
HDT@ 13 14 G DMN5L06DWK-7 2N SOT363-6
RC24

2
13 14

2
+1.8VALW +1.8VALW 0.01U_0201_25V7-K
2 15 16 1 2 APU_DBREQ# RC3052 S

1
15 16 33_0402_5% 100K_0402_5%
@
1 17 18 HDT@ 1 Cap close to JHDT.16
17 18
2

CC12

1
CC100 HDT@ RC107 RC108 RPC2 19 20
0.1U_0201_6.3V6-K 1 8 19 20 HDT@ 0.01U_0201_25V7-K
HDT@ 300_0402_5% 300_0402_5%
2 2 7 2 +3VS_APU

l
HDT@ 3 6 UC8
1

UC6 4 5 @ 1 5
APU_PWROK 3 4 APU_PWROK_BUF SAMTE_ASP-136446-07-B DP_EDP_PWM 2 OE VCC
2A 2Y 3 A 4 PANEL_BKLT_CTRL
A GND Y PANEL_BKLT_CTRL 18 A
2 5 10K_0804_8P4R_5%
GND VCC
APU_RESET#_H APU_RST#_BUF HDT@
1 6 SN74LV1T125DCKR_SC70-5
1A 1Y
HDT@ SN74LVC2G07YZPR_WCSP6

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 DP/JTAG/SVI2/MISC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 6 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

+1.8VALW
EGPIO149 RC3170 2 1 10K_0402_5%
RC3173 1 @ 2 0_0402_5% PCIE_RST0# RC3172 1 2 33_0402_5% PCIE_RST0#_R EGPIO150 RC3169 2 1 10K_0402_5%

10U_0402_6.3V6-M
19,29,31,32,35,36,37,51 PLT_RST# APU_I2C0_SCL_R
2 RC3166 2 1 10K_0402_5%
eleTro-X Technical

1
APU_I2C0_SDA_R RC3167 2 1 10K_0402_5%

CC8782
1
RC243 1 @ 2 0_0402_5% RC3067
1
RC3171 10K_0402_5%
CC1389 1
100K_0402_5%
@ 100P_0201_25V8-J

2
2 DC1 1 2 RB521CM-30T2R_VMN2M RSMRST#_R
44 EC_RSMRST#

2
1
D CC1315 D
@ 0.1U_0402_10V7-K
PLT_RST# RC38 1 2 33_0402_5% PCIE_RST1#_R 2

1
RC43 1 RC3254 +3VS_APU
RPC53
10K_0402_5% CC20 10K_0402_5% APU_SMB_CK0 3 2
@ 100P_0201_25V8-J APU_SMB_DA0 4 1
2 UC1D
@

2
ACPI/AUDIO/I2C/GPIO/MISC 2.2K_0404_4P2R_5%
+3VALW_APU
AW12 RPC54
PM_SLP_S3# CC8787 1 2 2200P_0201_25V7K EGPIO41/SFI_S5_EGPIO41 AU12 APU_SMB_CK1 3 2
PM_SLP_S5# CC8788 1 2 2200P_0201_25V7K PCIE_RST0#_R BD5 AGPIO39/SFI_S5_AGPIO39 APU_SMB_DA1 4 1
PCIE_RST1#_R BB6 PCIE_RST0_L/EGPIO26
PLT_RST# Port 2 for use ?? AR13 APU_I2C0_SCL_R RC522 1 @ 2 0_0402_5% APU_I2C0_SCL
RSMRST#_R PCIE_RST1_L/EGPIO27 I2C0_SCL/SFI0_I2C_SCL/EGPIO151 APU_I2C0_SDA_R APU_I2C0_SCL 15
AT16 AT13 RC523 1 @ 2 0_0402_5% APU_I2C0_SDA 2.2K_0404_4P2R_5%
RSMRST_L I2C0_SDA/SFI0_I2C_SDA/EGPIO152 APU_I2C0_SDA 15
RC3064 1 @ 2 0_0402_5% AR15 AN8 EGPIO149 +1.8VS
44 PBTN_OUT# PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149
RC3065 1 @ 2 0_0402_5% SYS_PWRGD_R AV6 AN9 EGPIO150
44 PWR_GOOD SYS_RESET# PWR_GOOD I2C1_SDA/SFI1_I2C_SDA/EGPIO150
AP10
12 SYS_RESET# PCIE_WAKE#_RA SYS_RESET_L/AGPIO1 APU_SMB_CK0_R
RC88 1 @ 2 0_0402_5% AV11 BC20 RC501 1 @ 2 0_0402_5% APU_SMB_CK0 PSA_I2C_SCL RC3126 1 @ 2 4.7K_0402_5%
WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0 APU_SMB_CK0 12,16,17,19
2 0_0402_5% APU_SMB_DA0_R 2 0_0402_5% APU_SMB_DA0 PSA_I2C_SDA

Ele
31,32,44 EC_WAKE# RC92 1 @ AGPIO3 BA20 RC500 1 @ RC3127 1 @ 2 4.7K_0402_5%
I2C2_SDA/EGPIO114/SDA0 APU_SMB_DA0 12,16,17,19
RC3068 1 @ 2 0_0402_5% AV13
DC3 1 2 44 PM_SLP_S3# RC3069 1 @ 2 0_0402_5% AT14 SLP_S3_L AM9 APU_SMB_CK1_R RC502 1 @ 2 0_0402_5% APU_SMB_CK1
12,44 PM_SLP_S5# SLP_S5_L I2C3_SCL/AGPIO19/SCL1 APU_SMB_DA1_R APU_SMB_CK1 32,44,48
RB521CM-30T2R_VMN2M AM10 RC503 1 @ 2 0_0402_5% APU_SMB_DA1
I2C3_SDA/AGPIO20/SDA1 APU_SMB_DA1 32,44,48
RC3241 1 @ 2 0_0402_5% DOCK_RJ45_DET#_R AR8 +RTC_33
25 DOCK_RJ45_DET# S0A3_GPIO/AGPIO10 PSA_I2C_SCL
L16
AC_PRESENT AT10 PSA_I2C_SCL M16 PSA_I2C_SDA INTRUDER_ALERT RC3220 1 @ 2 20M_0402_5%
44 AC_PRESENT WWAN_RST# AC_PRES/AGPIO23 PSA_I2C_SDA
AN6
36 WWAN_RST# LLB_L/AGPIO12
AT15 AGPIO3
C 0_0402_5% 2 @ 1 RC3489 BEEP_RESERVED_R AW8 AGPIO3 AW10 RC3251 1 @ 2 0_0402_5% C
44 BEEP_RESERVED EGPIO42 AGPIO4/SATAE_IFDET IFDET 29
+3VS_APU

tro
AP9
+3VALW_APU AGPIO5/DEVSLP0 LED_FNLOCK# 47
AU10 RC3207 1 @ 2 0_0402_5%
AGPIO6/DEVSLP1 AV15 SC_DTCT# SATA2_DEVSLP 29 EC_SMI# RC3081 1 2 2.2K_0402_5%
SYS_PWRGD_R SATA_ACT_L/AGPIO130 SC_DTCT# 48 PCIE_SSD_RST#
RC72 1 @ 2 10K_0402_5% RC3174 1 2 10K_0402_5%
AU7
CC1314 1 2 0.1U_0201_6.3V6-K AGPIO9 AU6 RC4086 1 @ 2 0_0402_5% LED_MUTE# 47
AGPIO40 AW13 INT_MIC_DTCT# PCIE_SSD_RST# 29 PCH_WLAN_OFF# RC3232 1 @ 2 10K_0402_5%
AGPIO69 INT_MIC_DTCT# 18 PCH_BT_OFF#
AW15 RC3233 1 @ 2 10K_0402_5%
HDA_BITCLK AGPIO86 EC_SMI# 44
DC4 1 2 AR2
@ RB521CM-30T2R_VMN2M AP7 AZ_BITCLK/TDM_BCLK_MIC INT_MIC_DTCT# RC3194 1 2 10K_0402_5%
38 HDA_SDIN0 HDA_SDIN1 AZ_SDIN0/CODEC_GPI INTRUDER_ALERT SC_DTCT#
TC42 @ 1 AP1 AU14 RC3221 1 @ 2 0_0402_5% DCOVER_SW 14,44 RC3224 1 2 10K_0402_5%
TC43 @ 1 HDA_SDIN2 AP4 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU16 RC3082 1 @ 2 0_0402_5%

-X
HDA_RST# AP3 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK SPKR/AGPIO91 AV8 RC3218 1 @ 20_0201_5% PCH_BEEP 43 +3VALW
SYS_RESET# HDA_SYNC AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 APU_DCOVER_SW 14
CC38 1 2 0.1U_0201_6.3V6-K AR4
HDA_SDOUT AR3 AZ_SYNC/TDM_FRM_MIC AW16 APU_DCOVER_SW RC4089 1 2 10K_0402_5%
AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89 BD15 RC3252 1 @ 2 0_0402_5% PCH_WWAN_OFF# 36
GENINT2_L/AGPIO90 FULL_CARD_POWER_OFF 8,36
AT2
AT4 SW_MCLK/TDM_BCLK_BT
LED_MICMUTE# AR6 SW_DATA0/TDM_DOUT_BT AR18 PCH_WLAN_OFF#
47 LED_MICMUTE# LED_CAPSLOCK# AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84 PCH_BT_OFF# PCH_WLAN_OFF# 35 +3VALW_APU
AP6 AT18 RPC15
47 LED_CAPSLOCK# AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85 PCH_BT_OFF# 35 AGPIO3 1 8

Te
FP5 REV 0.90
PART 4 OF 13 PBTN_OUT# 2 7
@ PCIE_WAKE#_RA 3 6
AMD-RAVEN-FP5_BGA1140 4 5
+3VALW_APU +3VS_APU
10K_0804_8P4R_5%
DEVSLP_GATE# RC4083 1 @ 2 10K_0402_5%
BEEP_RESERVED_R RC4088 1 2 10K_0402_5%
KevinH:Need to check WWAN_RST#

ch
B RC3250 1 @ 2 10K_0402_5% B
@ @ @ @
Board ID Description Stuff R
1

2
DOCK_RJ45_DET#_R RC3242 1 @ 2 10K_0402_5%
2K_0402_5%

2K_0402_5%

2K_0402_5%

10K_0402_5%
Samsung 8Gb SATA2_DEVSLP RC3243 1 @ 2 10K_0402_5%
RC1615

RC1613

RC1611

RC1609
000 RC1612 RC1614 RC1616 AC_PRESENT RC3238 1 @ 2 10K_0402_5%
2400 MT/s
Hynix 8Gb +3VS_APU
2

1
010 2400 MT/s RC1612 RC1613 RC1616
BOARD_ID0 PCH_WWAN_OFF# RC3123 1 2 10K_0402_5%
9 BOARD_ID0 33_0804_8P4R_5%
BOARD_ID1

ni
Micron 8Gb 9 BOARD_ID1
100 RC1611 RC1614 RC1616 BOARD_ID2 4 5 HDA_RST#
2400 MT/s 9 BOARD_ID2 BOARD_ID3 HDA_SYNC
3 6
8 BOARD_ID3 38 HDA_SYNC_AUDIO HDA_BITCLK
2 7
38 HDA_BITCLK_AUDIO HDA_SDOUT
110 Reserved RC1611 RC1613 RC1616 1 8
38 HDA_SDOUT_AUDIO
Board_ID
[2,1,0] Samsung 16Gb RPC44
001 2400 MT/s RC1612 RC1614 RC1615

ca
2

DEVSLP_GATE# RC4081 1 @ 2 10K_0402_5%

2K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5%

8,29 DEVSLP_GATE#

2
Hynix 16Gb
RC1616

RC1614

RC1612

RC1610

1K_0402_5%

1K_0402_5%

1K_0402_5%
1 RSMRST#_R
011 2400 MT/s RC1612 RC1613 RC1615 CC8784 RC87 1 2 100K_0402_5%

RC260

RC261

RC262
150P_0402_50V8-J SYS_PWRGD_R RC89 1 2 100K_0402_5%
Micron 16Gb EMC_NS@
1

101 RC1611 RC1614 RC1615 2

2400 MT/s

1
@ @ @ @
@ @ @
111 Reserved RC1611 RC1613 RC1615

l
0 Touch Panel RC1610
Board_ID3
RC4085 1 @ 2 10K_0402_5% BEEP_RESERVED_R
A 1 NON-Touch Panel RC1609 A

0 FP RC1607
Board_ID4
1 NON-FP RC1608
Security Classification LC Future Center Secret Data Title
0 Reserved RC123
Board_ID5
Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 AZ/I2C/ACPI/GPIO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
1 Reserved RC1606 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 7 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

EMC
LPCCLK0 KBRST# PCH_SPI_CLK
RC46 1 2 33_0402_5% LPC_RST#_R
+3VS_APU 12,44 APU_LPC_RST#

1
1
RC3237
RC3163
1
1
2
2
10K_0402_5%
10K_0402_5%
CLKREQ_PCIE1_CR#
WLAN_CLKREQ#
CC1318
150P_0402_50V8-J
RC282
0_0201_5%
EMC_NS@
eleTro-X Technical
RC139
10_0402_5%
EMC_NS@
RC3162 1 2 10K_0402_5% WWAN_CLKREQ# 2
1

2
RC3164 1 2 10K_0402_5% LAN_CLKREQ# CC8785
RC3180 1 2 10K_0402_5% HDD_CLKREQ# 150P_0402_50V8-J
RC3228 1 2 10K_0402_5% SYS_LAN_CLKREQ# EMC_NS@
D 1 2 1 D
CC219 CC26
22P_0201_25V8-J 10P_0201_25V8-J
EMC_NS@ EMC_NS@
2 2
UC1E

CLK/LPC/EMMC/SD/SPI/eSPI/UART

CLKREQ_PCIE1_CR# AV18
37 CLKREQ_PCIE1_CR# WLAN_CLKREQ# AN19 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
35 WLAN_CLKREQ# WWAN_CLKREQ# AP19 CLK_REQ1_L/AGPIO115
36 WWAN_CLKREQ# LAN_CLKREQ# AT19 CLK_REQ2_L/AGPIO116
32 LAN_CLKREQ# HDD_CLKREQ# AU19 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 +3VS_APU
29 HDD_CLKREQ# SYS_LAN_CLKREQ# AW18 CLK_REQ4_L/OSCIN/EGPIO132
31 SYS_LAN_CLKREQ# DEVSLP_GATE# AW19 CLK_REQ5_L/EGPIO120
7,29 DEVSLP_GATE# CLK_REQ6_L/EGPIO121
BD13 RC4084 1 2 0_0402_5%
EGPIO70/SD_CLK BB14 BB_RESET 9,36
CLK_PCIE_CR_R LPC_PD_L/SD_CMD/AGPIO21 LPC_APU_AD0 LPCPD# 12
RC3226 1 @ 20_0201_5% AK1 BB12 RC300 1 2 10_0402_5% LPC_AD0 12,44
37 CLK_PCIE_CR CLK_PCIE_CR#_R GPP_CLK0P LAD0/SD_DATA0/EGPIO104 LPC_APU_AD1 LPC_FRAME#
CR RC3227 1 @ 20_0201_5% AK3 BC11 RC301 1 2 10_0402_5% LPC_AD1 12,44 RC152 1 2 10K_0402_5%
37 CLK_PCIE_CR# GPP_CLK0N LAD1/SD_DATA1/EGPIO105 BB15 LPC_APU_AD2 1 2 1 2
RC302 10_0402_5% LPC_AD2 12,44 KBRST# RC3063 @ 10K_0402_5%
RC53 1 @ 20_0201_5% CLK_PCIE_WLAN_R AM2 LAD2/SD_DATA2/EGPIO106 BC15 LPC_APU_AD3 RC303 1 2 10_0402_5% EGPIO75 RC3197 1 2 10K_0402_5%
35 CLK_PCIE_WLAN CLK_PCIE_WLAN#_R GPP_CLK1P LAD3/SD_DATA3/EGPIO107 LPC_AD3 12,44 EPRIVACY_ON
WLAN RC54 1 @ 20_0201_5% AM4 BA15 LPCCLK0 RC126 1 2 3.3_0402_1% RC3256 1 @ 2 100K_0402_5%
35 CLK_PCIE_WLAN# GPP_CLK1N LPCCLK0/EGPIO74 LPC_CLKRUN# CLK_PCI_EC 12,44
BC13 place with 0.5 inch of APU
CLK_PCIE_WWAN_R LPC_CLKRUN_L/AGPIO88 LPC_CLKRUN# 12
RC51 1 @ 20_0201_5% AM1 BB13 EGPIO75
36 CLK_PCIE_WWAN 1 20_0201_5% CLK_PCIE_WWAN#_R AM3 GPP_CLK2P LPCCLK1/EGPIO75 BC12
WWAN/2nd SSD RC52 @ SERIRQ SERIRQ 12,44
36 CLK_PCIE_WWAN# GPP_CLK2N SERIRQ/AGPIO87 BA12 LPC_FRAME#

Ele
CLK_PCIE_LAN_R LFRAME_L/EGPIO109 LPC_FRAME# 12,44
RC3176 1 @ 20_0201_5% AL2
32 CLK_PCIE_LAN CLK_PCIE_LAN_R# GPP_CLK3P LPC_RST#_R
DOCK LAN W/ DASH RC3177 1 @ 20_0201_5% AL4 BD11
32 CLK_PCIE_LAN# GPP_CLK3N LPC_RST_L/SD_WP_L/AGPIO32 BA11 EPRIVACY_ON
C CLK_PCIE_HDD_R AGPIO68/SD_CD EC_SCI# EPRIVACY_ON 18 C
RC3178 1 @ 20_0201_5% AN2 BA13
EC_SCI# 44
29 CLK_PCIE_HDD CLK_PCIE_HDD#_R GPP_CLK4P LPC_PME_L/SD_PWR_CTRL/AGPIO22
SSD/HDD RC3179 1 @ 20_0201_5% AN4
29 CLK_PCIE_HDD# GPP_CLK4N
RC3247 1 @ 20_0201_5% CLK_PCIE_LAN_SYS_R AN3
31 CLK_PCIE_LAN_SYS CLK_PCIE_LAN_SYS#_R GPP_CLK5P
SYS LAN W/O DASH RC3248 1 @ 20_0201_5% AP2 BC8
31 CLK_PCIE_LAN_SYS# GPP_CLK5N SPI_ROM_REQ/EGPIO67 BB8
AJ2 SPI_ROM_GNT/AGPIO76
AJ4 GPP_CLK6P BB11 KBRST#
GPP_CLK6N ESPI_RESET_L/KBRST_L/AGPIO129 KBRST# 44
BC6 LDRQ0#
ESPI_ALERT_L/LDRQ0_L/EGPIO108 LDRQ0# 12 +1.8VALW
TC41 @ 1 48M_OSC AJ3
X48M_OSC

tro
BB7 SPI_CLK RC3083 1 2 10_0402_5%PCH_SPI_CLK
SPI_CLK/ESPI_CLK SPI_D1 PCH_SPI_CLK 12,51
BA9 RC3084 1 @ 2 0_0402_5% PCH_SPI_D1 SPI_CS#_TPM R11063 1 2 10K_0402_5%
X48M_X1 BB3 SPI_DI/ESPI_DAT1 BB10 SPI_D0 RC3085 1 @ 2 0_0402_5% PCH_SPI_D0 PCH_SPI_D1 51
X48M_X1 SPI_DO/ESPI_DAT0 BA10 SPI_D2 RC3087 1 @ 2 0_0402_5% PCH_SPI_D2 PCH_SPI_D0 51
SPI_WP_L/ESPI_DAT2 BC10 SPI_D3 RC3088 1 @ 2 0_0402_5% PCH_SPI_D3
SPI_HOLD_L/ESPI_DAT3 BC9 SPI_CS1# RC3089 1 @ 2 0_0402_5% PCH_SPI_CS1# AGPIO30 RC3158 1 2 10K_0402_5%
X48M_X2 BA5 SPI_CS1_L/EGPIO118 BA8 AGPIO30
X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30 BA6
SPI_CS3_L/AGPIO31 BD8 SPI_CS#_TPM
SPI_TPM_CS_L/AGPIO29 SPI_CS#_TPM 51
XGBECLK0 AF8
XGBECLK1 AF9 RSVD_76 BA16 APU_UART0_RXD
RSVD_77 UART0_RXD/EGPIO136 BB18 APU_UART0_TXD
UART0_TXD/EGPIO138

-X
BC17 APU_UART0_RTS# +1.8VS
UART0_RTS_L/UART2_RXD/EGPIO137 BA18 APU_UART0_CTS#
RC114 1 @ 2 0_0402_5% RTCCLK AW14 UART0_CTS_L/UART2_TXD/EGPIO135 BD18 APU_UART0_INTR APU_UART0_RXD RC3136 1 @ 2 1K_0402_1%
35 SUSCLK_32K RTCCLK UART0_INTR/AGPIO139 APU_UART0_TXD RC3137 1 @ 2 1K_0402_1%
APU_UART0_RTS# RC3138 1 @ 2 1K_0402_1%
X32K_X1 AY1 BC18 TOUCH_EN APU_UART0_CTS# RC3139 1 @ 2 1K_0402_1%
X32K_X1 EGPIO141/UART1_RXD BA17 APU_HUB1_RESET# TOUCH_EN 18 APU_UART0_INTR RC3140 1 @ 2 1K_0402_1%
EGPIO143/UART1_TXD BC16 APU_HUB2_RESET# APU_HUB1_RESET# 19
B
RC45 EGPIO142/UART1_RTS_L/UART3_RXD BB19 BOARD_ID3 APU_HUB2_RESET# 19 B
+3VS X32K_X2 EGPIO140/UART1_CTS_L/UART3_TXD BOARD_ID3 7 +1.8V_SPI
1 2 AY4 BB16
20M_0402_5% X32K_X2 AGPIO144/UART1_INTR RC4087 1 @ 2 0_0402_5% RPC55

Te
FULL_CARD_POWER_OFF 7,36 PCH_SPI_CS1# 1 4
YC2
1 2 PCH_SPI_D1 2 3
FP5 REV 0.90
PART 5 OF 13
32.768KHZ_9PF_9H03280012 @ 10K_0404_4P2R_5%
1 SJ10000J900 AMD-RAVEN-FP5_BGA1140 PCH_SPI_D2
1 1 R11245 1 @ 2 10K_0402_5%
C8793 PCH_SPI_D3 R11246 1 @ 2 10K_0402_5%
0.1U_0201_6.3V6-K CC21 CC22
2 10PC_50VC_JC_NPOC_0402 10PC_50VC_JC_NPOC_0402 +3VS_APU
@ U130 2 2
5 1

ch
Vcc OE XGBECLK0 RC10 1 @ 2 150_0402_1%
2 RTCCLK +1.8V_SPI +1.8VALW XGBECLK1 RC6 1 @ 2 150_0402_1%
IN_A UC3
SUSCLK_32K PCH_SPI_CS1# +1.8V_SPI 0.085 A
4 3 1 8 RC435 1 @ 2 0_0402_5%
OUT_Y GND PCH_SPI_D1 2 /CS VCC 7 PCH_SPI_D3
PCH_SPI_D2 3 DO(IO1) /HOLDor/RESET(IO3) 6 PCH_SPI_CLK
/WP(IO2) CLK PCH_SPI_D0 1
M74VHC1GT125DF2G_SC70-5 4 5
48MHz/10pF Crystal X48M_X1 GND DI(IO0) CC220
@ PCH_SPI_CS1# EC_SPI_CS1#
S IC FL 128M W 25Q128FWSIQ SOIC 8P 1.8V 0.1U_0201_6.3V6-K RC411 1 @ 20_0201_5%
X48M_X2 2 PCH_SPI_D0 EC_SPI_SI EC_SPI_CS1# 44
RC412 1 @ 20_0201_5%
16MB(128Mb) PCH_SPI_D1 RC413 1 @ 20_0201_5% EC_SPI_SO EC_SPI_SI 44

ni
PCH_SPI_CLK EC_SPI_CLK EC_SPI_SO 44
RC414 1 2 0_0201_5%
EC_SPI_CLK 44
RC5 1 2 1M_0402_5%

YC1
RC414 need to change
A 1 4 A
OSC1 NC2
2 3

ca
NC1 OSC2
1 1
CC28 48MHZ_10PF_7V48000017 CC29
8P_0402_50V8-C 8P_0402_50V8-C Title
2 2 Security Classification LC Future Center Secret Data
Issued Date 2015/11/02 Deciphered Date 2015/8/10 CLK/LPC/SD/EMMC/UART
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1

l
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 8 of 66
5 4 3 2 1

eleTro-X Technical
C
 5 4 3 2 1

eleTro-X Technical

D D
UC1J

USB

USB30_C_TX3AP AD2 AE7

22 USB30_C_TX3AP USB30_C_TX3AN USBC0_A2/USB_0_TXP0/DP3_TXP2 USB_0_DP0 USBP3+ 26
AD4 AE6
22 USB30_C_TX3AN USBC0_A3/USB_0_TXN0/DP3_TXN2 USB_0_DM0 USBP3- 26 TYPE C W/DP +3VALW_APU
USB30_C_RX3AP AC2 AG10
22 USB30_C_RX3AP USB30_C_RX3AN USBC0_B11/USB_0_RXP0/DP3_TXP3 USB_0_DP1 USBP1+_AOU 30
AC4 AG9
22 USB30_C_RX3AN USBC0_B10/USB_0_RXN0/DP3_TXN3 USB_0_DM1 USBP1-_AOU 30 TYPE A AOU
TYPE C W/DP USB30_C_TX3BP AF4 AF12
22 USB30_C_TX3BP USB30_C_TX3BN USBC0_B2/DP3_TXP1 USB_0_DP2 USBP0+ 30
AF2 AF11 RPC56
22 USB30_C_TX3BN USBC0_B3/DP3_TXN1 USB_0_DM2 USBP0- 30 TYPE A USB_OC1# 1 4
USB30_C_RX3BP AE3 AE10 USB_OC2# 2 3
22 USB30_C_RX3BP USB30_C_RX3BN USBC0_A11/DP3_TXP0 USB_0_DP3 DOCK_USB2P 25
AE1 AE9
22 USB30_C_RX3BN USBC0_A10/DP3_TXN0 USB_0_DM3 DOCK_USB2N 25 CS18 10K_0404_4P2R_5%
USB3P1_TXP_AOU AG3 AJ12
27 USB3P1_TXP_AOU USB3P1_TXN_AOU USB_0_TXP1 USB_1_DP0 USB_HUB2_DP 19
AG1 AJ11
27 USB3P1_TXN_AOU USB_0_TXN1 USB_1_DM0 USB_HUB2_DN 19 USB HUB2
USB3P1_RXP_AOU AJ9 AD9
TYPE A AOU 27 USB3P1_RXP_AOU USB3P1_RXN_AOU AJ8 USB_0_RXP1 USB_1_DP1 AD8
USB_HUB1_DP 19
27 USB3P1_RXN_AOU USB_0_RXN1 USB_1_DM1 USB_HUB1_DN 19 USB HUB1

Ele
USB3P0_TXP AG4
27 USB3P0_TXP USB3P0_TXN USB_0_TXP2
AG2
27 USB3P0_TXN USB_0_TXN2
USB3P0_RXP AG7
TYPE A 27 USB3P0_RXP USB3P0_RXN AG6 USB_0_RXP2 AM6
USBC_SCL
RC268 1 @ 2 0_0402_5% APU_USBC_SCL
27 USB3P0_RXN USB_0_RXN2 USBC_I2C_SCL APU_USBC_SCL 15
USB30_TX_P3 AA2 AM7
USBC_SDA
RC269 1 @ 2 0_0402_5% APU_USBC_SDA
23 USB30_TX_P3 USB30_TX_N3 USBC1_A2/USB_0_TXP3/DP2_TXP2 USBC_I2C_SDA APU_USBC_SDA 15
AA4
23 USB30_TX_N3 USBC1_A3/USB_0_TXN3/DP2_TXN2
C USB30_RX_P3 Y1 C
23 USB30_RX_P3 USB30_RX_N3 USBC1_B11/USB_0_RXP3/DP2_TXP3
Y3
23 USB30_RX_N3 USBC1_B10/USB_0_RXN3/DP2_TXN3

tro
CS18 USB30_TX_P4 AC1
23 USB30_TX_P4 USB30_TX_N4 USBC1_B2/DP2_TXP1
AC3 @
23 USB30_TX_N4 USBC1_B3/DP2_TXN1 AK10 BOARD_ID2 7 RC4082 1 2 0_0402_5%
USB30_RX_P4 AB2 USB_OC0_L/AGPIO16 AK9 USB_OC1# BB_RESET 8,36
23 USB30_RX_P4 USB30_RX_N4 USBC1_A11/DP2_TXP0 USB_OC1_L/AGPIO17 USB_OC2# USB_OC1# 30
AB4 AL9
23 USB30_RX_N4 USBC1_A10/DP2_TXN0 USB_OC2_L/AGPIO18 USB_OC2# 30
AL8 SKU_ID1 32
AH4 USB_OC3_L/AGPIO24 AW7
USB_1_TXP0 AGPIO14/USB_OC4_L BOARD_ID0 7
AH2 AT12 BOARD_ID1 7
USB_1_TXN0 AGPIO13/USB_OC5_L
AK7
AK6 USB_1_RXP0

-X
USB_1_RXN0
FP5 REV 0.90
PART 10 OF 13

AMD-RAVEN-FP5_BGA1140
@

Te
UC1M

UC1L
CAMERAS

RSVD A18 B15

CAM0_CSI2_CLOCKP CAM0_CLK

ch
B T11 AA9 C18 B
RSVD_32 RSVD_62 AA8 CAM0_CSI2_CLOCKN D15
AC7 RSVD_61 AC6 A15 CAM0_I2C_SCL C14
RSVD_66 RSVD_65 C15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA
CAM0_CSI2_DATAN0 B13
Y9 B16 CAM0_SHUTDOWN
Y10 RSVD_55 AD11 C16 CAM0_CSI2_DATAP1
RSVD_56 RSVD_72 CAM0_CSI2_DATAN1
W11 AC9 C19
W12 RSVD_47 RSVD_67 AA11 B18 CAM0_CSI2_DATAP2
RSVD_48 RSVD_63 CAM0_CSI2_DATAN2

ni
V9 T12 B17
V10 RSVD_38 RSVD_33 AD12 D17 CAM0_CSI2_DATAP3
RSVD_39 RSVD_73 CAM0_CSI2_DATAN3
Y6 D12 B10
RSVD_53 Y7 B12 CAM1_CSI2_CLOCKP CAM1_CLK
RSVD_54 CAM1_CSI2_CLOCKN A11
AA12 W8 C13 CAM1_I2C_SCL C11

ca
AC10 RSVD_64 RSVD_45 W9 A13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA
RSVD_68 RSVD_46 CAM1_CSI2_DATAN0 D11
B11 CAM1_SHUTDOWN
C12 CAM1_CSI2_DATAP1 D13
FP5 REV 0.90
PART 12 OF 13
CAM1_CSI2_DATAN1 CAM_PRIV_LED D10
J13 CAM_IR_ILLU
AMD-RAVEN-FP5_BGA1140 FP5 REV 0.90
RSVD_6 PART 13 OF 13
@
AMD-RAVEN-FP5_BGA1140

l
@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 USB/WIFI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 9 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

+1.8VALW
+3VS +3VS_APU +VDDC_VDD
+VDDCR_SOC UC1F
@
J2 1 2 JUMP_43X39 35A
Delete 22U 0603 and place PWR portion under SOC
eleTro-X Technical
CC75 CC76 1 2
BO 1
+3VALW +3VALW_APU 10A M15
POWER
G7
1 BU1 VDDCR_SOC_1 VDDCR_1
@ M18 G10

22U_0603_6.3V6-M
CC74
BO
J3 1 2 JUMP_43X39 M19 VDDCR_SOC_2 VDDCR_2 G12 All BU(on bottom side under SOC)
1 2 VDDCR_SOC_3 VDDCR_3

1U_0201_6.3V6-M

1U_0201_6.3V6-M
N16 G14
2 2 2 N18 VDDCR_SOC_4 VDDCR_4 H8
D N20 VDDCR_SOC_5 VDDCR_5 H11 Need discuss if space enough ,reserves others component D
P17 VDDCR_SOC_6 VDDCR_6 H15
P19 VDDCR_SOC_7 VDDCR_7 K7
R18 VDDCR_SOC_8 VDDCR_8 K12
R20 VDDCR_SOC_9 VDDCR_9 K14
T19 VDDCR_SOC_10 VDDCR_10 L8
CD@ U18 VDDCR_SOC_11 VDDCR_11 M7 +VDDC_VDD
U20 VDDCR_SOC_12 VDDCR_12 M10
+1.8VS +1.2V V19 VDDCR_SOC_13 VDDCR_13 N14
+3VS_APU W18 VDDCR_SOC_14 VDDCR_14 P7
W20 VDDCR_SOC_15 VDDCR_15 P10
Y19 VDDCR_SOC_16 VDDCR_16 P13
VDDCR_SOC_17 VDDCR_17 1
CC1391 CC39 P15 CC44

180P_0402_50V8-J
CC41 CC47 T32 VDDCR_18 R8
1 VDDIO_MEM_S3_1 VDDCR_19
1 1 1 BU 1 BO 1 V28 R14
BU BO W28 VDDIO_MEM_S3_2 VDDCR_20 R16 2
22U_0603_6.3V6-M

22U_0603_6.3V6-M
CC46 CC40
BO
VDDIO_MEM_S3_3 VDDCR_21
1U_0201_6.3V6-M

BO W32 T7
2 +1.8VALW +1.8VS VDDIO_MEM_S3_4 VDDCR_22
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M
Y22 T10
2 2 2 2 2 Y25 VDDIO_MEM_S3_5 VDDCR_23 T13
Y28 VDDIO_MEM_S3_6 VDDCR_24 T15 All BU(on bottom side under SOC)
AA20 VDDIO_MEM_S3_7 VDDCR_25 T17
AA23 VDDIO_MEM_S3_8 VDDCR_26 U14
Reserves for 1.8V HDA for codec AA26 VDDIO_MEM_S3_9 VDDCR_27 U16
VDDIO_MEM_S3_10 VDDCR_28

2
AA28 V13
CD@ RC3184 AA32 VDDIO_MEM_S3_11 VDDCR_29 V15
CD@ @ 0_0603_5%
AC20 VDDIO_MEM_S3_12 VDDCR_30 V17
AC22 VDDIO_MEM_S3_13 VDDCR_31 W7
AC25 VDDIO_MEM_S3_14 VDDCR_32 W10

1
AC28 VDDIO_MEM_S3_15 VDDCR_33 W14 +VDDCR_SOC
AD23 VDDIO_MEM_S3_16 VDDCR_34 W16
AD26 VDDIO_MEM_S3_17 VDDCR_35 Y8
+3VALW_APU RC3183 1 @ 2 0_0603_5% +VDDIO_AZ AD28 VDDIO_MEM_S3_18 VDDCR_36 Y13
C AD32 VDDIO_MEM_S3_19 VDDCR_37 Y15 C
1 CC56

Ele
1 VDDIO_MEM_S3_20 VDDCR_38
AE20 Y17

22U_0603_6.3V6-M
CC55
BU AE22 VDDIO_MEM_S3_21 VDDCR_39 AA7
BO 1 1

1U_0402_6.3V7-K
VDDIO_MEM_S3_22 VDDCR_40

1U_0201_6.3V6-M

CC57
CC72 CC73 AE25 AA10 CC58

180P_0402_50V8-J
2 2 AE28 VDDIO_MEM_S3_23 VDDCR_41 AA14
AF23 VDDIO_MEM_S3_24 VDDCR_42 AA16
1 1
BU BO 1 VDDIO_MEM_S3_25 VDDCR_43 2 2
AF26 AA18
22U_0603_6.3V6-M

CC71
BO VDDIO_MEM_S3_26 VDDCR_44
AF28 AB13
VDDIO_MEM_S3_27 VDDCR_45
1U_0201_6.3V6-M

1U_0201_6.3V6-M

AF32 AB15
2 2 2 AG20 VDDIO_MEM_S3_28 VDDCR_46 AB17
AG22 VDDIO_MEM_S3_29 VDDCR_47 AB19 All BU(on bottom side under SOC)
AG25 VDDIO_MEM_S3_30 VDDCR_48 AC14
AG28 VDDIO_MEM_S3_31 VDDCR_49 AC16
AJ20 VDDIO_MEM_S3_32 VDDCR_50 AC18
AJ23 VDDIO_MEM_S3_33 VDDCR_51 AD7
VDDIO_MEM_S3_34 VDDCR_52

tro
AJ26 AD10
CD@ AJ28 VDDIO_MEM_S3_35 VDDCR_53 AD13
AJ32 VDDIO_MEM_S3_36 VDDCR_54 AD15
+0.9VS +0.9VALW +3VALW_APU +1.8VALW +1.8VS +3VS_APU AK28 VDDIO_MEM_S3_37 VDDCR_55 AD17
AL28 VDDIO_MEM_S3_38 VDDCR_56 AD19
AL32 VDDIO_MEM_S3_39 VDDCR_57 AE8 +1.2V
VDDIO_MEM_S3_40 VDDCR_58 AE14
4A 1A 0.25A 0.5A 2A 0.25A +VDDIO_AZ AP12 VDDCR_59 AE16
+0.9VALW VDDIO_AUDIO VDDCR_60 AE18 CC59 CC60 CC61 CC62 CC63 CC64 CC65 CC66 CC67 CC68 CC69
AL18 VDDCR_61 AF7
VDD_33_1 VDDCR_62

22U_0402_4V6-M

22U_0402_4V6-M

22U_0402_4V6-M
AM17 AF10 1 1 1 1 1 1 1 1 1 1 1 1

1U_0402_6.3V7-K

1U_0402_6.3V7-K
VDD_33_2 VDDCR_63

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
AF13

22U_0603_6.3V6-M
AL20 VDDCR_64 AF15 CC70
AM19 VDD_18_1 VDDCR_65 AF17 180P_25V_K_X7R_0201
CC84 CC85 CC86 VDD_18_2 VDDCR_66 AF19 2 2 2 2 2 2 2 2 2 2 2 2

-X
AL19 VDDCR_67 AG14
1 BU BU BO VDD_18_S5_1 VDDCR_68
AM18 AG16
22U_0603_6.3V6-M

CC83 1 1 1
B BO VDD_18_S5_2 VDDCR_69 AG18 B
VDDCR_70 CD@ @ @
AL17 AH13
2 VDD_33_S5_1 VDDCR_71
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

AM16 AH15
2 2 2 VDD_33_S5_2 VDDCR_72 AH17 All BU(on bottom side under SOC)
AL14 VDDCR_73 AH19
AL15 VDDP_S5_1 VDDCR_74 AJ7
AM14 VDDP_S5_2 VDDCR_75 AJ10 COST DOWN 4 PIECES
VDDP_S5_3 VDDCR_76 AJ14
AL13 VDDCR_77 AJ16
AM12 VDDP_1 VDDCR_78 AJ18

Te
CD@ AM13 VDDP_2 VDDCR_79 AK13
VDDP_3 VDDCR_80
+RTC_LDO AN12
VDDP_4 VDDCR_81
AK15
AN13 AK17
VDDP_5 VDDCR_82 AK19
1K_0402_5% 1 RC101 2 +VDDBT_RTC 0.1A AT11 VDDCR_83
VDDBT_RTC_G
FP5 REV 0.90
+1.2V

1U_0402_6.3V7-K
PART 6 OF 13
1

JCMOS1 1 1 AMD-RAVEN-FP5_BGA1140 DECOUPLING BETWEEN PROCESSOR AND DIMMs

+0.9VS @

CC87
ACROSS VDDIO AND VSS SPLIT
@
CC88
2

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
ch
SHORT PADS
2 2

0.22U_0402_10V6-K
BO
1 1 1 1 1 1
CC81 CC82

180P_0402_50V8-J

180P_0402_50V8-J
CC77

CC78

CC79

CC80
CC91 CC92 CC93 CC94 CC95 CC96 CC97 CC98
1 1 1 1 1 1 1 1 1 BO
1 BU 1 2 2 2 2 2 2
BO BU BU BU BO BO CC99
180P_0402_50V8-J

BO BU
CC90
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

CC89
22U_0603_6.3V6-M

22U_0603_6.3V6-M

2 2 2 2 2 2 2 2 2 2 2
CD@
A A
All BU(on bottom side under SOC)

ni
4x0.22UF (0402)+2x180PF(0402)

CD@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 POWER

ca
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 10 of 66
5 4 3 2 1

eleTro-X Technical
l
 5 4 3 2 1

eleTro-X Technical

D D

UC1G UC1H UC1K

GND GND GND/RSVD

N12 K32 V8 AG8 AR5 BD16
A3 VSS_316 VSS_62 L5 V11 VSS_124 VSS_186 AG11 AR7 VSS_248 VSS_310 BD19
A5 VSS_1 VSS_63 L13 V12 VSS_125 VSS_187 AG12 AR12 VSS_249 VSS_311 BD21
A7 VSS_2 VSS_64 L15 V14 VSS_126 VSS_188 AG13 AR14 VSS_250 VSS_312 BD23
A10 VSS_3 VSS_65 L18 V16 VSS_127 VSS_189 AG15 AR16 VSS_251 VSS_313 BD26
A12 VSS_4 VSS_66 L20 V18 VSS_128 VSS_190 AG17 AR19 VSS_252 VSS_314 BD30
A14 VSS_5 VSS_67 L25 V20 VSS_129 VSS_191 AG19 AR21 VSS_253 VSS_315
A16 VSS_6 VSS_68 L28 V22 VSS_130 VSS_192 AH14 AR26 VSS_254
VSS_7 VSS_69 VSS_131 VSS_193 VSS_255

Ele
A19 M1 V25 AH16 AR28
A21 VSS_8 VSS_70 M5 W1 VSS_132 VSS_194 AH18 AR32 VSS_256
A23 VSS_9 VSS_71 M12 W5 VSS_133 VSS_195 AH20 AU5 VSS_257
A26 VSS_10 VSS_72 M21 W13 VSS_134 VSS_196 AJ1 AU8 VSS_258
A30 VSS_11 VSS_73 M23 W15 VSS_135 VSS_197 AJ5 AU11 VSS_259
C3 VSS_12 VSS_74 M26 W17 VSS_136 VSS_198 AJ13 AU13 VSS_260
C32 VSS_13 VSS_75 M28 W19 VSS_137 VSS_199 AJ15 AU15 VSS_261
D16 VSS_14 VSS_76 M32 W23 VSS_138 VSS_200 AJ17 AU18 VSS_262
D18 VSS_15 VSS_77 N4 W26 VSS_139 VSS_201 AJ19 AU20 VSS_263
D20 VSS_16 VSS_78 N5 Y5 VSS_140 VSS_202 AK5 AU22 VSS_264
C E7 VSS_17 VSS_79 N8 Y11 VSS_141 VSS_203 AK8 AU25 VSS_265 B20 C
E8 VSS_18 VSS_80 N11 Y12 VSS_142 VSS_204 AK11 AU28 VSS_266 RSVD_1 G3
VSS_19 VSS_81 VSS_143 VSS_205 VSS_267 RSVD_5

tro
E10 N13 Y14 AK12 AV1 J20
E11 VSS_20 VSS_82 N15 Y16 VSS_144 VSS_206 AK14 AV5 VSS_268 RSVD_7 K3
E12 VSS_21 VSS_83 N17 Y18 VSS_145 VSS_207 AK16 AV7 VSS_269 RSVD_8 K6
E13 VSS_22 VSS_84 N19 Y20 VSS_146 VSS_208 AK18 AV10 VSS_270 RSVD_9 K20
E14 VSS_23 VSS_85 N22 AA1 VSS_147 VSS_209 AK20 AV12 VSS_271 RSVD_10 M3
E15 VSS_24 VSS_86 N25 AA5 VSS_148 VSS_210 AK22 AV14 VSS_272 RSVD_11 M6
E16 VSS_25 VSS_87 N28 AA13 VSS_149 VSS_211 AK25 AV16 VSS_273 RSVD_12 M13
E18 VSS_26 VSS_88 P1 AA15 VSS_150 VSS_212 AL1 AV19 VSS_274 RSVD_13 P6
E19 VSS_27 VSS_89 P5 AA17 VSS_151 VSS_213 AL5 AV21 VSS_275 RSVD_22 P22
E20 VSS_28 VSS_90 P14 AA19 VSS_152 VSS_214 AL7 AV23 VSS_276 RSVD_23 T3
E21 VSS_29 VSS_91 P16 AB14 VSS_153 VSS_215 AL10 AV26 VSS_277 RSVD_30 T6
E22 VSS_30 VSS_92 P18 AB16 VSS_154 VSS_216 AL12 AV28 VSS_278 RSVD_31 T29

-X
E23 VSS_31 VSS_93 P20 AB18 VSS_155 VSS_217 AL16 AV32 VSS_279 RSVD_37 W6
E25 VSS_32 VSS_94 P23 AB20 VSS_156 VSS_218 AL23 AW5 VSS_280 RSVD_44 W21
E26 VSS_33 VSS_95 P26 AC5 VSS_157 VSS_219 AL26 AW28 VSS_281 RSVD_49 W22
E27 VSS_34 VSS_96 P28 AC8 VSS_158 VSS_220 AM5 AY6 VSS_282 RSVD_50 Y21
F5 VSS_35 VSS_97 P32 AC11 VSS_159 VSS_221 AM8 AY7 VSS_283 RSVD_57 Y27
F28 VSS_36 VSS_98 R5 AC12 VSS_160 VSS_222 AM15 AY8 VSS_284 RSVD_58 AA3
G1 VSS_37 VSS_99 R11 AC13 VSS_161 VSS_223 AM20 AY10 VSS_285 RSVD_59 AA6
G5 VSS_38 VSS_100 R12 AC15 VSS_162 VSS_224 AM22 AY11 VSS_286 RSVD_60 AC29
G16 VSS_39 VSS_101 R13 AC17 VSS_163 VSS_225 AM25 AY12 VSS_287 RSVD_69 AD3

Te
G19 VSS_40 VSS_102 R15 AC19 VSS_164 VSS_226 AM28 AY13 VSS_288 RSVD_70 AD6
G21 VSS_41 VSS_103 R17 AD1 VSS_165 VSS_227 AN1 AY14 VSS_289 RSVD_71 AF3
G23 VSS_42 VSS_104 R19 AD5 VSS_166 VSS_228 AN5 AY15 VSS_290 RSVD_74 AF6
G26 VSS_43 VSS_105 R22 AD14 VSS_167 VSS_229 AN7 AY16 VSS_291 RSVD_75 AF30
G28 VSS_44 VSS_106 R25 AD16 VSS_168 VSS_230 AN10 AY18 VSS_292 RSVD_78 AJ6
G32 VSS_45 VSS_107 R28 AD18 VSS_169 VSS_231 AN15 AY19 VSS_293 RSVD_79 AJ24
H5 VSS_46 VSS_108 R30 AD20 VSS_170 VSS_232 AN18 AY20 VSS_294 RSVD_80 AK23
H13 VSS_47 VSS_109 T1 AE5 VSS_171 VSS_233 AN21 AY21 VSS_295 RSVD_81 AK27
H18 VSS_48 VSS_110 T5 AE11 VSS_172 VSS_234 AN23 AY22 VSS_296 RSVD_82 AL3
VSS_49 VSS_111 VSS_173 VSS_235 VSS_297 RSVD_83

ch
B H20 T14 AE12 AN26 AY23 AN29 B
H22 VSS_50 VSS_112 T16 AE13 VSS_174 VSS_236 AN28 AY25 VSS_298 RSVD_87 AN31
H25 VSS_51 VSS_113 T18 AE15 VSS_175 VSS_237 AN32 AY26 VSS_299 RSVD_88
H28 VSS_52 VSS_114 T20 AE17 VSS_176 VSS_238 AP5 AY27 VSS_300
K1 VSS_53 VSS_115 T23 AE19 VSS_177 VSS_239 AP8 BB1 VSS_301
K5 VSS_54 VSS_116 T26 AF1 VSS_178 VSS_240 AP13 BB20 VSS_302
K16 VSS_55 VSS_117 T28 AF5 VSS_179 VSS_241 AP15 BB32 VSS_303 M14
K19 VSS_56 VSS_118 U13 AF14 VSS_180 VSS_242 AP18 BD3 VSS_304 RSVD_14 AL6
K21 VSS_57 VSS_119 U15 AF16 VSS_181 VSS_243 AP20 BD7 VSS_305 RSVD_84 AL11
K22 VSS_58 VSS_120 U17 AF18 VSS_182 VSS_244 AP25 BD10 VSS_306 RSVD_85 AN16
VSS_59 VSS_121 VSS_183 VSS_245 VSS_307 RSVD_86

ni
K26 U19 AF20 AP28 BD12
K28 VSS_60 VSS_122 V5 AG5 VSS_184 VSS_246 AR1 BD14 VSS_308
VSS_61 VSS_123 VSS_185 VSS_247 VSS_309
FP5 REV 0.90 FP5 REV 0.90 FP5 REV 0.90
PART 7 OF 13 PART 8 OF 13 PART 11 OF 13

AMD-RAVEN-FP5_BGA1140 AMD-RAVEN-FP5_BGA1140 AMD-RAVEN-FP5_BGA1140

@ @ @

ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 FP5 GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 11 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

eleTro-X Technical
+3VALW_APU

+1.8VS +1.8VALW

2
RC156

2
D 10K_0402_5% D
RC3134 RC3133
10K_0402_5% 10K_0402_5%

1
1

1
@ 7 SYS_RESET#
PCH_SPI_CLK
8,51 PCH_SPI_CLK

1
1
RC163
RC159 2K_0402_5%
2K_0402_5% @
@

2
2

Ele
STRAP PINS SYS_RESET#
1:USE 48MHZ CRYSTAL CLOCK AND
GENERATE BOTH INTERNAL AND EXTERNAL CLOCKS(DEFAULT)

tro
C C
0:USE 100MHZ PCIE CLOCK AS REFERENCE CLOCK AND
PCH_SPI_CLK GENERATE INTERNAL CLOCKS ONLY

1:NORMAL RESET MODE(DEFAULT)

SYS_RESET# 0:SHORT RESET MODE

-X
LPC ROM EMULATOR HEADER

Te
ch
+3VALW_APU +3VS_APU

@ PIN4 should be removed as a Key

2

CC1387 1 2 RC3205 1UN NA ME D_ 16 _C AP _I 11 6_ B

@ 2 33_0402_5%
B B
RC3147 RC3145
15P_0402_50V8-J 0_0402_5% 0_0402_5%
DAISY CHAIN ROUTING FOR LPC SIGNALS
1

CLK_PCI_EC LPC@ LPC@

ni
8,44 CLK_PCI_EC LPC_FRAME# 1 J601
2
8,44 LPC_FRAME# APU_LPC_RST# RC3144 1 LPC@ 2 0_0402_5% 3 4
8,44 APU_LPC_RST# LPC_RST#_H 5 6
UN NA ME D_ 16 _C ON 20 _I 13 0_ P6
2 0_0402_5% PM_SLP_S5#
RC3189 1 @
LPC_AD3 7 8 LPC_AD2 PM_SLP_S5# 7,44
8,44 LPC_AD3 LPCRUNPWR 9 10 LPC_AD1 LPC_AD2 8,44
LPC_AD0 11 12 LPC_AD1 8,44
8,44 LPC_AD0 APU_SMB_CK0 APU_SMB_CK0_LPC APU_SMB_DA0_LPC
RC3152 1 LPC@ 2 0_0402_5% 13 14 RC3190 1 LPC@ 2 0_0402_5%
7,16,17,19 APU_SMB_CK0 15 16 APU_SMB_DA0 7,16,17,19
SERIRQ
17 18 LPC_CLKRUN# SERIRQ 8,44

ca
19 20 LPC_CLKRUN# 8
LPCPD# LDRQ0#
8 LPCPD# LDRQ0# 8
1 1 HEADER_2X10
@
CC1394 CC1395
0.1U_0402_10V7-K 0.1U_0402_10V7-K
LPC@ 2 2 LPC@

RC3152 RC3153 should be put on APU side to reduce stub when MP

l
+3VS_APU

RC3149 2 LPC@ 1 10K_0402_5% LPCPD#

2 @ 1 10K_0402_5% LPC_CLKRUN#
RC3148

APU_LPC_RST#
RC3150 1 2 100K_0402_5%
A CC1388 1 2 A
150P_0402_50V8-J
@

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 RTC BATTERY

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 12 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

Ele
tro
C C

+3VL

+RTC_LDO

2
D249 50mA

-X
RB751V-40_SOD323-2
+RTCBATT +RTC_33 +RTC_LS +RTC_LDO
D250 UC5
@ JRTC1 R302 @

1
1 1 2 2 1 2 3 J49 2 1 JUMP_43X39
1 VIN VOUT 2 1

1
2
2 3 1K_0402_1% RC8
1 RB751V-40_SOD323-2
GND1

1
4 C9575 C9576 470_0603_5%
GND2 @ 1 4 @
1U_0402_6.3V7-K GND ENABLE 10U_0603_6.3V6M

12
HIGHS_WS33020-S0351-HF 2 NCP698SQ15T1G_SC-82AB4 D
R306 1 2 10K_0402_5% 2 EC_RTCRST#_ON

Te
EC_RTCRST#_ON 44
1 G

1
C9577 S QC7

3
@ 2N7002WT1G_SC-70-3 RC15
1U_0402_6.3V7-K @ 100K_0402_5%
2
VFB=0.8V @

2
ch
B B

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 RTC BATTERY

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 13 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

Rear Battery Switch

4
S5 +3VALW
SPVT210101_4P

1
R11129

Ele
10K_0201_5%

2
REAR_EJECT_LEVER#
REAR_EJECT_LEVER# 44

tro
C
EC Reset Switch C
VF = 0.35V, IR = 10uA
D751 1 2 RB521CM-30T2R_VMN2M-2 OTP_RESET# 54
D4078 1 2 1SS400CMT2R_VMN2M2 WRST#
WRST# 44

1
VF = 1.2V, IR = 0.1nA
S1

-X
SKRPABE010_4P
4

Te
ch
+RTC_33
Switch for D Cover Open

1
RE71
B 1M_0402_5% B

2
DCOVER_SW RE72 1 @ 2 0_0402_5% 2 S3 3 RE74 1 @ 2 0_0402_5%
7,44 DCOVER_SW APU_DCOVER_SW 7

ni
1

1
CE21 RE73
@ 1 4
1U_0402_6.3V6-K 1K_0402_1% SPVR310100_4P
2
2

ca
l
A A

Security Classification LC Future Center Secret Data Title

eleTro-X Technical Issued Date Deciphered Date USB TYPE-C SWITCH

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 14 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

+1.8VALW +1.8VALW

2
1
RC554
2.2K_0404_4P2R_5%

3
4
@

RC532 1 2 0_0402_5% EC_I2C2_SCL_PD_R 1 3

22,24 EC_I2C2_SCL_PD APU_I2C0_SCL 7
@ @
A. Vth = 1.5V (MAX)
QC50 B. Id = 200mA
SSM3K35MFV_2-1L1B
+1.8VALW C. RDSon = 10 ohm(MAX)
D. Vth in schematic = 0 - 1.8V

Ele

2
RC533 1 2 0_0402_5% EC_I2C2_SDA_PD_R 1 3
22,24 EC_I2C2_SDA_PD APU_I2C0_SDA 7
@ @
QC140
SSM3K35MFV_2-1L1B

tro
C C

V1P8_LDO_DOCK +1.8VALW +1.8VALW

-X 2

2
R11324 R11325 R11183 R11184
10K_0201_5% 10K_0201_5% 10K_0201_5% 10K_0201_5%

Te
2
1

1
@ @

1 3
24 CCG4_APU_USBC_SCL APU_USBC_SCL 9
@
A. Vth = 1.5V (MAX)
QC5 B. Id = 200mA
SSM3K35MFV_2-1L1B C. RDSon = 10 ohm(MAX)
D. Vth in schematic = 0 - 1.8V

ch
RC3260 1 @ 2 0_0402_5%

+1.8VALW

B B

ni
1 3
24 CCG4_APU_USBC_SDA APU_USBC_SDA 9
@
QC14
SSM3K35MFV_2-1L1B
RC3259 1 @ 2 0_0402_5%

ca
A

eleTro-X Technical
l Security Classification
Issued Date
LC Future Center Secret Data
Deciphered Date
Title
BLANK
A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 15 of 66
5 4 3 2 1
 5 4 3 2 1

+1.2V

2 2
eleTro-X Technical
CD65 CD64 +1.2V +2.5V
47P_0201_25V8-J 100P_0201_50V8-J +1.2V
RF@ RF@
1 1
1 1 1 1 1 1 1 1 1 1
CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD11 CD12

1
RD1 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K 1U_0402_6.3V6-K
D
2 2 2 2 2 2 2 2 2 2 D
CD@ CD@ CD@
1K_0402_1%

2
M_VREF_CA_DIMMA

+2.5V +1.2V +0.6VS

1
1 1
RD2 CD13 1 1
CD14 CD15 CD16 CD17 CD18 CD19 CD20 CD21 + CD22 CD23 CD24 CD25
2 2 1K_0402_1% 0.1U_0402_10V7-K @
CD67 CD66 2 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 330U_D2_2VM_R9M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K

2
47P_0201_25V8-J 100P_0201_50V8-J 2 2 2
RF@ RF@
1 1

Ele
+1.2V

+1.2V +1.2V

1
+2.5V +1.2V +1.2V +0.6VS RD3
JDDR1B
1K_0402_1%
JDDR1A

2
DDR_A_MA3 131 132 DDR_A_MA2
DDR_A_MA1 133 A3 A2 134
A1 EVENT_n/NF DDR_A_EVENT# 4
1 2 135 136
VSS_1 VSS_2 VDD_9 VDD_10

tro
DDR_A_D5 3 4 DDR_A_D4 SA_CLK_DDR0 137 138 SA_CLK_DDR1
DQ5 DQ4 4 SA_CLK_DDR0 SA_CLK_DDR#0 CK0_t CK1_t/NF SA_CLK_DDR#1 SA_CLK_DDR1 4
C 5 6 139 140 C
DDR_A_D1 VSS_3 VSS_4 DDR_A_D0 4 SA_CLK_DDR#0 CK0_c CK1_c/NF SA_CLK_DDR#1 4
7 8 141 142
9 DQ1 DQ0 10 DDR_A_PARITY 143 VDD_11 VDD_12 144 DDR_A_MA0
DDR_A_DQS#0 VSS_5 VSS_6 DDRA_MA_DM0 4 DDR_A_PARITY Parity A0
11 12
DDR_A_DQS0 13 DQS0_C DM0_n/DBl0_n 14
15 DQS0_t VSS_7 16 DDR_A_D6 DDR_A_BA1 145 146 DDR_A_MA10
DDR_A_D7 VSS_8 DQ6 4 DDR_A_BA1 BA1 A10/AP
17 18 147 148
19 DQ7 VSS_9 20 DDR_A_D2 DDR_A_CS0# 149 VDD_13 VDD_14 150 DDR_A_BA0
DDR_A_D3 VSS_10 DQ2 4 DDR_A_CS0# DDR_A_WE# CS0_n BA0 DDR_A_RAS# DDR_A_BA0 4
21 22 151 152
DQ3 VSS_11 DDR_A_D12 4 DDR_A_WE# A14/WE_n A16/RAS_n DDR_A_RAS# 4
23 24 153 154
DDR_A_D10 25 VSS_12 DQ12 26 DDR_A_ODT0 155 VDD_15 VDD_16 156 DDR_A_CAS#
DQ13 VSS_13 DDR_A_D8 4 DDR_A_ODT0 DDR_A_CS1# ODT0 A15/CAS_n DDR_A_MA13 DDR_A_CAS# 4
27 28 157 158
VSS_14 DQ8 4 DDR_A_CS1# CS1_n A13

-X
DDR_A_D13 29 30 159 160
31 DQ9 VSS_15 32 DDR_A_DQS#1 DDR_A_ODT1 161 VDD_17 VDD_18 162
DDRA_MA_DM1 VSS_16 DQS1_c DDR_A_DQS1 4 DDR_A_ODT1 ODT1 C0/CS2_n/NC M_VREF_CA_DIMMA
33 34 163 164
35 DM1_n/DBl1_n DQS1_t 36 165 VDD_19 VREFCA 166 SA2_CHA_P
DDR_A_D15 37 VSS_17 VSS_18 38 DDR_A_D9 167 C1/CS3_n/NC SA2 168
DQ15 DQ14 DDR_A_D37 VSS_53 VSS_54 DDR_A_D36 1 1
39 40 169 170 CD26 CD27
DDR_A_D14 41 VSS_19 VSS_20 42 DDR_A_D11 171 DQ37 DQ36 172
43 DQ10 DQ11 44 +3VS +3VS +3VS DDR_A_D33 173 VSS_55 VSS_56 174 DDR_A_D32 1000P_0402_50V7-K 0.1U_0402_10V7-K
DDR_A_D21 45 VSS_21 VSS_22 46 DDR_A_D20 175 DQ33 DQ32 176 2 2
47 DQ21 DQ20 48 DDR_A_DQS#4 177 VSS_57 VSS_58 178 DDRA_MA_DM4
VSS_23 VSS_24 DQS4_c DM4_n/DBl4_n

1
DDR_A_D17 49 50 DDR_A_D16 DDR_A_DQS4 179 180

Te
51 DQ17 DQ16 52 RD4 RD5 RD6 181 DQS4_t VSS_59 182 DDR_A_D39
DDR_A_DQS#2 53 VSS_25 VSS_26 54 DDRA_MA_DM2 @ @ @ DDR_A_D38 183 VSS_60 DQ39 184
DDR_A_DQS2 55 DQS2_c DM2_n/DBl2_n 56 10K_0402_5% 10K_0402_5% 10K_0402_5% 185 DQ38 VSS_61 186 DDR_A_D35
57 DQS2_t VSS_27 58 DDR_A_D22 DDR_A_D34 187 VSS_62 DQ35 188

2
DDR_A_D23 59 VSS_28 DQ22 60 189 DQ34 VSS_63 190 DDR_A_D45
61 DQ23 VSS_29 62 DDR_A_D18 SA0_CHA_P SA1_CHA_P SA2_CHA_P DDR_A_D44 191 VSS_64 DQ45 192
DDR_A_D19 63 VSS_30 DQ18 64 193 DQ44 VSS_65 194 DDR_A_D41
65 DQ19 VSS_31 66 DDR_A_D28 DDR_A_D40 195 VSS_66 DQ41 196
VSS_32 DQ28 DQ40 VSS_67
2

2
DDR_A_D29 67 68 197 198 DDR_A_DQS#5
69 DQ29 VSS_33 70 DDR_A_D24 RD22 RD7 RD8 DDRA_MA_DM5 199 VSS_68 DQS5_c 200 DDR_A_DQS5
DDR_A_D25 71 VSS_34 DQ24 72 201 DM5_n/DBl5_n DQS5_t 202

ch
DQ25 VSS_35 DDR_A_DQS#3 0_0402_5% 0_0402_5% 0_0402_5% DDR_A_D46 VSS_69 VSS_70 DDR_A_D47
73 74 203 204
DDRA_MA_DM3 75 VSS_36 DQS3_c 76 DDR_A_DQS3 205 DQ46 DQ47 206
1

1
77 DM3_n/DBl3_n DQS3_t 78 DDR_A_D42 207 VSS_71 VSS_72 208 DDR_A_D43
DDR_A_D30 79 VSS_37 VSS_38 80 DDR_A_D31 @ @ @ 209 DQ42 DQ43 210
81 DQ30 DQ31 82 DDR_A_D52 211 VSS_73 VSS_74 212 DDR_A_D53
B DDR_A_D26 83 VSS_39 VSS_40 84 DDR_A_D27 213 DQ52 DQ53 214 B
85 DQ26 DQ27 86 DDR_A_D49 215 VSS_75 VSS_76 216 DDR_A_D48
87 VSS_41 VSS_42 88 +1.2V 217 DQ49 DQ48 218
89 CB5/NC CB4/NC 90 DDR_A_DQS#6 219 VSS_77 VSS_78 220 DDRA_MA_DM6
91 VSS_43 VSS_44 92 DDR_A_DQS6 221 DQS6_c DM6_n/DBl6_n 222
93 CB1/NC CB0/NC 94 SPD Address = 0H 223 DQS6_t VSS_79 224 DDR_A_D54

ni
VSS_45 VSS_46 VSS_80 DQ54
1

95 96 DDR_A_D55 225 226

97 DQS8_c DM8_n/DBl8_n/NC 98 RD9 227 DQS5 VSS_81 228 DDR_A_D50
99 DQS8_t VSS_47 100 @ DDR_A_D51 229 VSS_82 DQ50 230
101 VSS_48 CB6/NC 102 1K_0402_1% 231 DQ51 VSS_83 232 DDR_A_D63
103 CB2/NC VSS_49 104 DDR_A_D61 233 VSS_84 DQ60 234
2

105 VSS_50 CB7/NC 106 235 DQ61 VSS_85 236 DDR_A_D59

107 CB3/NC VSS_51 108 R11328 1 2 33_0201_5% DDR_A_D60 237 VSS_86 DQ57 238
DDR_A_CKE0 109 VSS_52 RESET_n 110 DDR_A_CKE1 DDR4_A_DRAMRST# 4 239 DQ56 VSS_87 240 DDR_A_DQS#7
4 DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 4 DDRA_MA_DM7 VSS_88 DQS7_c DDR_A_DQS7
111 112 241 242

ca
DDR_A_BG1 113 VDD_1 VDD_2 114 DDR_A_ACT_N 243 DM7_n/DBl7_n DQS7_t 244
4 DDR_A_BG1 DDR_A_BG0 BG1 ACT_n DDR_A_ALERT_N DDR_A_ACT_N 4 DDR_A_D56 VSS_89 VSS_90 DDR_A_D62
115 116 245 246
4 DDR_A_BG0 BG0 ALERT_n DDR_A_ALERT_N 4 DQ62 DQ63
117 118 247 248
DDR_A_MA12 119 VDD_3 VDD_4 120 DDR_A_MA11 DDR_A_D57 249 VSS_91 VSS_92 250 DDR_A_D58
DDR_A_MA9 121 A12 A11 122 DDR_A_MA7 251 DQ58 DQ59 252
123 A9 A7 124 RD10 APU_SMB_CK0 253 VSS_93 VSS_94 254 APU_SMB_DA0
DDR_A_MA8 VDD_5 VDD_6 DDR_A_MA5 7,12,17,19 APU_SMB_CK0 SCL SDA SA0_CHA_P APU_SMB_DA0 7,12,17,19
125 126 2 1 255 256
DDR_A_MA6 A8 A5 DDR_A_MA4 +3VS VDDSPD SA0
127 128 257 258
129 A6 A4 130 259 VPP_1 VTT 260 SA1_CHA_P
VDD_7 VDD_8 1 0_0402_5% VPP_2 SA1
CD30 1 1
EMC_NS@ @ CD28 CD29 261 262

l
1 GND_1 GND_2
CD76 0.1U_0402_10V7-K
FOX_AS0A826-H4RB-7H 2 0.1U_0402_10V7-K 2.2U_0402_6.3V6-M FOX_AS0A826-H4RB-7H
4700P_0402_25V7-K 2 2
@ 2 @

2 2
CD74 CD75
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

DDRA_MA_DM[0..7] 4
A A
DDR_A_D[0..63] 4

DDR_A_MA[0..13] 4

DDR_A_DQS#[0..7] 4

DDR_A_DQS[0..7] 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 SO DIMM CHANNEL-A (1/2)
eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 16 of 66
5 4 3 2 1
 5 4 3 2 1

+1.2V

+1.2V
+0.6VS +1.2V
eleTro-X Technical
2 2

1
CD69 CD68 1 1
47P_0201_25V8-J 100P_0201_50V8-J RD11 CD39 CD40 CD41 1 1 1 1 1 1 1 1
RF@ RF@ CD31 CD32 CD33 CD34 CD35 CD36 CD37 CD38
1 1 1K_0402_1% 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K
2 2 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M

2
D
2 2 2 2 2 2 2 2 D
CD@ CD@

M_VREF_CA_DIMMB

+2.5V +1.2V

1
1
+2.5V RD12 CD42
1 1 1 1
1K_0402_1% 0.1U_0402_10V7-K CD43 CD44 CD45 CD46 CD47 CD48 CD49 CD50 CD51 CD52 CD53 CD54
2 CD63 CD62

2
10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 100U_1206_6.3V6-M 100U_1206_6.3V6-M
2 2 2 @ 2 @
CD@
2 2
CD71 CD70
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

Layout Node:
Place Close DIMMs

Ele
+1.2V

1
RD13
+2.5V +1.2V JDDR2B +1.2V +0.6VS
1K_0402_1%
+1.2V JDDR2A +1.2V

2
DDR_B_MA3 131 132 DDR_B_MA2
DDR_B_MA1 133 A3 A2 134
A1 EVENT_n DDR_B_EVENT# 5

tro
1 2 135 136
C DDR_B_D5 3 VSS_1 VSS_2 4 DDR_B_D4 SB_CLK_DDR0 137 VDD_9 VDD_10 138 SB_CLK_DDR1 C
DQ5 DQ4 5 SB_CLK_DDR0 SB_CLK_DDR#0 CK0_t CK1_t SB_CLK_DDR#1 SB_CLK_DDR1 5
5 6 139 140
DDR_B_D1 VSS_3 VSS_4 DDR_B_D0 5 SB_CLK_DDR#0 CK0_c CK1_c SB_CLK_DDR#1 5
7 8 141 142
9 DQ1 DQ0 10 DDR_B_PARITY 143 VDD_11 VDD_12 144 DDR_B_MA0
DDR_B_DQS#0 VSS_5 VSS_6 DDRA_MB_DM0 5 DDR_B_PARITY Parity A0
11 12
DDR_B_DQS0 13 DQS0_C DM0_n/DBIO_n 14
15 DQS0_t VSS_7 16 DDR_B_D6 DDR_B_BA1 145 146 DDR_B_MA10
DDR_B_D7 VSS_8 DQ6 5 DDR_B_BA1 BA1 A10/AP
17 18 147 148
19 DQ7 VSS_9 20 DDR_B_D2 DDR_B_CS0# 149 VDD_13 VDD_14 150 DDR_B_BA0
DDR_B_D3 VSS_10 DQ2 5 DDR_B_CS0# DDR_B_WE# CS0_n BA0 DDR_B_RAS# DDR_B_BA0 5
21 22 5 DDR_B_WE#
151 152 DDR_B_RAS# 5
23 DQ3 VSS_11 24 DDR_B_D12 153 WE_n/A14 RAS_n/A16 154
DDR_B_D13 25 VSS_12 DQ12 26 DDR_B_ODT0 155 VDD_15 VDD_16 156 DDR_B_CAS#
DQ13 VSS_13 5 DDR_B_ODT0 ODT0 CAS_n/A15 DDR_B_CAS# 5

-X
27 28 DDR_B_D8 DDR_B_CS1# 157 158 DDR_B_MA13
DDR_B_D9 VSS_14 DQ8 5 DDR_B_CS1# CS1_n A13
29 30 159 160
31 DQ9 VSS_15 32 DDR_B_DQS#1 DDR_B_ODT1 161 VDD_17 VDD_18 162
DDRA_MB_DM1 VSS_16 DQS1_c DDR_B_DQS1 5 DDR_B_ODT1 ODT1 C0/CS2_n/NC M_VREF_CA_DIMMB
33 34 163 164
35 DM1_n/DBl1_n DQS1_t 36 165 VDD_19 VREFCA 166 SA2_CHB_P
DDR_B_D15 37 VSS_17 VSS_18 38 DDR_B_D14 167 C1/CS3_n/NC RFU 168
DQ15 DQ14 DDR_B_D37 VSS_53 VSS_54 DDR_B_D36 1 1 1
39 40 169 170
DDR_B_D10 41 VSS_19 VSS_20 42 DDR_B_D11 171 DQ37 DQ36 172 CD56 CD57 CD58
43 DQ10 DQ11 44 DDR_B_D33 173 VSS_55 VSS_56 174 DDR_B_D32
DDR_B_D21 VSS_21 VSS_22 DDR_B_D20 DQ33 DQ32 2 2 2

1000P_0402_50V7-K

2.2U_0402_6.3V6-M

0.1U_0402_10V7-K
45 46 +3VS +3VS +3VS 175 176
47 DQ21 DQ20 48 DDR_B_DQS#4 177 VSS_57 VSS_58 178 DDRA_MB_DM4 @

Te
DDR_B_D17 49 VSS_23 VSS_24 50 DDR_B_D16 DDR_B_DQS4 179 DQS4_c DM4_n/DBl4_n 180
DQ17 DQ16 DQS4_t VSS_59

1
51 52 181 182 DDR_B_D39
DDR_B_DQS#2 53 VSS_25 VSS_26 54 DDRA_MB_DM2 RD14 RD15 RD16 DDR_B_D38 183 VSS_60 DQ39 184
DDR_B_DQS2 55 DQS2_c DM2_n/DBl2_n 56 @ @ 185 DQ38 VSS_61 186 DDR_B_D35
57 DQS2_t VSS_27 58 DDR_B_D22 10K_0402_5% 10K_0402_5% 10K_0402_5% DDR_B_D34 187 VSS_62 DQ35 188
DDR_B_D23 59 VSS_28 DQ22 60 189 DQ34 VSS_63 190 DDR_B_D45

2
61 DQ23 VSS_29 62 DDR_B_D18 DDR_B_D44 191 VSS_64 DQ45 192
DDR_B_D19 63 VSS_30 DQ18 64 SA0_CHB_P SA1_CHB_P SA2_CHB_P 193 DQ44 VSS_65 194 DDR_B_D41
65 DQ19 VSS_31 66 DDR_B_D28 DDR_B_D40 195 VSS_66 DQ41 196
DDR_B_D29 67 VSS_32 DQ28 68 197 DQ40 VSS_67 198 DDR_B_DQS#5
DQ29 VSS_33 VSS_68 DQS5_c

2
DDR_B_D24 DDRA_MB_DM5 DDR_B_DQS5

2
69 70 199 200

ch
VSS_34 DQ24 DM5_n/DBl5_n DQS5_t
2
DDR_B_D25 71 72 RD19 201 202
DQ25 VSS_35 DDR_B_DQS#3 RD18 DDR_B_D46 VSS_69 VSS_70 DDR_B_D47
73 74 RD17 0_0402_5% 203 204
DDRA_MB_DM3 VSS_36 DQS3_c DDR_B_DQS3 0_0402_5% DQ46 DQ47
75 76 0_0402_5% 205 206
77 DM3_n/DBl3_n DQS3_t 78 DDR_B_D42 207 VSS_71 VSS_72 208 DDR_B_D43

1
DDR_B_D30 VSS_37 VSS_38 DDR_B_D31 DQ42 DQ43

1
79 80 209 210
1

B 81 DQ30 DQ31 82 @ @ DDR_B_D52 211 VSS_73 VSS_74 212 DDR_B_D53 B

DDR_B_D26 83 VSS_39 VSS_40 84 DDR_B_D27 @ 213 DQ52 DQ53 214
85 DQ26 DQ27 86 DDR_B_D49 215 VSS_75 VSS_76 216 DDR_B_D48
87 VSS_41 VSS_42 88 +1.2V 217 DQ49 DQ48 218
89 CB5/NC CB4/NC 90 DDR_B_DQS#6 219 VSS_77 VSS_78 220 DDRA_MB_DM6
91 VSS_43 VSS_44 92 SPD Address = 2H DDR_B_DQS6 221 DQS6_c DM6_n/DBl6_n 222

ni
93 CB1/NC CB0/NC 94 223 DQS6_t VSS_79 224 DDR_B_D54
VSS_45 VSS_46 VSS_80 DQ54
1

95 96 DDR_B_D55 225 226

97 DQS8_c DBI8_n 98 @ RD20 227 DQ55 VSS_81 228 DDR_B_D50
99 DQS8_t VSS_47 100 DDR_B_D51 229 VSS_82 DQ50 230
101 VSS_48 CB6/NC 102 1K_0402_1% 231 DQ51 VSS_83 232 DDR_B_D60
103 CB2/NC VSS_49 104 DDR_B_D61 233 VSS_84 DQ60 234
2

105 VSS_50 CB7/NC 106 R11329 235 DQ61 VSS_85 236 DDR_B_D57
107 CB3/NC VSS_51 108 1 2 33_0201_5% DDR_B_D56 237 VSS_86 DQ57 238
DDR_B_CKE0 109 VSS_52 RESET_n 110 DDR_B_CKE1 DDR4_B_DRAMRST# 5 239 DQ56 VSS_87 240 DDR_B_DQS#7

ca
5 DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE1 5 DDRA_MB_DM7 VSS_88 DQS7_c DDR_B_DQS7
111 112 241 242
DDR_B_BG1 113 VDD_1 VDD_2 114 DDR_B_ACT_N 243 DM7_n/DBl7_n DQS7_t 244
5 DDR_B_BG1 DDR_B_BG0 BG1 ACT_n DDR_B_ALERT_N DDR_B_ACT_N 5 DDR_B_D62 VSS_89 VSS_90 DDR_B_D63
115 116 245 246
5 DDR_B_BG0 BG0 ALERT_n DDR_B_ALERT_N 5 DQ62 DQ63
117 118 247 248
DDR_B_MA12 119 VDD_3 VDD_4 120 DDR_B_MA11 DDR_B_D58 249 VSS_91 VSS_92 250 DDR_B_D59
DDR_B_MA9 121 A12 A11 122 DDR_B_MA7 251 DQ58 DQ59 252
A9 A7 1 RD21 APU_SMB_CK0 VSS_93 VSS_94 APU_SMB_DA0
123 124 253 254
DDR_B_MA8 VDD_5 VDD_6 DDR_B_MA5 7,12,16,19 APU_SMB_CK0 SCL SDA SA0_CHB_P APU_SMB_DA0 7,12,16,19
125 126 CD59 2 1 255 256
DDR_B_MA6 A8 A5 DDR_B_MA4 +3VS VDDSPD SA0
127 128 EMC_NS@ 257 258
129 A6 A4 130 2 0.1U_0402_10V7-K 259 VPP_1 Vtt 260 SA1_CHB_P
VDD_7 VDD_8 0_0402_5% VPP_2 SA1

l
1 1
1 CD77 @ CD60 CD61 261 262
GND_1 GND_2
FOX_AS0A826-H4SB-7H 4700P_0402_25V7-K 0.1U_0402_10V7-K 2.2U_0402_6.3V6-M FOX_AS0A826-H4SB-7H
2 2
@ 2 @

2 2
CD72 CD73
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

A A

DDRA_MB_DM[0..7] 5

DDR_B_D[0..63] 5

DDR_B_MA[0..13] 5

DDR_B_DQS#[0..7] 5

DDR_B_DQS[0..7] 5 Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 SO DIMM CHANNEL-B (1/2)
eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 17 of 66
5 4 3 2 1
 5 4 3 2 1

B+ VBL20

F7
eleTro-X Technical
1 2
TOUCH_EN_R
3A_32V_ERBRD3R00X 2 2
1 C9102 C9118
C724 47P_0201_25V8-J 100P_0201_50V8-J 2
0.01U_0402_25V7-K RF@ RF@ C10158
1 1 EMC@
2 10P_0201_25V8-J
D
RF 1 D

LCDVDD Circuit
+3VS +LCDVDD_CON EMC_NS@
PANEL_BKLT_CTRL C10050 2 1 1000P_0201_25V7-K
W= 60 mil U238 W= 60 mil
5 1
IN OUT
1
1 2 C9555
C9556 GND
APU_ENVDD 4 3 4.7U_0603_6.3V6-K
1U_0402_6.3VA-K EN OCB 2
2 SY6288C20AAC_SOT23-5
1

R11002

100K_0402_5%
2

Ele
VCC3LCD +LCDVDD_CON
APU_ENVDD
6 APU_ENVDD

@
R41117 1 2 0_0805_5%
0.9A
TOUCH_EN for touch panel
F3
1 2 Grug:need confirm with DC this power timing
For IR_LED

tro
+3VS +3VS Grug:be carefull
1

3A_32V_ERBRD3R00X
C C
R11175 +3VL +3VL +3VL +3VS +3VALW +3VS
2 0.5A_32V_ERBRD0R50X

1 1 1 1 1
@ 100K_0402_5% RF@ RF@
C315 C311 C308 C9101 C9117
2

1U_0402_6.3V6-K 0.1U_0201_6.3V6-K 0.01U_0201_6.3V7-K 47P_0201_25V8-J 100P_0201_50V8-J

100K_0201_5%

2 2 2 2 2

100K_0201_5%
1 1

2
RF@ RF@ F16 F26 F24

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
VBL20 C9103 C9119
RF@ 47P_0201_25V8-J 100P_0201_50V8-J 2 2

0.5A_32V_ERBRD0R50X
2 2

1A_32V_ERBRD1R00X
0.5A_32V_ERBRD0R50X
C10121 1 2 33P_0402_50V8-J
RF@ 1.2A
1

C10120 1 2 47P_0402_50V8-J

-X

1
1 1

C2578

C2579
JCAM1
2

1
F63

1 1 1 30 41
29 30 GND11 40
LCD CONNECTOR

1
29 GND10
R38

C307 C310 C313 28 39

0.01U_0402_25V7-K 0.1U_0402_25V6-K 1U_0603_25V6-K 27 28 GND9 38
@ 2 2 2 26 27 GND8 37

R8954
@ JLCD1 25 26 GND7 36
D743 1 2 RB521CM-30T2R_VMN2M 50 54 24 25 GND6 35
8 TOUCH_EN 50 GND4 24 GND5
49 53 23 34

Te
LID_SW# D742 1 2 RB521CM-30T2R_VMN2M TOUCH_EN_R 48 49 GND3 52 22 23 GND4 33
USBP9- R2078 1 @ 20_0201_5% USBP9-_CONN 47 48 GND2 51 21 22 GND3 32
19 USBP9- USBP9+_CONN 47 GND1 21 GND2
USBP9+ R2079 1 @ 20_0201_5% 46 20 31
19 USBP9+ 46 20 GND1
45 19
44 45 18 19
43 44 LOGO_LED# R102 1 2 3.9K_0402_1% 17 18
43 44 LOGO_LED# 17
42 16
41 42 15 16
40 41 USBP4-_CONN 14 15
39 40 USBP4+_CONN 13 14
38 39 12 13
37 38 11 12

ch
36 37 10 11
35 36 USBP7-_CONN 9 10
PANEL_BKLT_CTRL 34 35 USBP7+_CONN 8 9
6 PANEL_BKLT_CTRL 34 8
BKOFF# 33 7
44 BKOFF# 33 INT_MIC_DTCT# 7
32 6
32 7 INT_MIC_DTCT# MIC_DATA 6
31 EMC@ R513 1 2 33_0402_5% 5
31 38 MIC_DATA MIC_CLK 5
30 EMC@ R514 1 2 33_0402_5% 4
30 38 MIC_CLK 4
B 29 3 B
28 29 2 3
28 44 LID_SW# 2
27 1
26 27 1
25 26 I-PEX_20525-030E-02
24 25

ni
24 @
23
22 23
22 1 1 1
21 EMC_NS@ EMC@ EMC@
C8289 1 2 0.1U_0201_6.3V6-K EDP_AUXN_CONN 20 21 C33 C815 C817
6 EDP_AUXN EDP_AUXP_CONN 20
C8290 1 2 0.1U_0201_6.3V6-K 19 0.1U_0402_25V6-K 33P_0201_25V8-J 33P_0201_25V8-J
6 EDP_AUXP 19 2 2 2
18
C8299 1 2 0.1U_0201_6.3V6-K EDP_TXP0_CONN 17 18
6 EDP_TXP0 EDP_TXN0_CONN 17
C8298 1 2 0.1U_0201_6.3V6-K 16
6 EDP_TXN0 16
15
C8296 1 2 0.1U_0201_6.3V6-K EDP_TXP1_CONN 14 15

ca
6 EDP_TXP1 EDP_TXN1_CONN 14
C8295 1 2 0.1U_0201_6.3V6-K 13
6 EDP_TXN1 13
12 R786 1 @ 2 0_0402_5%
C9507 1 2 0.1U_0201_6.3V6-K EDP_TXP2_CONN 11 12
6 EDP_TXP2 EDP_TXN2_CONN 11
C9506 1 2 0.1U_0201_6.3V6-K 10 Power LED Board +3VALW
6 EDP_TXN2 10
@ 9 L10 EMC_NS@
C9504 1 @ 2 0.1U_0201_6.3V6-K EDP_TXP3_CONN 8 9 USBP7- 1 2 USBP7-_CONN
6 EDP_TXP3 EDP_TXN3_CONN 8 19 USBP7- 1 2
C9505 1 2 0.1U_0201_6.3V6-K 7
6 EDP_TXN3 7
@ 6
6 USBP7+_CONN

1
@ 5 USBP7+ 4 3 F31
5 19 USBP7+ 4 3
4 0.5A_32V_ERBRD0R50X
EPRIVACY_ON 3 4 DLW21SN900HQ2L_4P
8 EPRIVACY_ON 3
2 SM070003100
2

l
1
6 APU_EDP_HPD 1 R785 1 @ 2 0_0402_5%

2
EMC@

EMC@

EMC@

I-PEX_20455-050E-02
JPWR1
R9119 1 @ 2 0_0402_5% PWRSWITCH# 1
25,44 PWRSWITCH# LEDPWR#_R 1
LEDPWR# R13 1 2 680_0402_1% 2
44 LEDPWR# 2
3
USBP7-_CONN USBP7+_CONN 3
C9473

C9472

C2610

D311 D312 L15 EMC_NS@ 4

USBP4-_CONN 4
1

USBP4- 1 2 5
19 USBP4- 1 2 5

3
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

6
1

6
1

R668 1 1 1 J5 1 2 @
10K_0402_5% D91 D92 USBP4+ 4 3 USBP4+_CONN EMC@ 7
LID_SW# 19 USBP4+ 4 3 GND1
1

SHORT PADS D93 8

GND2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

DLW21SN900HQ2L_4P AZ5125-02S.R7G_SOT23-3
1

2 2 2 SM070003100 HIGHS_FC1AF061-2201H
2

1000P_0201_25V7-K

1000P_0201_25V7-K

1000P_0201_25V7-K

1 R9120 1 @ 2 0_0402_5%
A A
EMC@
2

1
VCC3LCD C9127
10P_0201_25V8-J
2
2

2
EMC@

EMC@

2
EMC@

EMC@

Change of the control method of E-PRIVACY LCD is supported.

eleTro-X Technical Security Classification

Issued Date 2015/11/02
LC Future Center Secret Data
Deciphered Date 2012/06/21
Title
LCD/LID/MIC/CAMERA/PWR SW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 18 of 66
5 4 3 2 1
 5 4 3 2 1

USB Hub1
+3VS

RH2 1 2 0_0603_5%
+3VS_HUB1

+3VS_HUB1
UH1 +3VS_HUB1 eleTro-X Technical +3VS_HUB1

HUB1_PSELF RH9 1 2 10K_0402_5%

USB_HUB1_DN 1 28
USB_HUB1_DP 2 DM0 V33 27
DP0 V5 SDA_HUB1 1 HUB1_PGANG
+3VS_HUB1 USBP4- 3 26 1 TP955 @ CH22 RH11 1 2 100K_0402_5%
USBP4+ 4 DM1 PWREN1#/SDA 25 HUB1_OVCUR1#
DP1
GL852G OVCUR1#/SMC HUB1_OVCUR2#
5 24 10U_0603_6.3V6-M
USBP6- 6 AVDD QFN28 OVCUR2#/SMD 23 HUB1_PGANG 2 +3VS_HUB1
9 USB_HUB1_DP +3VS_HUB1 7 DM2 PGANG 22 HUB1_PSELF
USBP6+
D 9 USB_HUB1_DN HUB1_RREF 8 DP2 PSELF 21 D

9 RREF DVDD 20 HUB1_OVCUR3# RH16 2 1 10K_0402_5%

GL852G1_X1 AVDD1 OVCUR3# HUB1_OVCUR4# +3VS_HUB1
1 1 10 19 RH40 1 2 10K_0402_5% 1
USBP4+ 18 GL852G1_X2 11 X1 OVCUR4# 18 1 2 0_0201_5%
CH3 CH4 RH37 @ CH2
USBP4- 18 IR Camera USBP9- 12 X2 TEST/SCL 17 HUB1_RESET# RH7 1 @ 2 0_0201_5% PLT_RST#
0.1U_0402_10V7-K 0.1U_0402_10V7-K USBP9+ 13 DM3 RESET# 16 USBP7+ RH36 1 20_0201_5% 10U_0603_6.3V6-M
USBP6+ 35 2 2 +3VS_HUB1 DP3 DP4 APU_HUB1_RESET# 8 2
14 15 USBP7-
USBP6- 35 M.2 WLAN BT AVDD2 DM4
29
USBP9+ 18 PAD HUB1_OVCUR4# RH17 1 210K_0402_5%
USBP9- 18 Touch Panel +3VS_HUB1
HUB1_RREF
USBP7+ 18 GL852G-OHY50_QFN28_5X5 @
USBP7- 18 2D Camera

1
RH19
KevinH: Need to check

1
PORT1 IR Camera 680_0402_1%
QH1 RH20
2N7002WT1G_SC-70-3 4.7K_0402_5%
PORT2 M.2 WLAN BT

2
APU_SMB_CK0 HUB1_OVCUR1#

D
PORT3 Touch Panel 3 1
A. Vth = 2.5V (MAX)
B. Id = 295 mA (MAX)
PORT4 2D Camera C. RDSon = 2.5 ohm(MAX)

G
2
D. Vth in schematic = 3.3V

Ele
+3VS_HUB1 +3VS

4
@
GL852G1_X1 1 3 RH15 1 20_0201_5% GL852G1_X2

1
1 1
YH1 RH8 RH18

2
CH5 CH6
20PC_50VC_JC_NPOC_0402
12MHZ_10PF_8Z12000006 20PC_50VC_JC_NPOC_0402 10K_0402_5% 10K_0402_5%
2 2

2
CH23 1 2 0.1U_0402_10V7-K

1
D
HUB1_RESET# 2 QH4

tro
G 2N7002WT1G_SC-70-3 +3VS_HUB1
S

3
C A. Vth = 2.5V (MAX) C
1 B. Id = 340 mA (MAX)
CH8

1
C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 3.3V
1U_0201_6.3V6-K RH21
2

2
G
4.7K_0402_5%

2
APU_SMB_DA0 3 1 HUB1_OVCUR2#

D
A. Vth = 2.5V (MAX)
B. Id = 295 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 3.3V

-X
QH2
2N7002WT1G_SC-70-3

USB Hub2 +3VS +3VS_HUB2

Te
UH2 +3VS_HUB2 +3VS_HUB2
RH22 1 @ 2 0_0603_5% +3VS_HUB2
HUB2_PSELF RH31 1 2 10K_0402_5%
USB_HUB2_DN 1 28
USB_HUB2_DP 2 DM0 V33 27 TP953
DP0 V5 SDA_HUB2 1 HUB2_PGANG
+3VS_HUB2 USBP8- 3 26 1 @ CH7 RH33 1 2 100K_0402_5%
USBP8+ 4 DM1 PWREN1#/SDA 25 HUB2_OVCUR1#
DP1
GL852G OVCUR1#/SMC HUB2_OVCUR2#
5 24 10U_0603_6.3V6-M
9 USB_HUB2_DP 6 AVDD QFN28 OVCUR2#/SMD 23 HUB2_PGANG 2 +3VS_HUB2
9 USB_HUB2_DN +3VS_HUB2 7 DM2 PGANG 22 HUB2_PSELF
HUB2_RREF 8 DP2 PSELF 21

ch
9 RREF DVDD 20 HUB2_OVCUR3# RH26 2 1 10K_0402_5%
USBP8+ 48 GL852G2_X1 AVDD1 OVCUR3# HUB2_OVCUR4# +3VS_HUB2
10 19 RH27 1 2 10K_0402_5%
USBP8- 48 Fingerprint 1
CH9
1
CH10 GL852G2_X2 11 X1 OVCUR4# 18 RH39 1 @ 2 0_0201_5%
1
CH24
USBP5- 12 X2 TEST/SCL 17 HUB2_RESET# RH28 1 @ 2 0_0201_5%
DM3 RESET# PLT_RST# 7,29,31,32,35,36,37,51
0.1U_0402_10V7-K 0.1U_0402_10V7-K USBP5+ 13 16 USBP2+ RH38 1 @ 20_0201_5% 10U_0603_6.3V6-M
2 2 +3VS_HUB2 DP3 DP4 APU_HUB2_RESET# 8 2
14 15 USBP2-
AVDD2 DM4
B USBP5+ 36 29 B
USBP5- 36 M.2 WWAN PAD HUB2_OVCUR4# RH41 1 2 10K_0402_5%
USBP2+ 48 HUB2_RREF +3VS_HUB2
Smart Cart @

ni
USBP2- 48 GL852G-OHY50_QFN28_5X5
1

RH32

1
680_0402_1%
RH34
QH6
2

2N7002WT1G_SC-70-3 4.7K_0402_5%
PORT1 Finger print

2
3 1 HUB2_OVCUR1#

D
ca
7,12,16,17 APU_SMB_CK0
A. Vth = 2.5V (MAX)
B. Id = 295 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
PORT3 M.2 WWAN

G
2
D. Vth in schematic = 3.3V
+3VS_HUB2 +3VS
PORT4 smart card

1
4

@ RH30 RH29
GL852G2_X1 1 3 RH23 1 20_0201_5% GL852G2_X2

l
1 1 10K_0402_5% 10K_0402_5%
YH2
2

2
CH11 CH12 CH1 1 2 0.1U_0402_10V7-K
20PC_50VC_JC_NPOC_0402
12MHZ_10PF_8Z12000006 20PC_50VC_JC_NPOC_0402

1
2 2 D
HUB2_RESET# 2 QH3
G 2N7002WT1G_SC-70-3 +3VS_HUB2
S

3
1 A. Vth = 2.5V (MAX)
CH21 B. Id = 340 mA (MAX)

1
C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 3.3V
1U_0201_6.3V6-K RH35
2

2
G
4.7K_0402_5%

2
A 3 1 HUB2_OVCUR2# A
7,12,16,17 APU_SMB_DA0
A. Vth = 2.5V (MAX)

D
B. Id = 295 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
QH5 D. Vth in schematic = 3.3V
2N7002WT1G_SC-70-3

eleTro-X Technical Security Classification

Issued Date
LC Future Center Secret Data
Deciphered Date
Title
BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 19 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS
+1.2V_RE

2 2 1
1 1 1 1 C10076 C10077

C10117
.01U_0402_25V7-K
C10116
.01U_0402_25V7-K
C10114
.01U_0402_25V7-K
C10115
.01U_0402_25V7-K 1
eleTro-X Technical
0.1U_0402_10V6-K
1
0.1U_0402_10V6-K
2
C10078
.01U_0402_25V7-K

2 2 2 2
CD@

D D

+1.2V_RE

+3VS +1.2V_RE
2 2 2 2 2 2 1
C2546 C2576 C2543 C2545 C10074 C2544
0.1U_0402_10V6-K 0.1U_0402_10V6-K 0.1U_0402_10V6-K 0.1U_0402_10V6-K 0.1U_0402_10V6-K 0.1U_0402_10V6-K C10075
4.7U_0402_6.3V6-M
1 1 1 1 1 1 2
CD@ CD@

HDMI Re-timer U147

24

15
18

43
46

30

11
1

6
VDD33_1
VDD33_2

VDDTX12_1
VDDTX12_2

VDDRX12_1
VDDRX12_2

VDD12_1
VDD12_2

VDDA12
+1.2V_RE

Ele
DCIN_EN 3 37
DCIN_ENB POWERSWITCH
C2522 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX0+_C 44 17 HDMI_TX0+_C
6 APU_HDMI_TX0+ 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX0-_C 45 IN_D0p OUT_D0p 16 HDMI_TX0-_C HDMI_TX0+_C 21
C2523 2 1
6 APU_HDMI_TX0- IN_D0n OUT_D0n HDMI_TX0-_C 21
C11187
C2524 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX1+_C 41 20 HDMI_TX1+_C 0.1U_0402_10V6-K C11188
6 APU_HDMI_TX1+ 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX1-_C 42 IN_D1p OUT_D1p 19 HDMI_TX1-_C HDMI_TX1+_C 21
C2525 0.01U_0402_25V7-K
6 APU_HDMI_TX1- IN_D1n OUT_D1n HDMI_TX1-_C 21 1 2
1 2 0.1U_0201_6.3V6-K APU_HDMI_TX2+_C 38 23 HDMI_TX2+_C @ @
C2526
6 APU_HDMI_TX2+ 1 2 0.1U_0201_6.3V6-K APU_HDMI_TX2-_C 39 IN_D2p OUT_D2p 22 HDMI_TX2-_C HDMI_TX2+_C 21
C2527
6 APU_HDMI_TX2- IN_D2n OUT_D2n HDMI_TX2-_C 21
C2528 1 2 0.1U_0201_6.3V6-K APU_HDMI_CLK+_C 47 14 HDMI_CLK+_C
6 APU_HDMI_CLK+ IN_CLKp OUT_CLKp HDMI_CLK+_C 21

tro
C2529 1 2 0.1U_0201_6.3V6-K APU_HDMI_CLK-_C 48 13 HDMI_CLK-_C
6 APU_HDMI_CLK- IN_CLKn OUT_CLKn HDMI_CLK-_C 21
C
HDMI_RST 35 12 C
RESETB CEC_EN
4 9
PDB HDMI_CEC
2 7 HDMI_SNK_SCL_R R11160 1 2 0_0402_5%
TESTMODEB SCL_SNK HDMI_SNK_SCL 21
HDMI_REDRIVER_EQ 5 8 HDMI_SNK_SDA_R R11161 1 2 0_0402_5%
EQ SDA_SNK HDMI_SNK_SDA 21
R11073 1 2 4.99K_0402_1% 36 29 HDMI_SCL R11166 1 @ 2 0_0402_5%
REXT CSCL EC_SMB_CK3 6,44,45,50
R11074 1 2 10K_0402_5% 27 28 HDMI_SDA R11167 1 @ 2 0_0402_5%
PRE CSDA EC_SMB_DA3 6,44,45,50

-X
R11157 1 2 0_0402_5% APU_DDC_CLK_R 34 40 HDMI_HPD_R R11159 2 @ 1 0_0402_5%
6 APU_DDC_CLK SCL_SRC/AUXP HPD_SRC APU_HDMI_HPD 6
R11158 1 2 0_0402_5% APU_DDC_DATA_R 33 10
6 APU_DDC_DATA SDA_SRC/AUXN RSV1
HDMI_DET 21 26
21 HDMI_DET HPD_SNK RSV2
@
+3VS R11075 1 2 10K_0402_5% 31 25
I2C_ADDR NC
@
R11076 1 2 10K_0402_5% 32 49
+3VS HDMI_ID EPAD

Te
PS8409AQFN48GTR2-A2_QFN48_6X6
+3VS +1.2V +1.2V_R
2

R11077
10K_0402_5% @
R11037 1 2 0_0603_5%
+3VS

ch
1

HDMI_RST
+3VS R11176 1 @ 2 0_0603_5%
1
C10119 +1.2V_RE
+1.2V +1.2V_R L70
+/- 1.5%
1

Q632

4.7K_0201_5%

4.7K_0201_5%
1U_0402_6.3V7-K BLM18PG181SN1D_2P

1
B 2 AON6414AL_DFN8-5 B

10K_0402_5%

10K_0402_5%
R11024 R11025 @
47K_0402_5% 47K_0402_5% 1 2
1 1

1
2

ni
1
2

C10156 5 3 C10157 C10154

1

2
DCIN_EN @ @ 10U_0603_6.3V6-M 1U_0402_6.3V6-K
10U_0603_6.3V6-M

2
HDMI_REDRIVER_EQ @ 2
2 1 1
R11078

R11079

R11168

R11169
C10152

4
@ C10155 @
0.1U_0201_6.3V6-K 0.01U_0201_25V6-K
2 2
APU_DDC_CLK @ @ @ @ B+

ca
R11117
1

APU_DDC_DATA
R11030 R11029 R11116 1 @ 2 0_0402_5% 1 2
47K_0402_5% 47K_0402_5% HDMI_SCL

150K_0402_5%

1
HDMI_SDA D
1
2

C10153 R11118 2 SUSP

@ SUSP 52
1M_0402_5% G
0.01U_0201_25V6-K S Q631

3
2 2N7002WT1G_SC-70-3

2
+3VS

l
5
G

Q1B
R11236
HDMI_HPD_R 1 2 100K_0402_5% APU_DDC_CLK 4 3 HDMI_SNK_SCL
S

2N7002KDW H_SOT363-6
2
G

@
Q1A

A A
APU_DDC_DATA 1 6 HDMI_SNK_SDA
S

2N7002KDW H_SOT363-6
@

eleTro-X Technical Security Classification

Issued Date 2015/11/02
LC Future Center Secret Data
Deciphered Date 2015/08/10
Title
DDI DEMUX/HDMI LEVEL SHIFTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 20 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

EMC@
EXC24CH500U_4P
HDMI_CLK-_C 4 3 HDMI_CLK-_CON +5VS_HDMI
1 4 3
C10118
3.3P_0201_25V9-C HDMI_CLK+_C 1 2 HDMI_CLK+_CON
1 2

2
@ 2
L64 +5VS R10193
0.01_0603_LE_1%
EMC@

1
EXC24CH500U_4P
HDMI_TX0-_C 4 3 HDMI_TX0-_CON U110

Ele
4 3 6 1
IN OUT
HDMI_TX0+_C 1 2 HDMI_TX0+_CON 2
1 2 3 ILIM
FAULT

2
L62 4 5
EN GND 2
2 R1119 C994
C1426 7 61.9K_0201_1% 4.7U_0402_6.3V6-M
EMC@ 0.1U_0201_6.3V6-K GND_PAD
EXC24CH500U_4P TPS2553DRVR_SON6_2X2 1

1
HDMI_TX1-_C 4 3 HDMI_TX1-_CON 1
4 3

tro
HDMI_TX1+_C 1 2 HDMI_TX1+_CON
1 2
C C
L63

EMC@
EXC24CH500U_4P
HDMI_TX2-_C 4 3 HDMI_TX2-_CON +5VS_HDMI +5VS_HDMI
4 3

HDMI_TX2+_C 1 2 HDMI_TX2+_CON

-X
1 2
L65 2

2
1
C2731
RP8 1000P_0201_25V7-K
2.2K_0404_4P2R_5% EMC@
1

3
4
JHDMI1
HDMI_DET 19

Te
20 HDMI_DET HP_DET
18
17 +5V
16 DDC/CEC_GND
20 HDMI_SNK_SDA SDA
15
20 HDMI_SNK_SCL SCL
14
13 Reserved
HDMI_CLK-_C R10917 2 @ 1 0_0402_5% HDMI_CLK-_CON 12 CEC 20
D4039 D4037 20 HDMI_CLK-_C CK- GND1
11 21
HDMI_CLK-_CON 1 1 HDMI_CLK-_CON HDMI_TX1-_CON HDMI_TX1-_CON HDMI_CLK+_C HDMI_CLK+_CON CK_shield GND2
10 9 1 1 10 9 R10915 2 @ 1 0_0402_5% 10 22

ch
20 HDMI_CLK+_C HDMI_TX0-_C HDMI_TX0-_CON CK+ GND3
R10918 2 @ 1 0_0402_5% 9 23
HDMI_CLK+_CON HDMI_CLK+_CON HDMI_TX1+_CON HDMI_TX1+_CON 20 HDMI_TX0-_C D0- GND4
2 2 9 8 2 2 9 8 8
HDMI_TX0+_C R10914 2 @ 1 0_0402_5% HDMI_TX0+_CON 7 D0_shield
HDMI_TX0-_CON HDMI_TX0-_CON HDMI_TX2-_CON HDMI_TX2-_CON 20 HDMI_TX0+_C HDMI_TX1-_C HDMI_TX1-_CON D0+
4 4 7 7 4 4 7 7 R10921 2 @ 1 0_0402_5% 6
20 HDMI_TX1-_C D1-
5
HDMI_TX0+_CON 5 5 6 HDMI_TX0+_CON HDMI_TX2+_CON 5 5 6 HDMI_TX2+_CON HDMI_TX1+_C R10919 2 @ 1 0_0402_5% HDMI_TX1+_CON 4 D1_shield
6 6
20 HDMI_TX1+_C HDMI_TX2-_C HDMI_TX2-_CON D1+
R10916 2 @ 1 0_0402_5% 3
20 HDMI_TX2-_C D2-
B 3 3 3 3 2 B
HDMI_TX2+_C R10920 2 @ 1 0_0402_5% HDMI_TX2+_CON 1 D2_shield
8 8 20 HDMI_TX2+_C D2+

ni
ALLTO_C128P3-K1925-L
@
AZ1045-04F_DFN2510P10E-10-9 AZ1045-04F_DFN2510P10E-10-9
EMC@ EMC@

EMC D4079
HDMI_SNK_SDA HDMI_SNK_SDA

ca
1 1 10 9
HDMI_SNK_SCL 2 2 9 8 HDMI_SNK_SCL

HDMI_DET 4 4 7 7 HDMI_DET

+5VS_HDMI 5 5 6 6 +5VS_HDMI

3 3

l
8

AZ1045-04F_DFN2510P10E-10-9
EMC@

A A

eleTro-X Technical Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2013/08/05 HDMI CONNECTOR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 21 of 66
5 4 3 2 1
 5 4 3 2 1

+3V_REDP +3V_REDP +3V_REDP

eleTro-X Technical

1
R11283 R11281 R1006

1K_0402_5% 1K_0402_5% 1K_0402_5%

2
PD_GPIO0 @ PD_GPIO5 @ PD_GPIO1 @

1
D D
R11284 R11282 R11001
100K_0402_5% 100K_0402_5% 100K_0402_5%

2
@ @ @

L = DisplayPort Disabled.
+3VALW +3V_REDP H = DisplayPort Enabled.
R881 1 @ 2 0_0603_5% When I2C_EN = 0, this pin is not used by device.

10U_0805_25V6-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K
1 1 1 1 1
C47 C50 C51 C10032 C10033
2 2 2 2 2

Ele

20

28
1

6
U18

VCC_1

VCC_2

VCC_3

VCC_4
USB30_C_RX3BP C60 1 2 0.33U_0402_10V6-K USB30_C_RX3BP_R 9 40 USBC_SS+_RX3BP_R
9 USB30_C_RX3BP USB30_C_RX3BN C62 USB30_C_RX3BN_R URX2P DRX2P USBC_SS+_RX3BN_R USBC_SS+_RX3BP_R 26
1 2 0.33U_0402_10V6-K 10 39
9 USB30_C_RX3BN USB30_C_TX3BP USB30_C_TX3BP_R URX2N DRX2N USBC_SS+_TX3BP_R USBC_SS+_RX3BN_R 26
9 USB30_C_TX3BP
C59 1 2 0.22U_0402_10V6-K 12 37
+3V_REDP USB30_C_TX3BN C61 1 2 0.22U_0402_10V6-K USB30_C_TX3BN_R 13 UTX2P DTX2P 36 USBC_SS+_TX3BN_R USBC_SS+_TX3BP_R 26 +3V_REDP
9 USB30_C_TX3BN UTX2N DTX2N USBC_SS+_TX3BN_R 26 +3V_REDP
DP3_AUXP C67 1 2 0.1U_0402_10V7-K DP3_AUXP_R 24 8 TUSB_DIR0
Check
6 DP3_AUXP AUXP DIR0
R85 1 2 100K_0402_5% DP3_AUXN_R DP3_AUXN C69 1 2 0.1U_0402_10V7-K DP3_AUXN_R 25 11 TUSB_DIR1
6 DP3_AUXN AUXN DIR1

1
TUSB_SWAP 5 27 DP3_SBU1_R R95 1 @ 2 0_0402_5% DP3_SBU1
SWAP SBU1 DP3_SBU1 26

tro

1
TUSB_SLP 7 26 DP3_SBU2_R R94 1 @ 2 0_0402_5% DP3_SBU2
R1000
C 1 2 100K_0402_5% DP3_AUXP_R SLP_S0# SBU2 DP3_SBU2 26 C
R87 R998 @ 1K_0402_5%
USB30_C_TX3AP C64 1 2 0.22U_0402_10V6-K USB30_C_TX3AP_R 16 33 USBC_SS+_TX3AP_R @ 1K_0402_5%
9 USB30_C_TX3AP USB30_C_TX3AN C63 1 2 0.22U_0402_10V6-K USB30_C_TX3AN_R 15 UTX1P DTX1P 34 USBC_SS+_TX3AN_R USBC_SS+_TX3AP_R 26

2
9 USB30_C_TX3AN USB30_C_RX3AP C66 1 2 0.33U_0402_10V6-K USB30_C_RX3AP_R 19 UTX1N DTX1N 30 USBC_SS+_RX3AP_R USBC_SS+_TX3AN_R 26
9 USB30_C_RX3AP USBC_SS+_RX3AP_R 26

2
USB30_C_RX3AN C65 1 2 0.33U_0402_10V6-K USB30_C_RX3AN_R 18 URX1P DRX1P 31 USBC_SS+_RX3AN_R TUSB_DIR1
9 USB30_C_RX3AN URX1N DRX1N USBC_SS+_RX3AN_R 26 TUSB_DIR0
TUSB_I2CEN 17 21 PD_GPIO0_RE R97 1 @ 2 0_0402_5%
I2C_EN FLIP/SCL PD_GPIO0 24

1
TUSB_UEQ0/A0 35 22 PD_GPIO5_RE R96 1 @ 2 0_0402_5%
UEQ0/A0 CTL0/SDA PD_GPIO5 24

1
TUSB_UEQ1/A1 2 23 PD_GPIO1_RE R11280 1 @ 2 0_0402_5% R999
UEQ1/A1 CTL1 PD_GPIO1 24
32 DP3_HPD DP3_HPD 6,24 R997 100K_0402_5%
+3V_REDP TUSB_DEQ0 38 HPDIN
TUSB_DEQ1 DEQ0 100K_0402_5%
+3V_REDP +3V_REDP 29 14 TUSB_SEL

2
DEQ1 VIO_SEL

-X

2
TUSB_CFG0 3
TUSB_CFG1 4 CFG0 41 @
CFG1 GND
1

R411281 2 0_0402_5% EC_I2C2_SCL_RE

EC_I2C2_SCL_RE 23
1

R93
R99 R100 1K_0402_5% @
@ 1K_0402_5% @ 1K_0402_5% I2C_EN=0 GPIO MODE TUSB1044RNQR_WQFN40_4X6 R411291 2 0_0402_5% EC_I2C2_SDA_RE +3VALW
I2C_EN=1 I2C enable EC_I2C2_SDA_RE 23
2
2

R11307 1 2 0_0402_5%

2
TUSB_UEQ0/A0 TUSB_UEQ1/A1 @

G
Te
@
TUSB_I2CEN
1

EC_I2C2_SCL_RE

D
R10956 R10957 3 1
EC_I2C2_SCL_PD 15,24
20K_0402_5% 20K_0402_5% R11308 1 @ 2 0_0402_5%
Q6246
@ LSK3541G1ET2L_VMT3
2

R88 1 2 2M_0402_1% DP3_SBU2

1

Address 00

2
R101 @

G
ch
1K_0402_5% @
R90 1 2 2M_0402_1% DP3_SBU1
2

EC_I2C2_SDA_RE

D
3 1
EC_I2C2_SDA_PD 15,24
Q6247
B B
LSK3541G1ET2L_VMT3

+3V_REDP +3V_REDP

0 – RX Detect disabled

ni
1

1 – RX Detect enabled (Default)

R109 R110
@ 1K_0402_5% 1K_0402_5% EQ setting
0 – Do not swap channel directions and EQ settings (Default)
1. – Swap channel directions and EQ settings
2

TUSB_SWAP TUSB_SLP +3V_REDP +3V_REDP

+3V_REDP

ca
+3V_REDP
1

R114 R106

1
100K_0402_5% 100K_0402_5% R78 R75

1
R84

1
R989 @ 1K_0402_5% @ 1K_0402_5%
2

@ 1K_0402_5%
@
@ 1K_0402_5%

2
2
TUSB_CFG0 TUSB_CFG1

2
TUSB_DEQ1

l
+3V_REDP TUSB_DEQ0

1
1
+3V_REDP R86 R82 R77

1
20K_0402_5% 20K_0402_5%
R990 1K_0402_5% @
1

20K_0402_5%

2
R89 @

2
1

@ 1K_0402_5% R1007

2
@ 1K_0402_5%
2

TUSB_SEL
2

A DP3_HPD A
1

R92

teknisi-indonesia.com
1K_0402_5%
1

R1008
2

100K_0402_5%
2

@
Y3 CRYSTAL 25MHZ 18PF 30PPM Security Classification LC Future Center Secret Data Title
0 = 3.3-V configuration I/O voltage, 3.3-V I2C interface (Default)
Vendor P/N LCFC P/N Issued Date 2015/11/02 Deciphered Date 2015/08/10 ALPINE RIDGE (1/2)
1 = 1.8-V configuration I/O voltage, 1.8-V I2C interface
eleTro-X Technical TXC 8Y25000004 SJ10000H00J THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
KDS 1ZZHAE25000CC0F SJ10000P300 DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 22 of 66
5 4 3 2 1
 5 4 3 2 1

+3V_REDP2 +3V_REDP2 +3V_REDP2

eleTro-X Technical

1
R11294 R11292 R10996

1K_0402_5% 1K_0402_5% 1K_0402_5%

2
PD_GPIO6 @ PD_GPIO15 @ PD_GPIO14 @

1
D R11295 R11293 R10999 D
100K_0402_5% 100K_0402_5% 100K_0402_5%

2
@ @ @

KevinH: Due to redriver update to USB1044, manually update PN to SA00008FE00 L = DisplayPort Disabled.
+3VALW +3V_REDP2 H = DisplayPort Enabled.
R10970 1 @ 2 0_0603_5% When I2C_EN = 0, this pin is not used by device.

10U_0805_10V6-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K
1 1 1 1 1
C10038 C10036 C10035 C10034 C10037
2 2 2 2 2

Ele

20

28
1

6
U237

VCC_1

VCC_2

VCC_3

VCC_4
USB30_RX_P4 C10040 1 20.33U_0402_10V6-K USB30_RX_P4_R 9 40 USBC_SS+_RX2BP_R
9 USB30_RX_P4 USB30_RX_N4 USB30_RX_N4_R URX2P DRX2P USBC_SS+_RX2BN_R USBC_SS+_RX2BP_R 25
C10042 1 20.33U_0402_10V6-K 10 39
9 USB30_RX_N4 USB30_TX_P4 C10043 USB30_TX_P4_R URX2N DRX2N USBC_SS+_TX2BP_R USBC_SS+_RX2BN_R 25
9 USB30_TX_P4 1 2 0.22U_0402_10V6-K 12 37
+3V_REDP2 USB30_TX_N4 C10045 1 2 0.22U_0402_10V6-K USB30_TX_N4_R 13 UTX2P DTX2P 36 USBC_SS+_TX2BN_R USBC_SS+_TX2BP_R 25 +3V_REDP2
9 USB30_TX_N4 UTX2N DTX2N USBC_SS+_TX2BN_R 25 +3V_REDP2
DP2_AUXP C10039 1 2 0.1U_0402_10V7-K DP2_AUXP_R 24 8 TUSB2_DIR0
Check
2 100K_0402_5% DP2_AUXN_R 6 DP2_AUXP DP2_AUXN DP2_AUXN_R AUXP DIR0 11 TUSB2_DIR1
R10960 1 C10041 1 2 0.1U_0402_10V7-K 25
6 DP2_AUXN AUXN DIR1

1
TUSB2_SWAP 5 27 DP2_SBU1_R R10966 1 @ 2 0_0402_5% DP2_SBU1
SWAP SBU1 DP2_SBU1 25

1
TUSB2_SLP 7 26 DP2_SBU2_R R10967 1 @ 2 0_0402_5% DP2_SBU2
R10994
SLP_S0# SBU2 DP2_SBU2 25

tro
R10961 1 2 100K_0402_5% DP2_AUXP_R R10995 @ 1K_0402_5%
C USB30_TX_P3 C10044 1 2 0.22U_0402_10V6-K USB30_TX_P3_R 16 33 USBC_SS+_TX2AP_R @ 1K_0402_5% C
9 USB30_TX_P3 USB30_TX_N3 C10047 1 2 0.22U_0402_10V6-K USB30_TX_N3_R 15 UTX1P DTX1P 34 USBC_SS+_TX2AN_R USBC_SS+_TX2AP_R 25

2
9 USB30_TX_N3 USB30_RX_P3 C10046 1 20.33U_0402_10V6-K USB30_RX_P3_R 19 UTX1N DTX1N 30 USBC_SS+_RX2AP_R USBC_SS+_TX2AN_R 25
9 USB30_RX_P3 USBC_SS+_RX2AP_R 25

2
USB30_RX_N3 C10048 1 20.33U_0402_10V6-K USB30_RX_N3_R 18 URX1P DRX1P 31 USBC_SS+_RX2AN_R TUSB2_DIR1
9 USB30_RX_N3 URX1N DRX1N USBC_SS+_RX2AN_R 25 TUSB2_DIR0
TUSB2_I2CEN 17 21 PD_GPIO6_RE R10968 1 @ 2 0_0402_5%
I2C_EN FLIP/SCL PD_GPIO6 24

1
TUSB2_UEQ0/A0 35 22 PD_GPIO15_RE R10969 1 @ 2 0_0402_5%
UEQ0/A0 CTL0/SDA PD_GPIO15 24

1
TUSB2_UEQ1/A1 2 23 PD_GPIO14_RE R11291 1 @ 2 0_0402_5% R10963
UEQ1/A1 CTL1 PD_GPIO14 24
32 DP2_HPD R10962 100K_0402_5%
TUSB2_DEQ0 HPDIN DP2_HPD 6,24
+3V_REDP2 38 100K_0402_5%
+3V_REDP2 +3V_REDP2 TUSB2_DEQ1 29 DEQ0 14 TUSB2_SEL

2
DEQ1 VIO_SEL

2
-X
TUSB2_CFG0 3
TUSB2_CFG1 4 CFG0 41 @
1 CFG1 GND R411301 2 0_0402_5% EC_I2C2_SCL_RE
EC_I2C2_SCL_RE 22
1

R10982
R10984 R10985 1K_0402_5% @
1K_0402_5% @ 1K_0402_5% I2C_EN=0 GPIO MODE TUSB1044RNQR_WQFN40_4X6 R411311 2 0_0402_5% EC_I2C2_SDA_RE
I2C_EN=1 I2C enable EC_I2C2_SDA_RE 22
2
2

R11309 1 2 0_0402_5%
TUSB2_UEQ0/A0 TUSB2_UEQ1/A1
@

Te
TUSB2_I2CEN
1

R10981 R10983
20K_0402_5% 20K_0402_5% R11310 1 @ 2 0_0402_5%

@
2

R109971 2 2M_0402_1% DP2_SBU2

@
1

Address 01 R10986
1K_0402_5% @
R109981 2 2M_0402_1% DP2_SBU1

ch
2

B B
+3V_REDP2 +3V_REDP2

0 – RX Detect disabled

ni
1

1 – RX Detect enabled (Default)

R10980 R10979
@ 1K_0402_5% 1K_0402_5% EQ setting
0 – Do not swap channel directions and EQ settings (Default)
1. – Swap channel directions and EQ settings
2

TUSB2_SWAP TUSB2_SLP +3V_REDP2 +3V_REDP2

+3V_REDP2
+3V_REDP2

ca
1

R10959 R10958

1
100K_0402_5% 100K_0402_5% R10977 R10978

1
R10976

1
R10975 1K_0402_5% @ 1K_0402_5%
2

@ 1K_0402_5%
@
1K_0402_5%

2
2
TUSB2_CFG0 TUSB2_CFG1

2
TUSB2_DEQ1
+3V_REDP2 TUSB2_DEQ0

1
1
+3V_REDP2 R10971 R10972 R10973

1
20K_0402_5% 20K_0402_5%
R10974 1K_0402_5% @
1

20K_0402_5%

2
R10987 @

2
1

@ 1K_0402_5% R10989

2
@ 1K_0402_5%
2

TUSB2_SEL
2

DP2_HPD
A A
1

R10988
1K_0402_5%
1

R11000
2

100K_0402_5%
2

0 = 3.3-V configuration I/O voltage, 3.3-V I2C interface (Default) Security Classification LC Future Center Secret Data Title
1 = 1.8-V configuration I/O voltage, 1.8-V I2C interface Issued Date 2015/11/02 Deciphered Date 2015/08/10 ALPINE RIDGE (2/2)
eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 23 of 66
5 4 3 2 1
 5 4 3 2 1

VCC3_LDO_DOCK

+3VL VCC3_LDO_DOCK V1P8_LDO_DOCK

Vendor P/N LCFC P/N +5VALW +3VALW VCC3_LDO_DOCK_R DOCK_VBUS20 DOCK_VBUS20 USBC_VBUS20 R10429 1 2 100K_0201_1% ADCIN2 R10427 1 2 10K_0201_1%

1
R10673
0_0201_5%
R10672
0_0201_5%
PTPS65988CRSLR SA00008HB00 eleTro-X Technical
I2C Addressing

NSR20F30NXT5G_DSN2-2

NSR20F30NXT5G_DSN2-2
TPS65988ABRSLR SA00008DG00 USBC_VBUS20

10U_0402_6.3V6-M

10U_0402_6.3V6-M

4.7U_0402_6.3V6-M

1
@ 2 2 2 I2C1(to EC)

1U_0402_25V6-K

1U_0402_25V6-K
-TBT Port : 0x23

C9549

C9550
2 2

C9551

1
@
-USBC Port : 0x27

D752

D753
C9553

C9554
D
V1P8_LDO_DOCK +3VL 1 1 1 I3C2(to AR) D
+1.8VALW VCC3_LDO_DOCK 1 1 -TBT Port : 0x38

2
-USC Port : 0x3f

10K_0201_1%

10K_0201_1%

10K_0201_1%

10K_0201_1%
TABLE I2C Address Selection

2
DIV = R2 / (R1+R2) I2C Unique Address [3:1]

2
2
R504 R505 R10427

10

30

11
12
9

1
2

3
4
U207 DIV_Min DIV_Max I2C_ADDR_DECODE_C1 I2C_ADDR_DECODE_C2

3.3K_0201_5%

3.3K_0201_5%

2
PLACE NEAR U203 Pin11.12 PLACE NEAR U203 Pin3,4

PP_HV1_1
PP_HV1_2

PP_HV2_1
PP_HV2_2

VBUS1_1
VBUS1_2

VBUS2_1
VBUS2_2
VIN_3V3

LDO_3V3

LDO_1V8
1 R10431

1 R11241

1 R10430

R11242
1 +5VALW NA 0.00 0.18 000b 100b
1
191K 0.20 0.38 001b 101b

1
100K 0.40 0.58 010b 110b
@ @
PD_EE_CLK
10K 0.60 1.00 011b 111b
TP975 @1 Test_Point_40MIL R10628 1 @ 20_0201_5% 33
TP974 @1 Test_Point_40MIL PD_EE_DO 31 SPI_CLK/GPIO10 +3VS
TP976 @1 Test_Point_40MIL PD_EE_DI 32 SPI_MISO/GPIO8 6 ADCIN1
TP977 @1 Test_Point_40MIL PD_EE_CS# 34 SPI_MOSI/GPIO9 ADCIN1
SPI_SS#/GPIO11 20 VCC3_LDO_DOCK
PP1_CABLE

1
2
@ R3108

G
PD CONTROLLER

Ele
19 1M_0402_5%
C1_CC1 DP2_CC1 25
1 R11081 2 1M_0201_5% 45 21 @ R10428 1 2 100K_0201_1% ADCIN1 R10426 1 2 10K_0201_1%
C1_USB_P/GPIO18 C1_CC2 DP2_CC2 25
1 R11082 2 1M_0201_5% 46

2
C1_USB_N/GPIO19 25 DP2_HPD_Q 1 3 BUSPOWER Config.

S
PD_I2C_INT# HPD1/GPIO3 DP2_HPD 6,23
24
I2C1_IRQ# BP_NoWait

1
43 Q6240 TABLE BUS POWER Configuration
PP_EXT1/GPIO16 TBT_HV_GATE 56
C 23 R4101 LSK3541G1ET2L_VMT3 C
15 CCG4_APU_USBC_SDA I2C1_SDA
15 CCG4_APU_USBC_SCL 22 100K_0402_5% Configuration
I2C1_SCL
DIV=R2/ (R1+R2)
1 @ R11350 1 @ 2 0_0402_5%

2
EMC_NS@ R11327 1 2 100K_0402_5% DIV MIN DIV MAX
C9878

tro
22P_0201_25V8-J 0.00 0.18 BP_NoRespones
2 R11326 1 @ 2 0_0402_5%39
HRESET
0.20 0.38 BP_WaitFor3V3_Internal
0.40 0.58 BP_WaitFor3V3_External
+3VS 0.60 1.00 BP_NoWait
8 ADCIN2
ADCIN2
1 R11083 2 1M_0201_5% 47 41
C2_USB_P/GPIO20 PP2_CABLE

1
1 R11084 2 1M_0201_5% 48
C2_USB_N/GPIO21

2
@ R3109

G
R11304 1 @ 2 0_0402_5% INT#_TYPEC_PD 29 40 1M_0402_5%
44 INT#_TYPEC I2C2_IRQ# C2_CC1 USBC_CC1 26
42 USBC_CC2 26 @
R11305 1 @ 2 0_0402_5% EC_I2C2_SDA_PD 28 C2_CC2 VCC3_LDO_DOCK

-X
27,44 EC_I2C2_SDA
SN1701012RJTR

2
R11306 1 @ 2 0_0402_5% EC_I2C2_SCL_PD 27 I2C2_SDA 26 DP3_HPD_Q 1 3

S
27,44 EC_I2C2_SCL I2C2_SCL HPD2/GPIO4 DP3_HPD 6,22

1
44 Q6241
15,22 EC_I2C2_SDA_PD PP_EXT2/GPIO17 USBC_HV_GATE 56
R3107 LSK3541G1ET2L_VMT3
15,22 EC_I2C2_SCL_PD

2
100K_0402_5%
R11351 1 @ 2 0_0402_5% D714
R11251 1 @ 2 0_0201_5% 15 RB520CM-30T2R_VMN2M2
25 DOCK_DISCHARGE

1
GPIO2
R11286 1 @ 2 0_0402_5% PD_GPIO1_R 14 38
R11285 1 @ 2 0_0402_5% VCC3_LDO_TBT_SPI

Te
22 PD_GPIO1 GPIO1 GPIO15/PWM2 PD_GPIO15 23
R11287 1 @ 2 0_0402_5% PD_GPIO0_R 13 37
R11290 1 @ 2 0_0402_5%

1 R10148

1 R10149

1 R10150

R10151
22 PD_GPIO0 GPIO0 GPIO14/PWM1 PD_GPIO14 23
B PD_GPIO5_R B
22 PD_GPIO5 R11288 1 @ 2 0_0402_5% 16

0.1U_0201_6.3V6-K
GPIO5 TP962 1

C9468
R11289 1 @ 2 0_0402_5% PD_GPIO6_R 17 49 1 @

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K
23 PD_GPIO6 GPIO6 NC1

1
TP963

C9559

C9560

C9557

C9558
PD_GPIO7 18 50 1 @
GPIO7 NC2 2 2 2 2 2

ch
R11252 1 @ 2 0_0201_5% 35
26 USBC_DISCHARGE

2
GPIO12

EMC@

EMC@

EMC@

EMC@

2
PD_GPIO13 36 1 1 1 1

3.3K_0201_5%

3.3K_0201_5%

3.3K_0201_5%
GPIO13 51
1M_0201_5%

1M_0201_5%

1M_0201_5%

1M_0201_5%

3.3K_0201_5%
GND
2

8
U15
AP1

AP2

AP3

AP4
R11049

R10425

R11314

R11313

VCC
SN1701012RJTR_QFN48_6X6
A1

A2

A3

A4

PD_EE_CS# 1 5 PD_EE_DI
1

/CS DI(IO0)

ni
PD_EE_DO 2 6 PD_EE_CLK
DO(IO1) CLK
Note: SDV Phase mounts "PTPS65988CRSLR"
(Production Sample1.2)
3 7
VCC3_LDO_DOCK_R VCC3_LDO_DOCK /WP(IO2) /HOLD(IO3)
+5VALW R11050 1 2 0_0603_5%

ca
PLACE NEAR U203 Pin9 PLACE NEAR U203 Pin1 PLACE NEAR U203 Pin20 PLACE NEAR U203 Pin41

GND
1
@ C10081 W25Q80JVSSIQ_SO8
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

4
2 2 2 2 2 2 2 2 FDG316P_SC70-6 10U_0402_6.3V6-M
A
2 A
C9614

C9613

C9612

C9611

C9616

C9615

C9618

C9617

6 1
1 1 1 1 1 1 1 1

l
5 2
Security Classification LC Future Center Secret Data Title
4 3 BLANK
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
U3319 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 24 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

VCC3_LDO_DOCK +3VALW

1
C9543
0.1U_0201_6.3V6-K

eleTro-X Technical

2
2
R10421
U202 DOCK_VBUS20_CONN 10K_0201_5% DOCK_VBUS20
DOCK_VBUS20_CONN
10

1
VPWR U201
DP2_SBU1 15 1 DOCK_SBU1_CONN
23 DP2_SBU1 DP2_SBU2 SBU1 C_SBU1 DOCK_SBU2_CONN

1U_0402_25V6-K

1U_0402_25V6-K
0.47U_0402_25V6-K

0.47U_0402_25V6-K
23 DP2_SBU2 14 2 VCC3_LDO_DOCK B3 A2
SBU2 C_SBU2 C2 IN1 OUT1 A3
DP2_CC1 DOCK_CC1_CONN 2 2 2 2 IN2 OUT2

C9442

C9441

C9440

C9439
24 DP2_CC1 12 4 C3 B2
DP2_CC2 CC1 C_CC1 DOCK_CC2_CONN IN3 OUT3

1
24 DP2_CC2 11 5
D
CC2 C_CC2 R10423 A1 B1 D
20 7 1 1 1 1 R10422 EN# ACOK#
100K_0201_5% 2 1
19 D1 RPD_G1 C9541 1 2 C1 C9542

GND_1
GND_2
GND_3
17 D2 6 0.1U_0402_25V6-K OVLO 1U_0603_25V6-K

2
16 D3 RPD_G2 1M_0201_5%
D4 FLT_REPORT# @ @

2
9 1 2
C9544 1 2 3 FLT R10420 FPF2281BUCX-F130_WLCSP12

C4
A4
B4
VBIAS

1
8 51.1K_0201_1%
0.1U_0603_50V7-K GND1 13 R11247 1 @ 2 0_0402_5% R11047
GND2 18 100_0603_5%

1
GND3 21
THERMAL_PAD

2
TPD8S300_QFN20_3X3
@

1
Q623 D
DOCK_DISCHARGE 2
24 DOCK_DISCHARGE G
R10647
DOCK_SBU1_CONN R11177 1 2 2M_0201_5%
DOCK_SBU2_CONN R11178 1 2 2M_0201_5% S 2N7002KW_SOT323-3
Vendor P/N LCFC P/N

3
@ KOA 100 +-5% 0603 SD000022U0T
Rohm 100 +-5% 0603 SD000022V0T
Q269
Grug:refer other typec USB2.0
Vendor P/N LCFC P/N EMC_NS@

Ele
ON-semi 2N7002KW SB00001JY00 R10827 1 2 0_0402_5%
F60
NXP NX7002BKW SB00001GU00 L61 EMC@
Vendor P/N LCFC P/N DOCK_USB2P_CONN 4 3
4 3 DOCK_USB2P 9
LIITELFUSE 0603L035YR SP040007900 +3VALW_LAN DOCK_VBUS20_CONN @ DOCK_VBUS20_CONN
JDOCK1
DOCK_USB2N_CONN 1 2
BOURNS MF-FSMF035X-2 SP040007700 1 2 DOCK_USB2N 9

AEM PMS0603-035 SP040007B00 GND1 GND2 EXC24CH900U_4P

GND5 GND6

1
F60 EMC_NS@
0.35A_6V_0603L035YR R10828 1 2 0_0402_5%

tro
C C
GND3 GND4

2
GND5 GND7 GND8
GND9

A1 B12
USBC_SS+_TX2AP_C A2 GND1 GND4 B11 USBC_SS+_RX2AP_C
USBC_SS+_TX2AN_C A3 TX1+ RX1+ B10 USBC_SS+_RX2AN_C
A4 TX1- RX1- B9
DOCK_CC1_CONN A5 VBUS1 VBUS4 B8 DOCK_SBU2_CONN
DOCK_USB2P_CONN A6 CC1 SBU2 B7 DOCK_USB2N_CONN
DOCK_USB2N_CONN A7 D1+ D2- B6 DOCK_USB2P_CONN

-X
DOCK_SBU1_CONN A8 D1- D2+ B5 DOCK_CC2_CONN
A9 SBU1 CC2 B4
USBC_SS+_RX2BN_C A10 VBUS2 VBUS3 B3 USBC_SS+_TX2BN_C
USBC_SS+_RX2BP_C A11 RX2- TX2- B2 USBC_SS+_TX2BP_C
A12 RX2+ TX2+ B1
GND2 GND3

GND6
GND7 GND10 GND8
GND11 GND12

Te
GND9 GND10
GND13 GND14

D4048
USBC_SS+_TX2BP_C 1 10 USBC_SS+_TX2BP_C
Line-1 NC1
MDI_2N_CONN 1 8 MDI_3N_CONN USBC_SS+_TX2BN_C 2 9 USBC_SS+_TX2BN_C
MDI_2P_CONN 2 MDI_2N MDI_3N 9 MDI_3P_CONN Line-2 NC2
DOCK_LINKUP_SYS# R10436 1 @ 2 0_0402_5% 3 MDI_2P MDI_3P 10 3 8
32 DOCK_LINKUP_SYS# -LINK_LED GND GND1 GND2
4 11

ch
PWRSWITCH#
DOCK_ACTIVITY_SYS# -ACT_LED -PW RSW ITCH DOCK_RJ45_DET# PWRSWITCH# 18,44 USBC_SS+_RX2BP_C USBC_SS+_RX2BP_C
R10437 1 @ 2 0_0402_5% 5 12 4 7
32 DOCK_ACTIVITY_SYS# MDI_1N_CONN LED_PWR -DOCK_RJ45_DET MDI_0N_CONN DOCK_RJ45_DET# 7 Line-3 NC3
6 13
MDI_1P_CONN 7 MDI_1N MDI_0N 14 MDI_0P_CONN USBC_SS+_RX2BN_C 5 6 USBC_SS+_RX2BN_C
MDI_1P MDI_0P Line-4 NC4
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
B B
AZ1023-04F.R7G_DFN2510P10E10
EMC@
HIGHS_DK11197-D20A1-1H
1

1
1
1

1
EMC@
C9877

ni
0.1U_0201_6.3V6-K
2
D4047
USBC_SS+_TX2AN_C 1 10 USBC_SS+_TX2AN_C
Line-1 NC1
2

2
EMC@

EMC@

EMC@

EMC@

EMC@

EMC@
D4051

D4052
D757

D756

D755

D754

USBC_SS+_TX2AP_C 2 9 USBC_SS+_TX2AP_C
2

2
Line-2 NC2
3 8
GND1 GND2
USBC_SS+_RX2AN_C 4 7 USBC_SS+_RX2AN_C

ca
Line-3 NC3
USBC_SS+_RX2AP_C 5 6 USBC_SS+_RX2AP_C
DLP11SN900HL2L_4P Line-4 NC4
4 3 MDI_0P_CONN
32 DOCK_MDI_0+ AZ1023-04F.R7G_DFN2510P10E10
EMC@
1 2 MDI_0N_CONN
32 DOCK_MDI_0-
L56 EMC@
L66 EXC14CZ070U_4P
USBC_SS+_TX2AN_R C10053 1 2 USBC_SS+_TX2AN_L 1 2 USBC_SS+_TX2AN_C DLP11SN900HL2L_4P
23 USBC_SS+_TX2AN_R 1 2 MDI_1P_CONN
0.22U_25V_K_X5R_0402 32 DOCK_MDI_1+ 4 3 EMC@

l
D760
USBC_SS+_TX2AP_R C10054 1 2 USBC_SS+_TX2AP_L 3 4 USBC_SS+_TX2AP_C MDI_0P_CONN 1
23 USBC_SS+_TX2AP_R 3 4 MDI_1N_CONN MDI_0N_CONN D1+ MDI_0P_CONN
0.22U_25V_K_X5R_0402 32 DOCK_MDI_1- 1 2 2 10
EMC@ 3 D1- NC4 9 MDI_0N_CONN
L57 EMC@ 8 GND1 NC3 7 MDI_1P_CONN
L67 EXC14CZ070U_4P MDI_1P_CONN 4 GND2 NC2 6 MDI_1N_CONN
USBC_SS+_RX2AP_R C11193 1 2 USBC_SS+_RX2AP_L 3 4 USBC_SS+_RX2AP_C DLP11SN900HL2L_4P MDI_1N_CONN 5 D2+ NC1
23 USBC_SS+_RX2AP_R 3 4 MDI_2P_CONN D2-
0.22U_25V_K_X5R_0402 32 DOCK_MDI_2+ 4 3
TPD4EUSB30DQAR_SON10
USBC_SS+_RX2AN_R C11194 1 2 USBC_SS+_RX2AN_L 1 2 USBC_SS+_RX2AN_C
23 USBC_SS+_RX2AN_R 1 2 MDI_2N_CONN
0.22U_25V_K_X5R_0402 32 DOCK_MDI_2-
1 2 EMC@
EMC@ D761
L58 EMC@ MDI_2P_CONN 1
A MDI_2N_CONN 2 D1+ 10 MDI_2P_CONN A
DLP11SN900HL2L_4P 3 D1- NC4 9 MDI_2N_CONN
4 3 MDI_3P_CONN 8 GND1 NC3 7 MDI_3P_CONN
32 DOCK_MDI_3+ MDI_3P_CONN GND2 NC2 6 MDI_3N_CONN
L68 EXC14CZ070U_4P 4
USBC_SS+_TX2BN_R C10055 1 2 USBC_SS+_TX2BN_L 3 4 USBC_SS+_TX2BN_C MDI_3N_CONN 5 D2+ NC1
23 USBC_SS+_TX2BN_R 3 4 MDI_3N_CONN D2-
0.22U_25V_K_X5R_0402 32 DOCK_MDI_3- 1 2
TPD4EUSB30DQAR_SON10
USBC_SS+_TX2BP_R C10056 1 2 USBC_SS+_TX2BP_L 1 2 USBC_SS+_TX2BP_C L59 EMC@
23 USBC_SS+_TX2BP_R 1 2
0.22U_25V_K_X5R_0402
EMC@

L69 EXC14CZ070U_4P
L56 - L59
USBC_SS+_RX2BN_R C11195 1 2 USBC_SS+_RX2BN_L 3 4 USBC_SS+_RX2BN_C
23 USBC_SS+_RX2BN_R
0.22U_25V_K_X5R_0402 3 4 Vendor P/N LCFC P/N Security Classification LC Future Center Secret Data Title

USBC_SS+_RX2BP_R USBC_SS+_RX2BP_L USBC_SS+_RX2BP_C 1st: Murata DLP11SN900HL2 SM070002Y00 Issued Date Deciphered Date DOCKING CONNECTOR
C11196 1 2 1 2
23 USBC_SS+_RX2BP_R 1 2
0.22U_25V_K_X5R_0402 2nd: TDK MCZ1210AH900L2TA0G SM070004A00
eleTro-X Technical EMC@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Size
Custom
Document Number
Windu-2 AMD
Rev
0.1

Date: Saturday, April 14, 2018 Sheet 25 of 66

5 4 3 2 1
 5 4 3 2 1

VCC3_LDO_DOCK

0.1U_0402_10V6-K
1 +3VALW

C9889
eleTro-X Technical

2
2

U199 USBC_VBUS20_CONN R10372 USBC_VBUS20 USBC_VBUS20_CONN

10K_0201_5%
10

1
VPWR U200
DP3_SBU1 15 1 USBC_SBU1_CONN
22 DP3_SBU1 DP3_SBU2 SBU1 C_SBU1 USBC_SBU2_CONN
D 14 2 VCC3_LDO_DOCK B3 A2 D
22 DP3_SBU2 SBU2 C_SBU2 IN1 OUT1

1U_0402_25V6-K

0.47U_0402_25V6-K

0.47U_0402_25V6-K

1U_0402_25V6-K
C2 A3
USBC_CC1 12 4 USBC_CC1_CONN C3 IN2 OUT2 B2
24 USBC_CC1 USBC_CC2 CC1 C_CC1 USBC_CC2_CONN IN3 OUT3 2 2 2 2

C9623

C9624

C9625

C9626
11 5
24 USBC_CC2 CC2 C_CC2 R10370 A1 B1
20 7 R10373 EN# ACOK#
100K_0201_5% 2 1
19 D1 RPD_G1 C9539 1 2 C1 C9540 1 1 1 1

GND_1
GND_2
GND_3
17 D2 6 0.1U_0402_25V6-K OVLO 1U_0603_25V6-K

2
C9538 16 D3 RPD_G2 1M_0201_5%
D4

2
9 1 2
1 2 3 FLT R10371 FPF2281BUCX-F130_WLCSP12 @ @

C4
A4
B4
VBIAS 8 51.1K_0201_1%
0.1U_0603_50V7-K GND1 13 R10667 1 @ 2 0_0402_5%
GND2

1
18

1
GND3 21 R11048
THERMAL_PAD 100_0603_5%
TPD8S300_QFN20_3X3

2
@
Over Voltage Lock Out Trip Threshold = 1.20 * ( 1 + R10373 / R10371 )

1
Q624 D
USBC_SBU1_CONN R10639 1 2 2M_0201_5% USBC_DISCHARGE 2
USBC_SBU2_CONN 24 USBC_DISCHARGE
R10640 1 2 2M_0201_5% G

S 2N7002KW_SOT323-3 USBC_VBUS20_CONN

3
@

R10647
Vendor P/N LCFC P/N

Ele
KOA 100 +-5% 0603 SD000022U0T

GND3

GND2

GND1
C Rohm 100 +-5% 0603 SD000022V0T JUSBC1 @ C

Q269

GND7

GND6

GND5
Vendor P/N LCFC P/N
ON-semi 2N7002KW SB00001JY00
NXP NX7002BKW SB00001GU00 B12 A1
GND4 GND1
USBC_RX1P_CONN B11 A2 USBC_TX1P_CONN
SSRXP1 SSTXP1

tro
USBC_RX1N_CONN B10 A3 USBC_TX1N_CONN
SSRXN1 SSTXN1
B9 A4
VBUS1 VBUS2
USBC_SBU2_CONN B8 A5 USBC_CC1_CONN
SBU2 CC1
USBP3-_CONN B7 A6 USBP3+_CONN
DN2 DP1
USBP3+_CONN B6 A7 USBP3-_CONN
DP2 DN1
USBC_CC2_CONN B5 A8 USBC_SBU1_CONN
CC2 SBU1
B4 A9
VBUS3 VBUS4

-X
USBC_TX2N_CONN B3 A10 USBC_RX2N_CONN
SSTXN2 SSRXN2_1
USBC_TX2P_CONN B2 A11 USBC_RX2P_CONN
SSTXP2 SSRXN2_2
B1 A12
GND3 GND2
L52 EXC14CZ070U_4P
USBC_SS+_TX3AN_R C74 1 2 USBC_SS+_TX3AN_L 1 2 USBC_TX1N_CONN
22 USBC_SS+_TX3AN_R 1 2
B 0.22U_25V_K_X5R_0402 HIGHS_UB11247-0500C-1H B

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
USBC_SS+_TX3AP_R 1 2 USBC_SS+_TX3AP_L 3 4 USBC_TX1P_CONN

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
C75

GND10
22 USBC_SS+_TX3AP_R 3 4

GND9

GND8
0.22U_25V_K_X5R_0402

Te
EMC@

1
L53 EXC14CZ070U_4P

GND6

GND5

GND4
USBC_SS+_RX3AP_R 2 USBC_SS+_RX3AP_L 1 USBC_RX1P_CONN

1
C11189 1 2

1
22 USBC_SS+_RX3AP_R 1 2
0.22U_25V_K_X5R_0402

1
USBC_SS+_RX3AN_R C11190 1 2 USBC_SS+_RX3AN_L 3 4 USBC_RX1N_CONN
22 USBC_SS+_RX3AN_R 3 4
0.22U_25V_K_X5R_0402
EMC@

EMC@

EMC@

EMC@

EMC@
2

2
D4058

D4059

D4064

D4065
2

2
EMC@

EMC@
D746

D748

ch

2
2

2
L54 EXC14CZ070U_4P
USBC_SS+_TX3BN_R C76 1 2 USBC_SS+_TX3BN_L 1 2 USBC_TX2N_CONN
22 USBC_SS+_TX3BN_R 1 2
0.22U_25V_K_X5R_0402
USBC_SS+_TX3BP_R C77 1 2 USBC_SS+_TX3BP_L 3 4 USBC_TX2P_CONN
22 USBC_SS+_TX3BP_R 3 4
0.22U_25V_K_X5R_0402
EMC@

EMC@
USBC_SS+_RX3BN_R D4074 D4075
C11191 1 2 USBC_SS+_RX3BN_L 3 4 USBC_RX2N_CONN
22 USBC_SS+_RX3BN_R 3 4 USBC_RX1P_CONN USBC_RX1P_CONN USBC_TX1P_CONN USBC_TX1P_CONN
0.22U_25V_K_X5R_0402 1 10 1 10

ni
Line-1 NC1 Line-1 NC1
USBC_SS+_RX3BP_R C11192 1 2 USBC_SS+_RX3BP_L 1 2 USBC_RX2P_CONN USBC_RX1N_CONN 2 9 USBC_RX1N_CONN USBC_TX1N_CONN 2 9 USBC_TX1N_CONN
22 USBC_SS+_RX3BP_R 1 2 Line-2 NC2 Line-2 NC2
0.22U_25V_K_X5R_0402
L73 EXC14CZ070U_4P 3 8 3 8
GND1 GND2 GND1 GND2
USBC_TX2N_CONN 4 7 USBC_TX2N_CONN USBC_RX2N_CONN 4 7 USBC_RX2N_CONN
EMC_NS@ Line-3 NC3 Line-3 NC3
A
R10629 1 2 0_0402_5% USBC_TX2P_CONN 5 6 USBC_TX2P_CONN USBC_RX2P_CONN 5 6 USBC_RX2P_CONN A
Line-4 NC4 Line-4 NC4

ca
L74 EMC@ AZ1023-04F.R7G_DFN2510P10E10 AZ1023-04F.R7G_DFN2510P10E10
USBP3+_CONN 4 3 EMC@ EMC@
4 3 USBP3+ 9

USBP3-_CONN 1 2
1 2 USBP3- 9
Security Classification LC Future Center Secret Data Title
EXC24CH900U_4P
Issued Date Deciphered Date USB_TYPE-C CONNECTOR
EMC_NS@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
R10630 1 2 0_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Windu-2 AMD

l
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Saturday, April 14, 2018 Sheet 26 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

eleTro-X Technical
+3VALW _U6 Equalizer control and program for channel A
3.3V tolerant. Internally pulled down at ~150K
[A_EQ1, A_EQ0] ==
USB_EQ1_A R11315 2 1 4.7K_0201_5% LL: program EQ for channel loss up to 9.5dB(default)
LH: program EQ for channel loss up to 13dB
USB_EQ0_A R11316 2 @ 1 4.7K_0201_5% HL: program EQ for channel loss up to 4.5dB
HH: program EQ for channel loss up to 7.5dB
D +3VALW _U6 D

Programmable output de-emphasis level setting for channel A

+3VALW _RE +3VS 3.3V tolerant. Internally pulled down at ~150K
USB_DE0_A R11317 2 @ 1 4.7K_0201_5% [A_DE1, A_DE0] ==
LL: 3.5dB de-emphasis (default)
USB_DE1_A R11318 2 @ 1 4.7K_0201_5% LH: No de-emphasis
HL: 2.7dB de-emphasis
R41119 1 @ 2 0_0603_5% HH: 5dB de-emphasis
+3VALW _U6 Equalizer control and program for channel B
R11165 1 @ 2 0_0603_5% +3VALW _U6 3.3V tolerant. Internally pulled down at ~150K
[B_EQ1, B_EQ0] ==
USB_EQ1_B R11319 2 @ 1 4.7K_0201_5% LL: program EQ for channel loss up to 9.5dB(default)
1 1 U6 LH: program EQ for channel loss up to 13dB
1 USB_EQ0_B R11323 2 @ 1 4.7K_0201_5% HL: program EQ for channel loss up to 4.5dB
CW32 CW33 13 VDD1 HH: program EQ for channel loss up to 7.5dB
0.1U_0201_10V6-K 0.1U_0201_10V6-K VDD2
2 2 +3VALW _U6
USB_EQ1_A 15 4 USB_EQ1_B Programmable output de-emphasis level setting for channel B
USB_DE0_A 16 A_EQ1_SDA_CTL B_EQ1_I2C_ADDR1 3 USB_DE0_B 3.3V tolerant. Internally pulled down at ~150K
USB_EQ0_A 17 A_DE0_SCL_CTL B_DE0_I2C_ADDR0 2 USB_EQ0_B USB_DE0_B R11320 2 @ 1 4.7K_0201_5% [B_DE1, B_DE0] ==
USB_DE1_A 18 A_EQ0_NC B_EQ0_NC 6 USB_DE1_B LL: 3.5dB de-emphasis (default)
A_DE1_NC B_DE1_NC USB_DE1_B R11321 2 @ 1 4.7K_0201_5% LH: No de-emphasis
C11173 1 2 0.1U_0201_6.3V6-K USB3P1_SYSP1_TXP_C 19 12 USB30_TX_P3_U C8635 1 2 0.1U_0201_6.3V6-K USB3P1_TXP_AOU_U HL: 2.7dB de-emphasis
9 USB3P1_TXP_AOU USB3P1_SYSP1_TXN_C A_INp A_OUTp USB30_TX_N3_U C8636 USB3P1_TXN_AOU_U USB3P1_TXP_AOU_U 30 HH: 5dB de-emphasis
C11174 1 2 0.1U_0201_6.3V6-K 20 11 1 2 0.1U_0201_6.3V6-K
9 USB3P1_TXN_AOU A_INn A_OUTn USB3P1_TXN_AOU_U 30 +3VALW _U6

Ele
LFPS swing adjust.
R11312 1 @ 20_0201_5% USB3P1_SYSP1_RXP_R 9 22 USB30_RX_P3_C C11171 1 2 0.1U_0201_6.3V6-K USB3P1_RXP_AOU 3.3V tolerant. Internally pulled down at ~150KΩ
30 USB3P1_RXP_AOU_U USB3P1_SYSP1_RXN_R B_INp B_OUTp USB30_RX_N3_C C11172 1 USB3P1_RXN_AOU USB3P1_RXP_AOU 9
R11311 1 @ 20_0201_5% 8 23 2 0.1U_0201_6.3V6-K TEST==
30 USB3P1_RXN_AOU_U B_INn B_OUTn USB3P1_RXN_AOU 9
TEST R11322 2 @ 1 4.7K_0201_5% L: Normal LFPS swing(default)
TP978 H:Turn down LFPS swing
1 USBA_U6RE_EN_R 5
REXT 7 PD# 10
@ TEST 14 REXT GND1 21
24 TEST GND2 25 +3VS
I2C_EN GPAD
1

+3VALW _RE
RW30 PS8713BTQFN24GTR2A_TQFN24_4X4
4.99K_0402_1% R41132 1 2 0_0603_5%

+3VALW @

tro
2

C C

+3VALW

LP2301ALT1G_SOT23-3

D
Q3067 3 1
R2308 1

-X
10K_0402_5% 1 2 1
C10339 C10341 C10342

G
2
+1.2V VCC1R2B 0.1U_0402_10V6-K C10340

2
2 0.01U_0201_25V6-K 10U_0603_6.3V6M 0.1U_0402_10V6-K
@ 2@ 1 2

1
R11115 1 2 0_0603_5% C10338
0.1U_0402_10V6-K

1
D 2
@
R41110 1 @ 2 0_0402_5% 2

Te
44,64 SYSON 1
@ G
L71 1 2 BLM18PG181SN1D_2P C10343 Q31 S

3
0.1U_0402_10V6-K 2N7002W T1G_SC-70-3
2
@

+1.2V_R

+3VALW _RE +3VALW _RE

ch
R12117 1 2 0_0603_5%
+3VALW _RE VCC1R2B 1

1
USBA_RE_EN R41112 1 @ 2 0_0402_5% USBA_RE_EN_R
@ 44 USBA_RE_EN
R11104 R11105
4.7K_0201_5% 10K_0201_5%

B B
2

2
VCC1R2B
40
37
35
28
25
21
16
12

U3323
8
7
6
1
VDD33_2

VDD_A2
VDD_DM_4
VDD_D2_1
VDD33_1
VDD_DM_3
VDD_A1
VDD_DM_2
VDD_R2
VDD_R1
VDD_DM_1
VDD_DCI

ni

0.01U_0201_10V6K

0.01U_0201_10V6K

0.01U_0201_10V6K

0.01U_0201_10V6K

0.01U_0201_10V6K
0.1U_0402_10V6-K

0.1U_0402_10V6-K

0.1U_0402_10V6-K

0.1U_0402_10V6-K

0.1U_0402_10V6-K
C10142

C10144

C10146

C10143

C10148

C10145

C10150

C10147

C10151

C10149
4.7U_0402_6.3V6-M
R11098 1 2 10_0201_5% USB3P2_SYSP2_RXP_R 2 39 USB_DCI_TP1 1 @ TP964
30 USB3P0_RXP_U USB3P2_SYSP2_RXN_R RXp DCI_DATA USB_DCI_TP2 1 1 1 1 1 1 1 1 1 1 1
R11097 1 2 10_0201_5% 3 38 1

C10141
@ TP965
30 USB3P0_RXN_U RXn DCI_CLK U3_CH2_CEQ
4 36
5 TEST CEQ 34 U3_CH2_SSEQ
USB3P0_RXN C10133 1 2 0.33U_0402_10V6-K USB3P2_SYSP2_RXN_C 10 RSV2 SSEQ 33 USBA_RE_RST#_R 2 2 2 2 2 2 2 2 2 2 2
9 USB3P0_RXN USB3P0_RXP USB3P2_SYSP2_RXP_C SSRXn RESET# USB3P2_SYSP2_TXN_CONN_C
C10134 1 2 0.33U_0402_10V6-K 11 32 C10137 1 2 0.22U_0201_6.3V6-K
9 USB3P0_RXP USB3P0_TXN USB3P0_TXN_U 30
C10131 1 2 0.22U_0201_6.3V6-K USB3P2_SYSP2_TXN_C 13 SSRXp TXn 31 USB3P2_SYSP2_TXP_CONN_C C10136 1 2 0.22U_0201_6.3V6-K CD@
9 USB3P0_TXN USB3P0_TXP SSTXn TXp USB3P0_TXP_U 30
C10132 1 2 0.22U_0201_6.3V6-K USB3P2_SYSP2_TXP_C 14 29

ca
9 USB3P0_TXP U3_CH2_ADDR SSTXp REXT USBA_RE_EN_R
17 27
U3_CH2_CDE 18 ADDR EN 26
19 CDE NC 24
Place close to PS8801 1.2 power pins
GND_1
GND_2
GND_3

GPIO0 RSV1 EC_I2C2_SDA_RE2 EC_I2C2_SDA

EPAD

20 23 R11181 2 @ 1 0_0402_5%
GPIO1 CSDA EC_I2C2_SCL_RE2 EC_I2C2_SCL EC_I2C2_SDA 24,44
22 R11182 2 @ 1 0_0402_5%
CSCL EC_I2C2_SCL 24,44
KevinH: C10133 C10134 Will change to 0.33U CAP PS8801QFN40GTR-A2_QFN40_6X4
9
15
30
41

R11102 1 2 +3VALW _RE +3VALW _RE

R11101 C10135 4.7K_0201_5% +3VALW _RE
4.99K_0402_1% 1U_0201_6.3V6-K @
R11103 1 2

l
4.7K_0201_5%
2

+3VALW _RE +3VALW _RE +3VALW _RE +3VALW _RE

1
C10140 C10138 C10139
1U_0201_6.3V6-K 0.1U_0402_10V6-K 1U_0201_6.3V6-K
1

2
R11106 R11108 R11109 R11111
4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5%
@ @ @ @
2

U3_CH2_ADDR U3_CH2_CDE U3_CH2_SSEQ U3_CH2_CEQ

A A
1

R11107 R11110 R11112 R11113

4.7K_0201_5%
@
4.7K_0201_5%
@
4.7K_0201_5%
@
4.7K_0201_5% Place close to PS8801 3.3V power pins Place close to PS8801 DCI power pin (Pin 37)
C
2

Security Classification LC Future Center Secret Data Title

MEC1653(2/3)
eleTro-X Technical Issued Date 2015/11/02
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Deciphered Date 2015/8/10

Size Document Number Rev

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 27 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS +3VS_REDRIVER
R10194 +3VS_REDRIVER
2 1

0.01_0603_LE_1%
1 1 1 1 1
C2719 C2720 C2721 C10172 C10171

2
0.1U_0201_6.3V6-K
2
0.1U_0201_6.3V6-K
2
0.1U_0201_6.3V6-K
2
0.1U_0201_6.3V6-K
2 eleTro-X Technical
10U_0402_6.3V6-M

+3VS_REDRIVER

MODE

10
16
25
1
D U157 D
GPP_SSD_TXP1 C2715 1 2 0.22U_0201_6.3V6-K GPP_SSD_TXP1_C 2 0 SATA
TX

VDD_1
VDD_2
VDD_3
VDD_4
3 GPP_SSD_TXP1 GPP_SSD_TXN1 GPP_SSD_TXN1_C AIP REDR_MODE
C2716 1 2 0.22U_0201_6.3V6-K 3 30
HOST 3 GPP_SSD_TXN1
R11144 2 1 @ 4.7K_0201_5% 5 AIN MODE 29 A_SW A REDR_MODE 29
GPP_SSD_RXN1 C2717 1 2 0.22U_0201_6.3V6-K GPP_SSD_RXN1_C 8 TEST# SWA 27 A_FGA 1 PCIE
RX 3 GPP_SSD_RXN1 GPP_SSD_RXP1 C2718 1 2 0.22U_0201_6.3V6-K GPP_SSD_RXP1_C 9 BON FGA 26 A_EQA1
3 GPP_SSD_RXP1
R2693 2 1 10K_0201_5% EN# 11 BOP EQA1 24 PCIE10_L1_SATA2_TXP_CONN_C C11150 2 1 0.22U_0201_6.3V6-K PCIE10_L1_SATA2_TXP_CONN RX
B_SW B EN# AOP PCIE10_L1_SATA2_TXN_CONN_C PCIE10_L1_SATA2_TXN_CONN PCIE10_L1_SATA2_TXP_CONN 29
12 23 C11149 2 1 0.22U_0201_6.3V6-K
B_FGB 14 SWB AON 18 PCIE10_L1_SATA2_RXN_CONN_C C10448 2 1 0.22U_0201_6.3V6-K PCIE10_L1_SATA2_RXN_CONN PCIE10_L1_SATA2_TXN_CONN 29 Device
B_EQB1 FGB BIN PCIE10_L1_SATA2_RXP_CONN_C PCIE10_L1_SATA2_RXP_CONN PCIE10_L1_SATA2_RXN_CONN 29
15 17 C11138 2 1 0.22U_0201_6.3V6-K
B_EQB0 20 EQB1 BIP 21 A_EQA0 PCIE10_L1_SATA2_RXP_CONN 29 TX
EQB0 EQA0

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
HGND
PI3EQX12902AZLE_TQFN30_2P5X4P5

4
6
7
13
19
22
28
31
+3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER

Ele
1

1
R9411 R9413 R9447 R9449 R10496 R10495 R11151 R11152
@ @ @ @ @ @ @ @
4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5%
2

2
A_EQA1 B_EQB1 A_FGA B_FGB A_SW A B_SW B B_EQB0 A_EQA0
1

1
R9443 R9445 R9448 R9450 R10497 R10498 R11153 R11154
@ @ @ @ @ @
4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5%

tro
2

2
C C

+3VS_REDRIVER

-X
1 1 1 1 1
C2726 C2727 C2728 C10175 C10176

0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 10U_0402_6.3V6-M

2 2 2 2 2

Te
+3VS_REDRIVER

10
16
25
1

U185
GPP_SSD_TXP0 C11143 2 1 0.22U_0201_6.3V6-K GPP_SSD_TXP0_C 2
VDD_1
VDD_2
VDD_3
VDD_4
3 GPP_SSD_TXP0 GPP_SSD_TXN0 GPP_SSD_TXN0_C AIP

ch
C11144 2 1 0.22U_0201_6.3V6-K 3 30 R11143 1 2 10K_0201_5%
TX 3 GPP_SSD_TXN0
R11145 2 1 @ 4.7K_0201_5% 5 AIN MODE 29 PCIE_A_SW A +3VS_REDRIVER
HOST GPP_SSD_RXN0 C2723 2 1 0.22U_0201_6.3V6-K GPP_SSD_RXN0_C 8 TEST# SWA 27 PCIE_A_FGA
3 GPP_SSD_RXN0 GPP_SSD_RXP0 GPP_SSD_RXP0_C BON FGA PCIE_A_EQA1
C2722 2 1 0.22U_0201_6.3V6-K 9 26
RX 3 GPP_SSD_RXP0 REDR_PE_EN# 11 BOP EQA1 24 PCIE10_L0_TXP_CONN_C C11152 2 1 0.22U_0201_6.3V6-K PCIE10_L0_TXP_CONN
29 REDR_PE_EN# PCIE_B_SW B 12 EN# AOP 23 PCIE10_L0_TXN_CONN_C C11151 2 1 0.22U_0201_6.3V6-K PCIE10_L0_TXN_CONN PCIE10_L0_TXP_CONN 29 RX
PCIE_B_FGB SWB AON PCIE_CRX_GTX_N1_CONN_C PCIE10_L0_RXN_CONN PCIE10_L0_TXN_CONN 29
14 18 C11142 2 1 0.22U_0201_6.3V6-K
PCIE_B_EQB1 15 FGB BIN 17 PCIE_CRX_GTX_P1_CONN_C C11141 2 1 0.22U_0201_6.3V6-K PCIE10_L0_RXP_CONN PCIE10_L0_RXN_CONN 29 Device
PCIE_B_EQB0 EQB1 BIP PCIE_A_EQA0 PCIE10_L0_RXP_CONN 29
B 20 21 B
EN# EQB0 EQA0 TX
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
HGND

0 Normal

ni
PI3EQX12902AZLE_TQFN30_2P5X4P5
4
6
7
13
19
22
28
31

1 Disable

ca
+3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER
1

R2706 R2712 R2707 R2711 R10494 R10493 R11148 R11147

@ @ @ @ @ @ @ @
4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5%
2

PCIE_B_EQB1 PCIE_A_EQA1 PCIE_B_FGB PCIE_A_FGA PCIE_B_SW B PCIE_A_SW A PCIE_B_EQB0 PCIE_A_EQA0

l
1

R2714 R2709 R2710 R2713 R10491 R10492 R11149 R11150

@ @ @ @ @ @
4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 4.7K_0201_5%
2

TABLE: PI3EQX862 Output De-emphasis Setting (DE_A & DE_B) TABLE: Mode Configuration Table
GND -2.5 dB
EN# MODE Mode
Open 0 dB (Default) LOGIC
TABLE: PI3EQX12902BZLE Input Equalization Setting (EQ_A & EQ_B) Low Low SATA Application
A A

VDD -4 dB
@3GHz @4GHz Low High PCIe Application

GND 6.3 dB 8.7 dB LOGIC High X Disable

Open 4.7 dB (Default) 6.7 dB (Default)

eleTro-X
VDD
Technical
8.2 dB 10.8 dB
Security Classification
Issued Date 2015/11/02
LC Future Center Secret Data
Deciphered Date 2015/08/10
Title

STORAGE I/F REDRIVER

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 28 of 66
5 4 3 2 1
 5 4 3 2 1

+5VS_HDD +3VS_HDD +5VS +3VS +3VALW

eleTro-X Technical

1
R11187 PE_DTCT#

2
1 1 1 1 F1 F41
C11198 C11199 C11200 C11201 10K_0201_5%
D D

2
0.1U_0402_25V6-K 0.1U_0402_25V6-K 0.1U_0402_25V6-K 0.1U_0402_25V6-K
@

3A_32V_ERBRD3R00X

3A_32V_ERBRD3R00X
2 2 2 2
@ @ @ @ IFDET

1
D
SATA Device GND

1
IFDET 2 Q178
PCIe Device 5K PU to Vsource G LSK3541G1ET2L_VMT3

+5VS_HDD

+3VS_HDD

3
2
R2037
JHDD1 20K_0402_5%
40 52

1
CLK_PCIE_HDD# 39 40 GND12 51
8 CLK_PCIE_HDD# CLK_PCIE_HDD 39 GND11
38 50
8 CLK_PCIE_HDD 38 GND10
37 49
PCIE10_L1_SATA2_TXP_CONN 36 37 GND9 48
28 PCIE10_L1_SATA2_TXP_CONN PCIE10_L1_SATA2_TXN_CONN 36 GND8
35 47
28 PCIE10_L1_SATA2_TXN_CONN 35 GND7
34 46
PCIE10_L1_SATA2_RXN_CONN 33 34 GND6 45
28 PCIE10_L1_SATA2_RXN_CONN PCIE10_L1_SATA2_RXP_CONN 33 GND5
32 44
28 PCIE10_L1_SATA2_RXP_CONN 32 GND4
31 43
PCIE10_L0_TXP_CONN 30 31 GND3 42 +3VS_REDRIVER
28 PCIE10_L0_TXP_CONN PCIE10_L0_TXN_CONN 30 GND2

Ele
29 41
28 PCIE10_L0_TXN_CONN 29 GND1
28
PCIE10_L0_RXN_CONN 27 28
28 PCIE10_L0_RXN_CONN 27

2
PCIE10_L0_RXP_CONN 26
28 PCIE10_L0_RXP_CONN 26
25
SSD_RST# 24 25 R2719
HDD_CLKREQ# 23 24 10K_0201_5%
C C
8 HDD_CLKREQ# SATA2_DEVSLP_CONN 23
SATA2_DEVSLP_CONN 22

1
IFDET 21 22
7 IFDET HDD_DETECT# 21
20
36 HDD_DETECT# 20 PE_DTCT#
19 R11212 1 @ 2 0_0402_5%
19 REDR_PE_EN# 28
18
18

tro
17
16 17 +3VS_REDRIVER
15 16
14 15
HDD_DETECT# 14
13
2.5'' HDD/SSD signal short to GND in cable 13

2
12
M.2 SSD signal connect to M.2 conn. GND pin 11 12
10 11 R2720
9 10
9 10K_0402_5%
8

1
7 8
6 7

-X
5 6
SSD_RST# 5 REDR_MODE 28
IFDET 4
3 4
3

1
1 2 D
EMC@ EMC@ 1 2 2
1 2 2 1
C571 C563 C92 C10031 G Q224
I-PEX_20525-040E-02 LSK3541G1ET2L_VMT3
0.1U_0201_6.3V6-K 2 0.1U_0402_25V6-K 10U_0402_6.3V6-M 0.01U_0201_6.3V7-K S
@

3
2 1 1

Te
B B

ch
R10445 1 @ 2 0_0402_5%
+3VS
Q271

1
SATA2_DEVSLP 1 3 SATA2_DEVSLP_CONN
D

7 SATA2_DEVSLP
R10519 1 @ 2 0_0402_5% R11120
2N7002WT1G_1N_SC-70-3 @

ni
A. Vth = 2.5V (MAX) 10K_0201_5%
G
2

B. Id = 340 mA (MAX) D747

2
1 2 0_0402_5% C. RDSon = 2.5 ohm(MAX) PLT_RST# 3
7,8 DEVSLP_GATE# R11219 @ D. Vth in schematic = 3.3V 7,19,31,32,35,36,37,51 PLT_RST#
1 SSD_RST#
+5VS_HDD PCIE_SSD_RST# SSD_RST# 36
R11220 1 @ 2 0_0402_5% 1 7 PCIE_SSD_RST# 2
C11153
BAT54AWT1G_SOT323-3

1
@ 1000P_0402_50V7-K

ca
2 R11119
100K_0402_5%

2
@
A A

l
Security Classification LC Future Center Secret Data Title
Issued Date 2015/11/02 Deciphered Date 2015/08/10 SATA EXPRESS CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 29 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

USB_PWR_S2
PLACE NEAR USB CONNECTOR
WIDE PATTERN(MIN 500mA)
+5VALW

1
2 EMC@ 2 EMC@
C772
0.1U_0201_6.3V6-K
C774
0.1U_0201_6.3V6-K
+ C1269
150U_B2_6.3VM_R35M
@ R10259

FLJ2
eleTro-X Technical
1 2 0_0402_5%

EMC@
1 1 2 USBP1-_CONN 2 1 USBP1-_AOU_OUT
2 1
2
C1291
2
C257 Current Limit Target:
4.7U_0402_6.3V6-M 0.1U_0402_10V6-K ILIM_Hi -> 2.27A(1.98A - 2.56A) USBP1+_CONN 3
3 4
4 USBP1+_AOU_OUT
@
1 1 ILIM_Lo-> 0.62A(0.52A - 0.72A) JUSB1 @ EMC@ EXC24CH900U_4P
USB_PWR_S2 1 AOZ8904CIL_SOT23-6
D VBUS 2 3 4 D
4 D- 3 @ R10260 1 2 0_0402_5%
U88 @ 7 GND1 D+
10 GND2 5 Place same location
1 16 N30910915R1104 1 2 22.1K_0402_1% 11 GND3 StdA_SSRX- 6 2 5
IN ILIM_HI 12 GND4 StdA_SSRX+
2 15 N31995447
R1114 1 2 80.6K_0402_1% 13 GND5 8
9 USBP1-_AOU DM_OUT ILIM_LO GND6 StdA_SSTX- 9
3 14 StdA_SSTX+ 1 6
9 USBP1+_AOU DP_OUT GND
4 13 SINGA_2UB4008-500101F D80
ILIM_SEL FAULT USB_OC1# 9
@ R10267 1 2 0_0402_5%
44 AOU_EN
5 12
EN OUT FLJ5 EMC@
6 11 USBP1-_AOU_OUT USB3P1_RXN_CONN 2 1
44 AOU_CTL1 CLT1 DM_IN 2 1 USB3P1_RXN_AOU_U 27
7 10 USBP1+_AOU_OUT
CLT2 DP_IN EMC@ USB3P1_RXP_CONN 3 4

E_PAD
3 4 USB3P1_RXP_AOU_U 27
44 AOU_CTL3 8 9 AOU_DET# 44 D4076
CLT3 STATUS EXC24CH900U_4P

SN1702001RTER_WQFN16_3X3

17
USB3P1_TXP_CONN 1 9 USB3P1_TXP_CONN @ R10268 1 2 0_0402_5%

Ele
USB3P1_TXN_CONN 2 8 USB3P1_TXN_CONN
USB3P1_RXP_CONN 4 7 USB3P1_RXP_CONN
USB3P1_RXN_CONN 5 6 USB3P1_RXN_CONN

RCLAMP0524PATCT_SLP2510P8-10-9
TABLE of USB Charge IC (U88)

3
@ R10269 1 2 0_0402_5%
Vendor P/N LCFC P/N FLJ6 EMC@
USB3P1_TXN_CONN 2 1 USB3P1_TXN_AOU_U
TI SN1702001RTER SA00008HF00 2 1 USB3P1_TXN_AOU_U 27

tro
Pericom PI5USB2546ZHEX SA000066I00 USB_PWR_S3 USB3P1_TXP_CONN 3 4 USB3P1_TXP_AOU_U
C
WIDE PATTERN(MIN 500mA) 3 4 USB3P1_TXP_AOU_U 27
C

EXC24CH900U_4P
PLACE NEAR USB CONN
@ R10270 1 2 0_0402_5%

1
2 EMC@ 2 EMC@
C771 C773 + C1248

-X
0.1U_0402_10V6-K 0.1U_0402_10V6-K 150U_B2_6.3VM_R35M
1 1 2

@ R10257 1 2 0_0402_5%

+5VALW USB_PWR_S3
JUSB2 @ FLJ1 EMC@
1 USBP0-_CONN 2 1 USBP0-
VBUS 2 2 1 USBP0- 9

Te
@ 4 D- 3
C3 1 2 4.7U_0402_6.3V6-M 7 GND1 D+ USBP0+_CONN 3 4 USBP0+
GND2 3 4 USBP0+ 9
10 5
11 GND3 StdA_SSRX- 6 EMC@ EXC24CH900U_4P
C179 1 2 0.1U_0201_6.3V6-K 12 GND4 StdA_SSRX+ AOZ8904CIL_SOT23-6
13 GND5 8 3 4 @ R10258 1 2 0_0402_5%
U53 GND6 StdA_SSTX- 9
9 StdA_SSTX+ Place same location
GND_2
1 8 SINGA_2UB4008-500101F 2 5

ch
2 GND_1 OUT_8 7
3 IN_2 OUT_7 6
USB_ON1 4 IN_3 OUT_6 5 USB_OC2#
44 USB_ON1 EN/EN FLT USB_OC2# 9
1 6
TPS2069CDGNR MSOP 8P
D231
B B
EMC@
USB3P0_RXN_CONN 3 4
3 4 USB3P0_RXN_U 27

ni
USB3P0_RXP_CONN 1 2
D4077 1 2 USB3P0_RXP_U 27
TABLE of USB3.0 Single (U53) USB3P0_TXP_CONN 1 10 USB3P0_TXP_CONN FLJ3 EXC14CZ070U_4P
Line-1 NC1
Vendor P/N LCFC P/N USB3P0_TXN_CONN 2 9 USB3P0_TXN_CONN
Line-2 NC2
TI TPS2069CDGNR SA00005TE00 3 8
GND1 GND2
Rohm BD82032FVJ-GE2 SA000084S00 USB3P0_RXP_CONN USB3P0_RXP_CONN

ca
4 7
Line-3 NC3
USB3P0_RXN_CONN 5 6 USB3P0_RXN_CONN
Line-4 NC4

AZ1023-04F.R7G_DFN2510P10E10
EMC@

EMC@
USB3P0_TXN_CONN 3 4 USB3P0_TXN_U
3 4 USB3P0_TXN_U 27

l
USB3P0_TXP_CONN 1 2 USB3P0_TXP_U
1 2 USB3P0_TXP_U 27
FLJ4 EXC14CZ070U_4P

A A

KevinH: USB3.1 GEN2 common choke follow TINY5, NEED CONFIRM

Security Classification LC Future Center Secret Data Title

USB POWER/CONN (1/2)

eleTro-X Technical Issued Date 2015/11/02 Deciphered Date 2015/08/10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 30 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

+3VALW TO +3VALW_LAN_SYS +3VALW_LAN rising t i me ( 10 %~90 %):

0 . 5 m s ＜s pec＜ 1 0 0m
s
+3VALW1_LAN +3VALW_LAN_SYS +3VALW_LAN_SYS +LAN_VDDREG_SYS
Need short
RL84 1 @ 2 0_0603_5% width : 40 mils RL1 1 @ 2 0_0603_5%

2 1
CL1
2 2 1 1 4.7U_0402_6.3V6-M CL2
CL4 CL5 EMC@ 0.1U_0201_6.3V6-K
4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M CL6 CL7 1 2
CD@ CD@ 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K
1 1 2 2

Ele
Close to Pin11 Close to Pin32 Close to Pin11 Close to Pin32

+3VALW_LAN_SYS
2

tro
RL5
C UL1 C
10K_0402_5%
1

RL6 1 @ 2 0_0402_5% SYS_LAN_WAKE#_R

32,44 LAN_WAKE#
33 +3VALW_LAN_SYS +3VS
+3VALW_LAN_SYS 32 GND 16 CLK_PCIE_LAN_SYS#
2 1 31 AVDD33_2 REFCLK_N 15 CLK_PCIE_LAN_SYS CLK_PCIE_LAN_SYS# 8
RL8 RSET
+LAN_VDD10 30 RSET REFCLK_P 14 GPP_SYS_LAN_TXN CLK_PCIE_LAN_SYS 8
2.49K_0402_1%
AVDD10 HSIN GPP_SYS_LAN_TXN 3

2
LAN_XTALO 29 13 GPP_SYS_LAN_TXP
CKXTAL2 HSIP GPP_SYS_LAN_TXP 3

2
LAN_XTALI 28 12 SYS_LAN_CLKREQ#_R RL90

G
CKXTAL1 CLKREQB

-X
+3VS RJ45_ACTIVITY_SYS#
27 11 +3VALW_LAN_SYS QL2
34 RJ45_ACTIVITY_SYS# EC_WAKE# EC_WAKE#_R LED0 AVDD33_1 SYS_MDI_3- 10K_0402_5%
RL12 1 @ 2 0_0402_5% 26 10 @ @
7,32,44 EC_WAKE# RJ45_LINKUP_SYS# LED1/GPIO MDIN3 SYS_MDI_3+ SYS_MDI_3- 33
34 RJ45_LINKUP_SYS#
25 9

1
LED2 MDIP3 SYS_MDI_3+ 33
1

+LAN_REGOUT 24 8 +LAN_VDD10 SYS_LAN_CLKREQ#_R 1 3

+LAN_VDDREG_SYS23 REGOUT AVDD10_2 7 SYS_MDI_2- SYS_LAN_CLKREQ# 8
RL9

S
+LAN_VDD10 22 VDDREG MDIN2 6 SYS_MDI_2+ SYS_MDI_2- 33
2N7002KW_SOT323-3
SYS_LAN_WAKE#_R21 DVDD10 MDIP2 5 SYS_MDI_1- SYS_MDI_2+ 33
1K_0402_1%
20 LANWAKEB MDIN1 4 SYS_MDI_1+ SYS_MDI_1- 33
ISOLATE#
2

PLT_RST# 19 ISOLATEB MDIP1 3 +LAN_VDD10 SYS_MDI_1+ 33 1 2 0_0402_5%

RL85 @
7,19,29,32,35,36,37,51 PLT_RST# GPP_SYS_LAN_RXN_C PERSTB AVDD10_1 SYS_MDI_0-
CL10 1 2 0.1U_0201_16V6-K 18 2
3 GPP_SYS_LAN_RXN GPP_SYS_LAN_RXP_C HSON MDIN0 SYS_MDI_0+ SYS_MDI_0- 33
ISOLATE# CL11 1 2 0.1U_0201_16V6-K 17 1

Te
3 GPP_SYS_LAN_RXP HSOP MDIP0 SYS_MDI_0+ 33

CL10 close to Pin18

1

RL11 CL11 close to Pin17

15K_0402_5%
2

RTL8111GUL-CG_QFN32_4X4
8111GUL@

ch
B B

For RTL8111GUL/ RTL8106EUL (SWR mode)

LAN_XTALI
For RTL8111H (LDO mode) RL19 stuf f
YL1 LAN_XTALO 8111H@ +LAN_VDD10

ni
RL19 1 2 0_0805_5%
1 4
OSC1 GND2
2 3 +LAN_REGOUT LL1 1 2
follow G CarrizoL 10pf GND1 OSC2 2.2UH_NLC252018T-2R2J-N_5%
1 1 1 8111GUL@ 1 1 1 1 1 1 1 1
CL15 CL22
CL12 25MHZ_10PF_7V25000014 CL13 CL77 CL16 CL17 CL18 CL19 CL20 CL21 1U_0201_6.3V6-K
12P_0402_50V8-J 12P_0402_50V8-J 0.1U_0201_6.3V6-K 4.7U_0603_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K @

ca
2 2 2 EMC@ 2 2 EMC@ 2 2 2 2 2@ 2
@
Layout Note: LL1 must be
within 200mil to Pin24,
Change CL12 from 10P to 12Pl HLZ SIV 0811 CL15,CL16 must be within Close to Pin3, 8, 22, 30 Close to Pin22(Reserved)
200mil to LL1
+LAN_REGOUT: Width =60mil

l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 GBE JACKSONVILLE

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 31 of 66
5 4 3 2 1
 5 4 3 2 1

SKU_ID1 DASH Non-DASH

eleTro-X Technical
RL31 V X
+3VALW_LAN +LAN_VDD
RL32 X V RL70 1 @ 2 0_0603_5%

1
RL81 +LAN_SROUT1.05 LL3 1 2 2.2UH_LQM2HPN2R2MG0L_20%
D
W=60mils D
+3VALW_LAN @
10K_0201_5% These components close to UL1 : Pin 36 W=60mils
RL63 1 @ 2 0_0603_5% +LAN_VDDREG
1 1 1

2
SKU_ID1 CL55 CL61 CL65
SKU_ID1 9
@
( Should be place within 200 mils )
1 1

1
CL70 CL74 0.1U_0402_10V7-K 0.1U_0402_10V7-K 4.7U_0603_6.3V6-K
RL66 2 2 2
4.7U_0603_6.3V6-K 0.1U_0402_10V7-K @
2 2 2K_0402_5%
UL6

2
JTDI Test_Point_12MIL 1 TPC34
Close to UL4 Pin 22, 23
40 DOCK_ACTIVITY_SYS#
GPP_LAN_RXP GPP_LAN_RXP_C LED0/JTRSTN DOCK_ACTIVITY_SYS# 25
3 GPP_LAN_RXP CL52 1 2 0.1U_0201_16V6-K 22 37 JTDI
GPP_LAN_RXN CL53 1 2 0.1U_0201_16V6-K GPP_LAN_RXN_C 23 HSOP LED1/JTDI 31 DOCK_LINKUP_SYS#
3 GPP_LAN_RXN HSON LED2/JTMS DOCK_LINKUP_SYS# 25
GPP_LAN_TXP 17 30 SPISO RL62 1 @ 2 0_0402_5% SPI_DI_L
3 GPP_LAN_TXP GPP_LAN_TXN HSIP SPISO

Ele
3 GPP_LAN_TXN 18
HSIN 1 DOCK_MDI_0+
LAN_CLKREQ#_R MDIP0 DOCK_MDI_0- DOCK_MDI_0+ 25 +3VALW_LAN +3VS
16 2 DOCK_MDI_0- 25
CLKREQB MDIN0
PLT_RST# 25 4 DOCK_MDI_1+
7,19,29,31,35,36,37,51 PLT_RST# PERSTB MDIP1 DOCK_MDI_1- DOCK_MDI_1+ 25
5 DOCK_MDI_1- 25
MDIN1

2
+3VALW_LAN CLK_PCIE_LAN 19
8 CLK_PCIE_LAN REFCLK_P

2
CLK_PCIE_LAN# 20 7 DOCK_MDI_2+ RL91

G
8 CLK_PCIE_LAN# REFCLK_N MDIP2 DOCK_MDI_2- DOCK_MDI_2+ 25
8 10K_0402_5% QL1
LAN_WAKE# MDIN2 DOCK_MDI_2- 25
RL83 1 @ 2 10K_0402_5% XTLI 43 @ @
XTLO 44 CKXTAL1 10 DOCK_MDI_3+
DOCK_MDI_3+ 25

1
CKXTAL2 MDIP3 11 DOCK_MDI_3- LAN_CLKREQ#_R 1 3
DOCK_ACTIVITY_SYS# MDIN3 DOCK_MDI_3- 25 LAN_CLKREQ# 8
RL69 1 2 @ 10K_0402_5%

S
tro
RL78 1 2 @ 10K_0402_5% JTDI R11196 1 @ 2 0_0402_5% 28 29 SPISI RL60 1 @ 2 0_0402_5% SPI_DO_L 2N7002KW_SOT323-3
DOCK_LINKUP_SYS# 31,44 LAN_WAKE# LANWAKEB SPISI +LAN_VDD
RL71 1 2 @ 10K_0402_5% RL77 2 1 NDASH@ 0_0402_5%
C RL74 1 2 1K_0402_5% SMB_ALERT ISOLATEB 26 13 C
ISOLATEB DVDD10_1 +LAN_VDD
41 RL87 1 @ 2 0_0402_5%
APU_SMB_CK1 14 DVDD10_2
7,44,48 APU_SMB_CK1 APU_SMB_DA1 SMBCLK SPI_CLK_L
15 27 SPISK RL61 1 @ 2 0_0402_5%
7,44,48 APU_SMB_DA1 SMBDATA SPISK +3VALW_LAN
RL79 2 1 NDASH@ 0_0402_5%
JTDO 32 39 +3VALW_LAN
R11173 1 @ 2 0_0402_5% SMB_ALERT 38 GPIO0/JTDO DVDD33
7,31,44 EC_WAKE# GPIO1/SMBALERT/JCLK 12
+3VS 33 AVDD33_1 42
+3VALW_LAN VDDREG_1 AVDD33_2
34 47
+LAN_VDDREG VDDREG_2 AVDD33_3

-X
48
1

TP973 @ 1 35 AVDD33_4
RL68 NC 21
EVDD10 +LAN_VDD
RL76 2 1 2.49K_0402_1% 46
1K_0402_1% RSET 3
AVDD10_1 6
2

ISOLATEB SPI_CS1#_L RL59 1 @ 2 0_0402_5% SPICSB 24 AVDD10_2 9

SPICSB AVDD10_3 45
1

1
AVDD10_4
RL80 RL73 49 36 +LAN_SROUT1.05
GND REGOUT

Te
NDASH@
15K_0402_5% 0_0402_5%
+3VALW_LAN
2

UL5 DASH@
RTL8111EPV-CG_QFN48_6X6 SPI_CS1#_L 1 8 CL58 1 2 0.1U_0402_10V7-K
CS# VCC
SPI_DI_L 2 7 SPI_HOLD#_L
DO HOLD#
SPI_WP#_L 3 6 SPI_CLK_L
WP# CLK
+3VALW_LAN +3VALW_LAN Rising time (10%~90%) >0.5mS and <100mS. SPI_DO_L

ch
4 5
RPL3 GND DI
1 8
2 7 SPI_CS1#_L W25Q80DVSNIG SOIC 8P SPI ROM
3 6 SPI_WP#_L
4 5 SPI_HOLD#_L +3VALW_LAN +LAN_VDD
XTLI RL75 1 @ 2 0_0402_5% XTLO
DASH@
B B
10K_0804_8P4R_5%

1
NDASH@ NDASH@ RL82

ni
TPC35 1 CL56 1 CL59 1 CL54 1 CL69 1 CL60 1 CL76 1 CL63 1 CL66 1 CL72 1 CL62 1 CL68 1 CL71 1 CL75 1 CL67 1 CL73 0_0201_5%
YL3
Test_Point_12MIL
0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

1U_0402_6.3V6-K

2
1 4
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 OSC1 GND2 @
2 3
1

GND1 OSC2
JTDO_R

1 1

ca
CL57 25MHZ_10PF_7V25000014 CL64
12P_0402_50V8-J 12P_0402_50V8-J
2 2
RL29 for DSAH debug.
1

RL65 Close to UL1 Pin 12, 42, 47, 48, 39 & 27. Close to UL1 Pin 3, 6, 9, 45, 13, 41. Close to UL1 Pin 29. Close to UL1 Pin 21.
@
33_0402_5%
2

JTDO
2

l
RL67
@
10K_0402_5%
1

+3VALW1_LAN +3VALW_LAN
RL64 1 @ 2 0_0603_5%

A A

eleTro-X Technical Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date GBE LAN SWITCH

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 32 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical
T1
SYS_MDI_3- 1 1:1
31 SYS_MDI_3- MX1+ T1/B 24 RJ45_TXD3N
TD1+ RJ45_TXD3N 34
D D
SYS_MDI_3+ 2
31 SYS_MDI_3+ MX1-
23 RJ45_TXD3P
TD1- RJ45_TXD3P 34
3 22
MCT1 T1/A TCT1

4 21
SYS_MDI_2- 5 MCT2 1:1 TCT2
31 SYS_MDI_2- MX2+ T1/B RJ45_TXD2N
20
TD2+ RJ45_TXD2N 34

SYS_MDI_2+ 6
31 SYS_MDI_2+ MX2- RJ45_TXD2P
19
TD2- RJ45_TXD2P 34

T1/A

SYS_MDI_1- 7 1:1
31 SYS_MDI_1- MX3+ T1/B
18 RJ45_TXD1N
TD3+ RJ45_TXD1N 34

Ele
SYS_MDI_1+ 8
31 SYS_MDI_1+ MX3-
17 RJ45_TXD1P
TD3- RJ45_TXD1P 34
9 16
MCT3 T1/A TCT3

10 15
SYS_MDI_0- 11 MCT4 1:1 TCT4
31 SYS_MDI_0- MX4+ T1/B
14 RJ45_TXD0N
TD4+ RJ45_TXD0N 34

tro
C
SYS_MDI_0+ 12 C
31 SYS_MDI_0+ MX4- 13 RJ45_TXD0P
TD4- RJ45_TXD0P 34

T1/A

BOTH_NA69R-LF

2 75_0805_5%

2 75_0805_5%

2 75_0805_5%

2 75_0805_5%
EMC@

THE WIDTH OF THESE TRACE SHOULD

-X
BE WIDER THAN 35MIL TO PREVENT
VOLTAGE DROP.
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
1U_0402_6.3V6-K

1
R664

R665

R666

R667
PATTERN MUST BE
SHORT AND WIDE.

Te
2 2 2 2 2 2 2

C303
EMC_NS@

EMC_NS@

2
1 1 1 1 1 1 1
SHOULD BE PLACED AS CLOSE 2
EMC@

EMC@

EMC@

EMC@

EMC@
C303

C626

C627

C533

C554

C558

C560
TO MAGNETICS AS POSSIBLE. R960 C562
1M_0805_5% 1500P_1808_2KV7-K
1

1
HIGH VOLTAGE

ch
10PF CAP
IS OPTIONAL

DL1/DL2 TABLE of Transformer (T1)

ESD REASON
B 1'S PN:SC300003M00 Vendor P/N LCFC P/N B

BOTHHAND NA69R-LF SP050008B00

ni
TAIMAG IH-189-A SP050007V0J

DL1
SYS_MDI_1- 1 10 SYS_MDI_1-
LINE1IN LINE1OUT
SYS_MDI_1+ 2 9 SYS_MDI_1+
LINE2IN LINE2OUT

ca
3 8
GND1 GND2
SYS_MDI_0- 4 7 SYS_MDI_0-
LINE3IN LINE3OUT
SYS_MDI_0+ 5 6 SYS_MDI_0+
LINE4IN LINE4OUT
11 13
GND3 GND5
12
GND4

l
AZ3133-08F.R7G_DFN3020P10E10
8111H@

DL2
SYS_MDI_2+ 1 10 SYS_MDI_2+
LINE1IN LINE1OUT
SYS_MDI_2- 2 9 SYS_MDI_2-
LINE2IN LINE2OUT
3 8
GND1 GND2
SYS_MDI_3+ 4 7 SYS_MDI_3+
LINE3IN LINE3OUT
A
SYS_MDI_3- 5 6 SYS_MDI_3- A
LINE4IN LINE4OUT
11 13
GND3 GND5
12
GND4
AZ3133-08F.R7G_DFN3020P10E10
8111H@

eleTro-X Technical
Place Close to T1 Security Classification LC Future Center Secret Data Title
EMC Issued Date 2015/11/02 Deciphered Date 2015/08/10 GBE MAGNETICS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 33 of 66
5 4 3 2 1
 5 4 3 2 1

+3VALW_LAN_SYS eleTro-X Technical

JLAN1 @
D 1 2 B1 D
R2089 330_0402_5% Green_LED+
RJ45_LINKUP_SYS# B2
31 RJ45_LINKUP_SYS# Green_LED-
RJ45_TXD0P 1
33 RJ45_TXD0P TX_DA+
RJ45_TXD0N 2
33 RJ45_TXD0N TX_DA-
RJ45_TXD1P 3
33 RJ45_TXD1P RX_DB+
RJ45_TXD2P 4
33 RJ45_TXD2P BI_DC+
RJ45_TXD2N 5
33 RJ45_TXD2N BI_DC-
RJ45_TXD1N 6
33 RJ45_TXD1N RX_DB-
RJ45_TXD3P 7 GND2
33 RJ45_TXD3P BI_DD+ GND2
RJ45_TXD3N 8 GND1
33 RJ45_TXD3N BI_DD- GND1

Ele
1 2 A1
R2088 220_0201_5% Yellow_LED+
RJ45_ACTIVITY_SYS# A2
31 RJ45_ACTIVITY_SYS# Yellow_LED-
SINGA_2RJ3089-118211F

EMC@ 2 2 EMC@ 2
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 1U_0402_6.3V6-K
C2173 C2174 C9854

tro
1 1 1
CD@
C C

-X
Te
D243 D244
RJ45_TXD3N 3 6 RJ45_TXD1N RJ45_TXD0N 3 6 RJ45_TXD2N
I/O2 I/O4 I/O2 I/O4

2 5 2 5
GND VDD GND VDD

ch
RJ45_TXD3P 1 4 RJ45_TXD1P RJ45_TXD0P 1 4 RJ45_TXD2P
I/O1 I/O3 I/O1 I/O3
EMC_NS@ EMC_NS@
AZC099-04S.R7G_SOT23-6 AZC099-04S.R7G_SOT23-6

B B

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

eleTro-X Technical Issued Date 2015/11/02 Deciphered Date 2015/08/10 RJ45 CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 34 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

+3VALW_WLAN

2 2
C9099 C9110
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

TYPE-A NGFF CARD FOR WLAN

Ele
+3VALW_WLAN
3.2H CONNECTOR +3VALW_WLAN

JWLAN1
1 2
USBP6+ R790 1 @ 20_0201_5% USBP6+_CONN 3 GND1 3.3VAUX1 4 +3VALW_WLAN
19 USBP6+ 1 20_0201_5% USBP6-_CONN 5 USB_D+ 3.3VAUX2 6
USBP6- R792 @
19 USBP6- 7 USB_D- KEY A LED1#
GND2 NC 8
9 NC NC 10
11 12
2

NC NC
13 NC NC 14
RL92 15
16 2 2 2
LED2#

tro
NC
10K_0402_5% 17 18 C1116 C1117 C1155
C 19 MLDIR_SENSE GND16 20 0.1U_0201_6.3V6-K 1U_0402_6.3V6-K 10U_0402_6.3V6-M C
21 DP_ML3N DP_AUXN 22 @
1

23 DP_ML3P DP_AUXP 24 1 1 1
25 GND3 GND13 26
27 DP_ML2N DP_ML1N 28
29 DP_ML2P DP_ML1P 30
31 GND4 GND14 32
33 DP_HPD DP_ML0N 34
GPP_WLAN_TXP 35 GND5 DP_ML0P 36
3 GPP_WLAN_TXP GPP_WLAN_TXN 37 PETP0 GND15 38
3 GPP_WLAN_TXN 39 PETN0 RESERVED1 40
GPP_WLAN_RXP 41 GND6 RESERVED2 42
3 GPP_WLAN_RXP PERP0 RESERVED3

-X
GPP_WLAN_RXN 43 44
3 GPP_WLAN_RXN 45 PERN0 COEX3 46 C
CLK_PCIE_WLAN 47 GND7 COEX2 48
8 CLK_PCIE_WLAN CLK_PCIE_WLAN# 49 REFCLKP0 COEX1 50 SUSCLK_32K
8 CLK_PCIE_WLAN# 51 REFCLKN0 SUSCLK 52 PLT_RST# SUSCLK_32K 8
WLAN_CLKREQ# 53 GND8 PERST0# 54 PCH_BT_OFF# PLT_RST# 7,19,29,31,32,36,37,51
R10456 2 1 1K_0402_5%
8 WLAN_CLKREQ# WLAN_WAKE# PCIE_WAKE#_R CLKREQ0# W_DISABLE2# PCH_WLAN_OFF# PCH_BT_OFF# 7
R11162 1 @ 20_0201_5% 55 56
44 WLAN_WAKE# 57 PEWAKE0# W_DISABLE1# 58 PCH_WLAN_OFF# 7
59 GND9 I2C_DATA 60
61 PETP1 I2C_CLK 62 R10458 1 2 100_0402_1%
PETN1 ALERT# EC_TX_R EC_RX 39,44
63 64 R10459 1 2 100_0402_1%

Te
GND10 RESERVED4 EC_TX 39,44
65 66
67 PERP1 PERST1# 68
69 PERN1 CLKREQ1# 70 +3VALW_WLAN
71 GND11 PEWAKE1# 72
73 REFCLKP1 3.3VAUX4 74
75 REFCLKN1 3.3VAUX5
GND12

1
76 77
PEG1 PEG2
3

R11006 2 2 2
D109 ARGOS_NASA0-S6705-TSH4 C2656 C2657 C2658

ch
RCLAMP0502BPTCT_SC75-3 @ 100K_0402_5% 0.01U_0201_6.3V7-K 0.1U_0201_6.3V6-K 4.7U_0402_6.3V6-M
EMC_NS@ @ @ @

2
1 1 1
1

PLACE NEAR J32

B B

ni
+3VALW_WLAN

RL86 1 @ 2 10K_0402_5% PCIE_WAKE#_R

ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/08/10 M.2 SOCKET 1 MODULE I/F
eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 35 of 66
5 4 3 2 1
 5 4 3 2 1

+3VALW
+3VS_W WAN +3VS_W WAN
+3VALW

1
R10955

eleTro-X Technical

2
+3VALW R10502 MSATA_DTCT1# 10K_0402_1%
2
1 2 2 2 2 2 1

2
1M_0201_5% C1118 C1119 C1156 C11203 C11204
C11202 0.1U_0201_6.3V6-K 1U_0402_6.3V6-K 10U_0402_6.3V6-M C9111 DEVICE_DETECT1# R10409 1 2 15K_0402_1%
33P_0402_50V8-J C9100 44 DEVICE_DETECT1# HDD_DETECT# 29

1
2
100U_1206_6.3V6-M @ 1 33PC_50VC_JC_NPOC_0402 18P_0402_50V8-J
@

1
R10501 D 2 @ 1 1 1 1 1 RF@ 2
RF@ @ MSATA_DTCT1#
2 Q284 R11007 1 2 33K_0402_1%
1M_0201_5% G LSK3541G1ET2L_VMT3

1
D S 39PC_50VC_JC_COGC_0201 R10411 1 2 51K_0402_5% WWAN_DTCT#

3
D WWAN_CFG2_SW 2 D
G Q283
LSK3541G1ET2L_VMT3
S

3
Vcc 3.3V
+3VALW 10K +/- 1%
R10408
+3VALW DEVICE_DETECT1# 1.9928V 1.6843V 1.7822V2.7754V 2.5448V 3.3V

2
R10500 WWAN_DTCT# HDD_DETECT# V V V X X X
MSATA_DTCT1# X V X X V X
2

1M_0201_5%
R10503
WWAN_DTCT# X X V V X X
1

1
D
1M_0201_5% 2 Q282
G LSK3541G1ET2L_VMT3
1

D S +3VALW

3
WWAN_CFG1_SW 2
G Q285
LSK3541G1ET2L_VMT3
L:WWAN
2
S H:SSD C218
3

0.1U_0201_6.3V6-K

Ele
TYPE-B NGFF CARD FOR WWAN +3VS_W WAN
@
1

5
7,19,29,31,32,35,37,51 PLT_RST# R41125 1 @ 2 0_0402_5% U310

VCC
R41124 1 @ 2 0_0402_5% 3 4 WWAN_RST#_R
7 WWAN_RST# B1 A

2
+3VS_W WAN 1
29 SSD_RST# B2
R1005 2
47K_0201_5% WWAN_CFG1_SW 6 C226
S 0.1U_0201_6.3V6-K
2 C228 2 @

GND
1
C227 @ 1
TP957 @
JWWAN1 0.1U_0201_6.3V6-K

0.1U_0402_25V6-K
tro

2
1 WWAN_CFG3_SW 1 2

2
3 CONFIG_3 3.3VAUX1 4 1 1 R41109 74LVC1G3157DCKRE4_SC70-6
GND1 3.3VAUX2 FULL_CARD_POWER_OFF @
C @ 5 6 100K_0402_5% C
USBP5+_CONN GND2 FULL_CARD_POWER_OFF# PCH_WWAN_OFF# FULL_CARD_POWER_OFF 7,8
USBP5+ R794 1 @ 20_0201_5% 7 8 @
19 USBP5+ USBP5-_CONN USB_D+ W_DISABLE#1 PCH_WWAN_OFF# 7
USBP5- R793 1 @ 20_0201_5% 9 10
19 USBP5-

1
11 USB_D- GPIO9/LED1#/DAS/DSS#
GND3 NC 12

2
13 NC NC 14
15 NC KEY-B NC 16 R41133
17 NC NC 18 100K_0402_5%
TP956 19 NC 20
1 WWAN_CFG0 21 GPIO_5 22 @ @

1
23 CONFIG_0 GPIO_6 24 JSIM1
25 GPIO_11 GPIO_7 26 C5

-X
@
27 DPR GPIO_10 28 GND1 DSW
GPP_WWAN_RXN1 29 GND4 GPIO_8 30 UIM_RESET C1 GND2 CSW
3 GPP_WWAN_RXN1 GPP_WWAN_RXP1 PERn1/USB3.0-RX-/SSIC-RxN UIM-RESET UIM_CLK VCC GND3
31 32 R1066 1 2 200_0201_1%
3 GPP_WWAN_RXP1 PERp1/USB3.0-RX+/SSIC-RxP UIM-CLK UIM_DATA
33 34 C6 GND1
GPP_WWAN_TXN1 35 GND5 UIM-DATA 36 UIM_PWR VPP GND4 GND2
3 GPP_WWAN_TXN1 GPP_WWAN_TXP1 PETn1/USB3.0-TX-/SSIC-TxN UIM-PWR PLT_RST# GND5
37 38 0_0402_5% 2 @ 1 R41126 GND3
3 GPP_WWAN_TXP1 PETp1/USB3.0-TX+/SSIC-TxP DEVSLP GND6
39 40 GND4
GPP_WWAN_RXN0 41 GND6 GPIO_0 42 R11352 1 @ 2 0_0402_5% WWAN_RST# C7 GND7 GND5
3 GPP_WWAN_RXN0 GPP_WWAN_RXP0 PERn0/SATA-B+ GPIO_1 I/O GND8
43 44 GND6
3 GPP_WWAN_RXP0 PERp0/SATA-B- GPIO_2 WWAN_RST#_R GND9
45 46 R11353 1 @ 2 0_0402_5% C3 GND7
GPP_WWAN_TXN0 47 GND7 GPIO_3 48 CLK GND10 GND8

Te
3 GPP_WWAN_TXN0 GPP_WWAN_TXP0 PETn0/SATA-A- GPIO_4 GND11
49 50 PE_RESET# R11354 1 2 0_0402_5% SSD_RST# C2
3 GPP_WWAN_TXP0 PETp0/SATA-A+ PERST# RST
51 52
CLK_PCIE_WWAN# GND8 CLKREQ# WWAN_WAKE# WWAN_CLKREQ# 8
53 54
8 CLK_PCIE_WWAN# CLK_PCIE_WWAN REFCLKN PEWake#
55 56 JAE_SF72S006VBD
8 CLK_PCIE_WWAN REFCLKP NC1
57 58
GND9 NC2

1
2
3
5
59 60 2

2
61 ANTCTRL0 COEX3 62 R41127 EMC@ C623
63 ANTCTRL1 COEX2 64 R41116 D21 4.7U_0402_6.3V6-M
100K_0402_5%
65 ANTCTRL2 COEX1 66 47K_0201_5% +3VS_W WAN FTZ6.8EGT148_SC-74A5

4
R2563 1 @ 2 0_0402_5% BB_RESET_JCONN 67 ANTCTRL3 SIM_DETECT 68 @ 1
8,9 BB_RESET

1
WWAN_CFG1_SW 69 RESET# SUSCLK 70

1
CONFIG_1 3.3VAUX3

ch
71 72
GND10 3.3VAUX4 @
73 74
WWAN_CFG2_SW 75 GND11 3.3VAUX5
CONFIG_2
76 77
PEG1 PEG2
ARGOS_NASB0-S6705-TSH4
@
B B
3

ni
+3VS +3VS_W WAN D52
EMC_NS@
RCLAMP0502BPTCT_SC75-3
1

R10124 1 2 0_0805_5% PLACE NEAR J22 TABLE: TABLE:

Module Configuration Decodes Module Configuration Decodes Module Type
and Port
CONFIG_0 CONFIG_3 CONFIG_2 CONFIG_1 State # CONFIG_0 CONFIG_3 CONFIG_2 CONFIG_1 Configuration
Main Host Interface

ca
(Pin 21) (Pin 1) (Pin 75) (Pin 69) (Pin 21) (Pin 1) (Pin 75) (Pin 69)
Fibcom 0 GND GND GND GND SSD - SATA N/A
L830-EB GND NC GND GND
1 GND GND GND NC SSD - PCIe N/A
Sierra 2 GND GND NC GND WWAN - PCIe 0
EM7565 GND NC NC GND
+1.8VS 3 GND GND NC NC WWAN - PCIe 1
2242 PCIe Detect 4 GND NC GND GND WWAN - USB 3.0 0
SSD GND GND GND NC -WWAN_SSD_DTCT
2

l
+3VALW R41115
5 GND NC GND NC WWAN - USB 3.0 1
+3VS 10K_0402_5%
@
6 GND NC NC GND WWAN - USB 3.0 2
7 GND NC NC NC WWAN - USB 3.0 3
1
2
2

R41114 BB_RESET_JCONN
8 NC GND GND GND WWAN - SSIC 0
R41113 10K_0402_5%
10K_0402_5% 2
C216
9 NC GND GND NC WWAN - SSIC 1
1

0.1U_0201_6.3V6-K +3VS_W WAN

D 10 NC GND NC GND WWAN - SSIC 2
1

5 Q10B
0.1u_0201_10V6K

@ G 1
NTJD5121NT1G @ 1 11 NC GND NC NC WWAN - SSIC 3
C8773

S @ 12 NC NC GND GND WWAN - PCIe 2

4
6

D
BB_RESET 2 Q10A 2
13 NC NC GND NC WWAN - PCIe 3
5

A G U58 A
NTJD5121NT1G
BB_RESET 1 14 NC NC NC GND RFU N/A
P

B
2

S 4 BB_RESET_JCONN
2
1

C217 R4109 PE_RESET# 2 Y

A 15 NC NC NC NC No Module Present N/A
G

0.1U_0201_6.3V6-K 100K_0402_5% Grug：

change from SB000013A00 to SB00000YS00
MC74VHC1G09DFT2G_SC70-5
3

1
@ @
1

R10765 1 2 0_0402_5%

eleTro-X Technical @
Security Classification
Issued Date 2015/11/02
LC Future Center Secret Data
Deciphered Date 2015/8/10
Title
M.2 SOCKET 2 MODULE I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 36 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS

eleTro-X Technical
2 2
C134 C135
10U_0603_6.3V6M 0.1U_0402_6.3V7-K
1 1 +3VS
D D

2
RC4080
10K_0402_5%

1
U188
@
EMC_NS@
11 30 SD_MMC_CD R11235 1 2 0_0402_5% SD_MMC_CD_CONN
3V3_IN SD_CD#
C136 2 1 1U_0402_6.3V6K 18 31
DV33_18 MS_INS#
DAV12 10 32 R112631 2 10K_0201_5%
AV12 WAKE# +3VS
+CRD_POWER +3VS 14
DV12S

SD_DATA1 SD_DATA1_R

Ele
2 2 15 R614 1 @ 2 0_0402_5%
C131 C132 SP1
12 16 SD_DATA0_MS_DATA1 R615 1 @ 2 0_0402_5% SD_DATA0_MS_DATA1_R
1 +CRD_POWER Card_3V3 SP2
C0616 4.7U_0402_6.3V6M 0.1U_0201_6.3V6K
1U_0402_10V6-K 1 1 17 SD_CLK_MS_DATA0 R610 1 @ 2 0_0402_5% SD_CLK_MS_DATA0_R
27 SP3
2 3V3aux 19 SD_CMD_MS_DATA2 R611 1 @ 2 0_0402_5% SD_CMD_MS_DATA2_R
SP4 1
C138
R113 1 2 6.19K_0201_1% 9 20 SD_MS_DATA3 R612 1 @ 2 0_0402_5% SD_MS_DATA3_R
RREF SP5 6P_0201_25V8-D
21 SD_DATA2_MS_CLK R613 1 @ 2 0_0402_5% SD_DATA2_MS_CLK_R 2

tro
SP6
GPP_CR_TXP1 3 29 SD_MMC_WPI R616 1 2 0_0402_5% SD_MMC_WPI_CONN
C 3 GPP_CR_TXP1 HSIP SP7 C
GPP_CR_TXN1 4 EMC_NS@
3 GPP_CR_TXN1 HSIN
GPP_CR_RXP1 C11169 1 2 0.1U_0201_6.3V6K GPP_CR_RXP1_C 7 20160621
3 GPP_CR_RXP1 HSOP
GPP_CR_RXN1 GPP_CR_RXN1_C Change RW10,RW11,RW12,RW13,
C139 1 2 0.1U_0201_6.3V6K 8 13
3 GPP_CR_RXN1 HSON NC1 RW14,RW15 to short pad for EMI
22
NC2

-X
CLK_PCIE_CR 5 23
8 CLK_PCIE_CR REFCLKP NC3
CLK_PCIE_CR# 6 24
8 CLK_PCIE_CR# REFCLKN NC4
25
NC5
PLT_RST# 1 26
7,19,29,31,32,35,36,51 PLT_RST# PERST# NC6

Te
CLKREQ_PCIE1_CR# 2
8 CLKREQ_PCIE1_CR# CLK_REQ#

R11262 1 2 10K_0201_5% 28 33
+3VS GPIO GND

C140 & C9511 Closed to pin14 C11170 Closed to pin10 RTS5232S-GR_QFN32_4X4

ch
DAV12

2 2 2
C140 C9511 C11170

4.7U_0402_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K

B 1 1 1 B

ni
ca
+CRD_POWER JSD1

+3VS +3VS 40 mils SD_DATA2_MS_CLK_R 1

SD_MS_DATA3_R 2 DAT2
SD_CMD_MS_DATA2_R 3 CD/DAT3
F64 4 CMD
2 1 5 VSS1
VDD
2

l
SD_CLK_MS_DATA0_R 6
R10311 R10312 1A_32V_ERBRD1R00X 7 CLK
100K_0201_5% SD_MMC_WPI 100K_0201_5% SD_MMC_CD SD_DATA0_MS_DATA1_R 8 VSS2
1 1 SD_DATA1_R DAT0
C11147 C11148 9
0.1U_0402_10V7-K 10U_0603_6.3V6-M DAT1
1

2 2 SD_MMC_WPI_CONN 10
SD_MMC_CD_CONN 11 W/P
12 C/D
13 GND1
GND2
6

Q265A Q265B
D1

D2

SD_MMC_WPI_CONN 2 SD_MMC_CD_CONN 5 T-SOL_156-2000302604_RV

A G1 G2 Close to JREAD1. @
A
S1

S2
1

NTJD5121NT1G_SC88-6 NTJD5121NT1G_SC88-6

Security Classification LC Future Center Secret Data Title

eleTro-X Technical Issued Date 2015/11/02 Deciphered Date 2015/8/10 MEDIA CARD CONTROLLER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 37 of 66
5 4 3 2 1
 5 4 3 2 1

TABLE +3VS
R10410
+1.8VALW
R11146
+5VS
R10416 Near Pin46 Near Pin41 R10414
+5VA_AUD
R10603
+1.8VA_AUD
1 2 1 2 1 2 1 2 1 2
Dock support
0.01_0603_LE_1% 0.01_0603_LE_1% 0.01_0603_LE_1% 0.01_0603_LE_1% 0.01_0603_LE_1%

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
SUPPORT NON-SUPPORT 1 1 1 1 1 1 1 1 1@ 1@ 1 1

C9667

C9668

C9669

C9670

C9671

C9672

C9673

C9674

C9675

C9676

C9677

C9678
2 2 2 2 2 2 2 2 2 2 2 2
eleTro-X Technical
R1235 NO ASM NO ASM

R1236 ASM NO ASM

AGND AGND

D R1237 ASM NO ASM D

R1238 ASM NO ASM

LOGIC

18

46

41

40

20
3
U206

PVDD2

PVDD1

AVDD1

CPVDD/AVDD2
DVDD-IO
DVDD
2 SPKR_MUTE#
PDB SPKR_MUTE# 44
14 HDA_BCLK_R R10461 1 @ 20_0201_5% HDA_BITCLK_AUDIO
HP_L_JACK HP_L_JACK_R BCLK HDA_BITCLK_AUDIO 7
R10600 1 2 47_0201_5% 27
39 HP_L_JACK HPOUT-L 15 HDA_SYNC_AUDIO
HP_R_JACK HP_R_JACK_R SYNC HDA_SYNC_AUDIO 7
R10601 1 2 47_0201_5% 26

Ele
39 HP_R_JACK HPOUT-R 47
MIC2_VREFOL 28 JD2
41 MIC2_VREFOL MIC2-VREFO-L HP_JD_SYS
48
MIC2_VREFOR 29 JD1 HP_JD_SYS 40
41 MIC2_VREFOR MIC2-VREFO-R
1
SPDIF-OUT/GPIO2/DMIC-DATA34/DMIC-CLK-IN
4 MIC_DATA
30 GPIO0/DMIC-DATA12 MIC_DATA 18
RING2
41 RING2 MIC2-L/RING2 5 MIC_CLK_R MIC_CLK
R10462 1 @ 20_0201_5%
31 GPIO1/DMIC-CLK MIC_CLK 18
SLEEVE
41 SLEEVE MIC2-R/SLEEVE 6
BEEP_MIX_ATT C2503 1 2 0.1U_0201_6.3V6-KBEEP_MIX_ATT_C 34 I2C-DATA

tro
43 BEEP_MIX_ATT PCBEEP 7
I2C-CLK
C +5VALW C
8
R10468 1 2 10K_0201_5% 33 NC1
5VSTB 9
35 NC2
LINE2-R 10
36 NC3
LINE2-L 11
NC4
12
NC5

-X
C9680 1 2 2.2U_0402_6.3V6-K 23 45 SP_OUTR+_AUDIO
CBP SPK-OUT-R+ SP_OUTR+_AUDIO 42
24 44 SP_OUTR-_AUDIO
CBN SPK-OUT-R- SP_OUTR-_AUDIO 42
43 SP_OUTL-_AUDIO
SPK-OUT-L- SP_OUTL-_AUDIO 42
42 SP_OUTL+_AUDIO
SPK-OUT-L+ SP_OUTL+_AUDIO 42
32
MIC2-CAP 13
DC DET/EAPD

Te
38
VREF
19 16 HDA_SDIN0_R R10602 1 2 33_0201_5% HDA_SDIN0
LDO3-CAP SDATA-IN HDA_SDIN0 7
21 17 HDA_SDOUT_AUDIO
LDO2-CAP SDATA-OUT HDA_SDOUT_AUDIO 7
39
LDO1-CAP 25
TABLE MIC HW ENABLE/DISABLE CPVEE

Thermal Pad

1000P_0201_25V7-K

1000P_0201_25V7-K

1000P_0201_25V7-K

1000P_0201_25V7-K
ch
AVSS1

AVSS2

10K_0201_5%
ENABLE DISABLE

1U_0402_6.3V6-K
2.2U_0402_10V6-K

47P_0402_25V8-J

47P_0402_25V8-J
ALC3287-CG_MQFN48_6X6

37

22

49
R961
10U_0402_6.3V6-M

ASM NO ASM
2.2U_0402_10V6-K

4.7U_0402_6.3V6-M

4.7U_0402_6.3V6-M

4.7U_0402_6.3V6-M
33P_0402_50V8-J

33P_0402_50V8-J

33P_0402_50V8-J

33P_0402_50V8-J

1
B B
1 1 1 1 1
1 1 1

ni
2 2 2 2 2

2
2 2 2

C122

C127

C117

C243
C9683
1 1 1 1 1 1 1 1 1

C9857

C9682

C9681

R10460
LOGIC
@
2 2 2 2 2 2 2 2 2 @ @
C543

C544
C9686

C9687

C9685

C9684

C9856

C9855

C9490

ca
@ @ @ @

AGND AGND
AGND AGND AGND

+5VS +5VA_AUD +1.8VS +1.8VA_AUD

R10419 R10203

l
1 2 1 2
10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
0.1U_0402_10V6-K

0.1U_0402_10V6-K

4.7U_0402_6.3V6-M
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.01_0603_LE_1% 0.01_0603_LE_1%
2 2 2 2 2 2 2 2
C30
C333

C318

C9141

C2574

C2573

C2572

C2571

@ @

1 1 1 1 1@ 1 1 1
@ @
C36 C2575
1 2 1 2

0.01U_0201_6.3V7-K 0.01U_0201_6.3V7-K
A A

AGND AGND

PLACE UNDER ALC3287

EMC_NS@
C143
1 2 R10082 1 @ 2 0_0402_5%

eleTro-X Technical
0.01U_0201_6.3V7-K Security Classification
Issued Date 2015/11/02
LC Future Center Secret Data
Deciphered Date 2015/8/10
Title
AUDIO ALC3286
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
AGND AGND DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Saturday, April 14, 2018 Sheet 38 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical
NEAR AUDIO CONN
EMC@
FL3
HP_L_JACK 1 2
38 HP_L_JACK
D MMZ1005Y152CT_2P D

EMC@
FL5
HP_R_JACK 1 2
38 HP_R_JACK
MMZ1005Y152CT_2P

2 EMC@ 2 EMC@

2
C13 C197
R742 R743 1000P_0201_25V7-K 1000P_0201_25V7-K
220_0201_5% 220_0201_5%
@ @ 1 1

1
AGND AGND

Ele
+3VS

WIDE AND SHORT PATTERN

1

R10463
10K_0201_5%

tro
2

C C
0.1U_0201_6.3V6-K

1
C9688

-X
JHP1 @
WIDE PATTERN

3 MIC_RING2
G/M MIC_SLEEVE MIC_RING2 41
1 MIC_SLEEVE 41
L
HP_L_JACK_CONN

Te
HP_R_JACK_CONN
5 WIDE PATTERN
5
6 HP_JACK_IN
6 HP_JACK_IN 40,44
2
R
EMC@

EMC@

EMC@

EMC@

7 4
MS M/G
D25

D24

D99

D94

ch
SINGA_2SJ3108-078111F
2

R139
100K_0201_5%
2

Pin 4 and 5 : Normal Open

1

B B
RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

AGND

ni
ca
EMC@ C162
Serial Debug
Near J19 side
1 2
HP_L_JACK_CONN @ R10619 2 1 0_0201_5%
EC_RX 35,44
1U_0402_6.3V6-K
HP_R_JACK_CONN @ R10620 2 1 0_0201_5%
EC_TX 35,44

l
AGND

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO CONNECTOR

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Saturday, April 14, 2018 Sheet 39 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS

eleTro-X Technical

2
R10465 1 @ 20_0201_5%
R10133
100K_0201_5%

1
AGND

R10132
D D
1 2
HP_JD_SYS 38
200K_0201_1%

R10464

1
D
HP_JACK_IN 1 2 2 Q50
39,44 HP_JACK_IN G LSK3541G1ET2L_VMT3
22K_0201_5% S

3
2
C9689
2.2U_0402_6.3V6-K
@
1

AGND AGND

Ele
tro
C C

-X
Te
ch
B B

ni
ca
A

eleTro-X Technical Security Classification

Issued Date
l 2015/11/02
LC Future Center Secret Data
Deciphered Date 2015/8/10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Title
BLANK
A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Saturday, April 14, 2018 Sheet 40 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

MIC2_VREFOR
D D
38 MIC2_VREFOR

2
C1416
1U_0402_6.3V6-K
1

2
R1219
2.2K_0402_5%
AGND

1
R10096 1 @ 20_0201_5%
MIC2_VREFOL
38 MIC2_VREFOL

Ele
2
C73 R460
1U_0402_6.3V6-K 2.2K_0402_5%
1

1
AGND
R10097 1 @ 20_0201_5%

tro
C C

-X
MIC_SLEEVE R125 1 @ 2 0_0402_5%
39 MIC_SLEEVE SLEEVE 38

2
2@
R142 C1417

Te
0_0201_5% 1000P_0402_50V7-K
@
1
1

R6 1 @ 20_0201_5%

AGND AGND

ch
AGND

EMC@ C91
B MIC_RING2 R126 1 @ 2 0_0402_5% B
39 MIC_RING2 RING2 38 1 2

.01U_0402_25V7-K
2

2@

ni
R144 C142
0_0201_5% 1000P_0201_25V7-K
@ AGND
1
1

ca
AGND AGND

NEAR EXT MIC CONN

l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO EXT MIC I/F
eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Saturday, April 14, 2018 Sheet 41 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

Ele
JSPK1
EMC@ L11 1 2 BLM18PG221SN1D_2P SP_OUTL+ 1
38 SP_OUTL+_AUDIO 1 2 SP_OUTL- 2 1
EMC@ L12 BLM18PG221SN1D_2P
38 SP_OUTL-_AUDIO 1 2 SP_OUTR- 3 2
EMC@ L13 BLM18PG221SN1D_2P
38 SP_OUTR-_AUDIO 1 2 SP_OUTR+ 4 3
EMC@ L14 BLM18PG221SN1D_2P
38 SP_OUTR+_AUDIO 4
5
6 GND1
GND2

HIGHS_WS33040-S0351-HF
@

tro
C C
2@ 2@ 2@ 2@
C166 C168 C169 C175
220P_0201_25V7-K 220P_0201_25V7-K 220P_0201_25V7-K 220P_0201_25V7-K
1 1 1 1

-X
PLACE, NEAR SPEAKER CONNECTOR

Te
ch
B B

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO SPEAKER

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Saturday, April 14, 2018 Sheet 42 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

Ele
PCH_BEEP R11188 1 2 4.7K_0402_5% C9568 1 2 0.1U_0402_10V7-K

BEEP# R11189 1 2 4.7K_0402_5% C9569 1 2 0.1U_0402_10V7-K BEEP_MIX_ATT_R

tro
R10303 1 2 @ 0_0402_5%
C C

PCH_BEEP D739 2 1 @ RB521CM-30T2R_VMN2M-2

7 PCH_BEEP
BEEP# D740 2 1 @ RB521CM-30T2R_VMN2M-2
44 BEEP#

2
R220
R10304 1 2 @ 0_0402_5% 0_0201_5%

1
@

-X
BEEP_MIX_ATT
BEEP_MIX_ATT 38

1
+3VALW R10467
@
10K_0201_1%

2
R11190

100K_0402_5%

Te
1
D

2
2 Q38
G
LSK3541G1ET2L_VMT3
S A. Vth = 1.5V (MAX)

3
1
D B. Id = ? mA (MAX)
EC_MUTE# 2 Q640
C. RDSon = 13 ohm(MAX)
44 EC_MUTE# D. Vth in schematic = 3.3V
G
LSK3541G1ET2L_VMT3
S A. Vth = 1.5V (MAX)

3
B. Id = ? mA (MAX)

ch
C. RDSon = 13 ohm(MAX)
D. Vth in schematic = 3.3V

B B

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO BEEP

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Saturday, April 14, 2018 Sheet 43 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS
+3VL

Close to EC +3VL Vcc 3.3V +/- 5%

All capacitors close to EC

2
CE41
RE496 2 1 +VCOREVCC2 RE300
RE300 100K +/- 1%
100K_0402_5%
APU_THERMTRIP#_R RE328 1 @ 2 0_0402_5%
APU_THERMTRIP# 6
0.1U_0402_10V7-K
+3VL

2 CE33 2 CE28 2 CE35 2 CE39 2 CE38 2 CE42

100K_0402_1%
Board ID

0
RE315
0K +/- 5%
eleTro-X
V
0 V
Technical
typ Phase
AD_BID
SDV

1
HDMI_DET_EC CE25 +3VS @ @ Board_ID
@

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K
2 1 +VCOREVCC1 18K +/- 5%
1 0.503 V FVT

1
+1.8VALW
DCOVER_SW RE84 1 @ 2 0_0402_5% DCOVER_SW_R 0.1U_0402_10V7-K 1 1 1 1 1 1 RE315
2 47K +/- 5% 1.055V SIT

1
D +3VL_AVCC 1/16W_87K_1%_0402
2 Q6445 RE83 1 @ 2 0_0402_5% 87K +/- 5%
47 HDMI_DET
G 2N7002WT1G_SC-70-3
+RTC_33
RE81 1 @ 2 0_0402_5% EC_DCOVER_SW
3 1.535V SVT
7,14 DCOVER_SW

2
RE82 2 @ 1 0_0402_5% 150K +/- 5%
D 3 S 4 1.98V D
@

E11

F10
L11
H2
K5

K6

B2
E5

E6
F5
300K +/- 5%

L6

L5
UE2 minimum trace width 12 mil 5 2.475V

VCORE1
VCORE2

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VCC

AVCC
VBAT

VFSPI
REAR_EJECT_LEVER# P1 R15 EC_WAKE#
14 REAR_EJECT_LEVER# WUI8/GPK0 WUI12/GPK4 USB_ON1 EC_WAKE# 7,31,32 +5VS
HOTKEY# R1 R14
47 HOTKEY# APU_THERMTRIP#_R R2 WUI9/GPK1 WUI13/GPK5 PWR_STATUS_LED# USB_ON1 30
GPIO N15
DCOVER_SW_R WUI10/GPK2 WUI14/GPK6 KBD_BL_DTCT# PWR_STATUS_LED# 46 CP_CLK
R3 P15 KBD_BL_DTCT# 47 RE307 1 @ 2 4.7K_0402_5%
+3VL +3VL_AVCC WUI11/GPK3 WUI15/GPK7 CP_DATA RE309 1 @ 2 4.7K_0402_5%
LE3 KBRST# J5 R6 LOGO_LED#
+3VL_AVCC 8 KBRST# KBRST#/GPB6 PWM0/GPA0 AOU_DET# LOGO_LED# 18
1 2 SERIRQ H1 P6
8,12 SERIRQ LPC_FRAME# ALERT#/SERIRQ/GPM6 PWM1/GPA1 EC_FAN_PWM AOU_DET# 30
J2 R7 +3VS
8,12
LPC_FRAME# LPC_AD0 ECS#/LFRAME#/GPM5 PWM2/GPA2 KBD_BL_PWM EC_FAN_PWM 49
BLM18PG121SN1D_2P L2 P7
8,12 LPC_AD0 LPC_AD1 EIO0/LAD0/GPM0 PWM3/GPA3 I2C_CLK_BT0 KBD_BL_PWM 47 EC_FAN_PWM
1 1 K1 PW M L7 RE321 1 @ 2 10K_0402_5%
8,12 LPC_AD1 LPC_AD2 EIO1/LAD1/GPM1 PWM4/SMCK5/GPA4 I2C_DATA_BT0 I2C_CLK_BT0 57 EC_FAN_SPEED
CE32 CE36 K2 K7 RE318 1 2 10K_0402_5%
8,12 LPC_AD2 LPC_AD3 EIO2/LAD2/GPM2 PWM5/SMDAT5/GPA5 I2C_DATA_BT0 57
8,12 LPC_AD3
J1 R8 BEEP# BEEP# 43
0.1U_0402_10V7-K 1000P_0402_50V7-K CLK_PCI_EC L1 EIO3/LAD3/GPM3 PWM6/SSCK/GPA6 L8 LEDPWR#
2 2 8,12 CLK_PCI_EC ESCK/LPCCLK/GPM4 LPC PWM7/RIG1#/GPA7 OTP_RESET LEDPWR# 18 +3VL
LE4 14 WRST# WRST# M2 D1 OTP_RESET 54
EC_AGND 1 2 EC_SMI# M1 WRST# GPC4 F2 SUSP#
7 EC_SMI# EC_RX ECSMI#/GPD4 GPC6 SUSP# 52,64
N1
35,39 EC_RX EC_TX SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7 KBD_ID EC_ON2
BLM18PG121SN1D_2P N2 H11 RE303 1 @ 2 47K_0201_5%
35,39 EC_TX APU_LPC_RST# SOUT0/LPCPD#/GPE6 ADC0/GPI0 M_TEMP KBD_ID 47
R5 H14
8,12 APU_LPC_RST# EC_SCI# ERST#/LPCRST#/GPD2 ADC1/SMINT0/GPI1 S_TEMP M_TEMP 57 AOU_DET#
8 EC_SCI#
P5 H15 S_TEMP 57 RE348 1 2 10K_0402_5%
G2 ECSCI#/GPD3 ADC2/SMINT1/GPI2 G10 Board_ID
ADC

Ele
7 BEEP_RESERVED GA20/GPB5 ADC3/SMINT2/GPI3 FAN_ID
G14

+3VL
IT8186VG-192/BX ADC4/SMINT3/GPI4
ADC5/DCD1#/GPI5
G11
G15
ADP_I
DEVICE_DETECT1#
FAN_ID 49
ADP_I 58
+3VALW
ADC6/DSR1#/GPI6 DEVICE_DETECT1# 36
47 KSI[0..7]
KSI[0..7]
KSI0 K15
VFBGA-144 ADC7/CTS1#/GPI7
F14 PSYS PSYS 58 AOU_DET# RE322 1 @ 2 10K_0402_5%
KSI1 K14 KSI0/STB# E15 IMVPPOK KBD_BL_DTCT# RE293 1 2 10K_0402_5%
KSI1/AFD# DAC2/TACH0B/SMINT6/GPJ2 IMVPPOK 61
1

KSI2 K10 D14 MAINPWON EC_WAKE# RE331 1 @ 2 10K_0402_5%

KSI2/INIT# DAC3/TACH1B/SMINT7/GPJ3 H_PROCHOT#_EC MAINPWON 54,60
RE296 KSI3 J15 DAC C14
KSI4 J10 KSI3/SLIN# DAC4/DCD0#/GPJ4 D15 ENBKL +3VL
KSI4 DAC5/RIG0#/GPJ5 ENBKL 6
100K_0402_5% KSI5 J11
KSI6 J14 KSI5 B12 AOU_EN I2C_CLK_BT0 RE308 1 2 10K_0402_5%
AOU_EN 30
2

KSO[0..15] KSI7 H10 KSI6 PS2CLK0/TMB0/CEC/GPF0 A12 PBTN_OUT# I2C_DATA_BT0 RE319 1 2 10K_0402_5%
47 KSO[0..15] KSI7 PS2DAT0/TMB1/GPF1 APU_SMB_CK1 PBTN_OUT# 7
WRST# KSO0 R9 B11
KSO0/PD0 SMCLK0/SMINT8/GPF2 APU_SMB_CK1 7,32,48

tro
KSO1 K8 A11 APU_SMB_DA1
KSO1/PD1 Int. K/B PS2 SMDAT0/SMINT9/GPF3 CP_CLK APU_SMB_DA1 7,32,48
C Grug:EC reset connect to a button KSO2 P10 E10 C
1
R10 KSO2/PD2 Matrix PS2CLK2/SMINT10/PD1CC1/GPF4 A10 CP_DATA CP_CLK 48 LID_SW# 1 2 EMC@ 0.1U_0402_10V7-K
CE30 KSO3 CE34
KSO3/PD3 PS2DAT2/SMINT11/PD1CC2/GPF5 CP_DATA 48
KSO4 L9
1U_0402_6.3V6-K KSO5 K9 KSO4/PD4 B10 PWR_GOOD
2 KSO5/PD5 GPH3/ID3/YM BATT_CHG_LED# PWR_GOOD 7
KSO6 P11 A9
KSO6/PD6 GPH4/ID4/YP BATT_CHG_LED# 46
KSO7 R11 USB Interface B9 BKOFF#
KSO7/PD7 GPH5/ID5/DM +0.9VS_PG BKOFF# 18
KSO8 P12 A8
KSO8/ACK# GPH6/ID6/DP +0.9VS_PG 52
KSO9 L10
KSO10 P13 KSO9/BUSY B8 EC_SPI_CS1# +3VALW
KSO10/PE FSCE#/GPG3 EC_SPI_SI EC_SPI_CS1# 8
KSO11 P14 A7 EC_SPI_SI 8
+3VALW KSO12 N14 KSO11/ERR# FMOSI/GPG4 B7 EC_SPI_SO
KSO12/SLCT SPI Flash ROM FMISO/GPG5 EC_SPI_CLK EC_SPI_SO 8 APU_SMB_CK1
KSO13 M15 A6 RE310 2 @ 1 10K_0402_5%
KSO13 FSCK/GPG7 EC_SPI_CLK 8

-X
RE313 1 2 10K_0402_5% HOTKEY# KSO14 M14 APU_SMB_DA1 RE314 2 @ 1 10K_0402_5%
KSO15 L15 KSO14 KBD_ID RE329 2 1 10K_0402_5%
M1_DRV L14 KSO15 B5 ACPRN
57 M1_DRV M2_DRV# KSO16/SMOSI/GPC3 GPB0 LID_SW#
K11 UART B4
+3VL 57 M2_DRV# KSO17/SMISO/GPC5 GPB1 LID_SW# 18 EC_ON2 RE335 2 @ 1 10K_0402_5%

RE298 1 2 10K_0402_5% I2C_CLK_BT1 RE326 2 @ 1 0_0402_5% PWRSWITCH#_R A5 B14 +0.9VALW_PWRGD KBD_ID RE330 1 @ 2 10K_0402_5%
I2C_DATA_BT1 18,25 PWRSWITCH# PWRSW/GPB3 EGAD/GPE1 EC_ON +0.9VALW_PWRGD 63
RE301 1 2 10K_0402_5% B13 EC_ON 60,63,64,65
EC_SMB_CK1 A4 EGCS#/GPE2 C15 AOU_CTL1 APUPWR_EN RE347 1 @ 2 100K_0402_5%
58 EC_SMB_CK1 EC_SMB_DA1 SMCLK1/GPC1 EGCLK/GPE3 AOU_CTL1 30
A3
58 EC_SMB_DA1 SMDAT1/GPC2 PM_SLP_S5#
C2 SM Bus E14

Te
+3VL 24,27 EC_I2C2_SCL SMCLK2/PECI/GPF6 SMINT5/GPJ1 EC_MUTE# PM_SLP_S5# 7,12
For internal battery. D2 F8 D4034 1 2 RB751VM-40TE-17_UMD2M2
24,27 EC_I2C2_SDA EC_SMB_CK3 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 PAD_DISABLE 1 2 SPKR_MUTE# 38
6,20,45,50 EC_SMB_CK3
F9 F7 PAD_DISABLE 48
RE294 1 2 10K_0402_5% PWRSWITCH#_R EC_SMB_DA3 E8 CRX1/SIN1/SMCLK3/PD2CC1/GPH1/ID1 SSCE1#/GPG0 E7 APUPWR_EN Grug: APU POWER EN DC
6,20,45,50 EC_SMB_DA3 CTX1/SOUT1/SMDAT3/PD2CC2/GPH2/ID2 DSR0#/GPG6 APUPWR_EN 61
B6 SYSON Grug: DDR POWER EN DC 1.2V 2.5V IMVPPOK CE46 2 1 4700P_0402_25V7-K
GPG1 3V_LAN_EN# SYSON 27,64
For APU, GS, Thermal Sensor E2 3V_LAN_EN# 53
Grug: DC control AC and DC
EC_RSMRST# CRX0/GPC0 E1 GSENSE_INT
CTX0/TMA0/GPB2 PM_SLP_S3# GSENSE_INT 50
P2
RI1#/GPD0 LAN_WAKE# PM_SLP_S3# 7
RE343 2 @ 1 0_0402_5%
F1 GPIO P4
LAN_WAKE# 31,32 Please don't place any PU Resistor on GPG[0, 3~7]
60 EC_ON_5V GPE4 RI2#/GPD1
1

F15 INT#_TYPEC
TACH2/SMINT4/GPJ0 AOU_CTL3 INT#_TYPEC 24 (Reserve hardware strapping)
RE292 13 EC_RTCRST#_ON 2 RE342 1 0_0402_5% R13 +3VALW
TACH1A/TMA1/GPD7 EC_FAN_SPEED AOU_CTL3 30
R12

ch
@ @ @ EC_FAN_SPEED 49
100K_0402_5% @ 2 RE338 1 0_0402_5% P8 TACH0A/GPD6 P3 I2C_CLK_BT1
HDMI_DET_EC 27 USBA_RE_EN GINT/CTS0#/GPD5 L80HLAT/BAO/SMCLK4/GPE0 I2C_DATA_BT1 I2C_CLK_BT1 57
2 RE497 1 0_0402_5% P9 GPIO R4
48 LID_CLOSE_EC# I2C_DATA_BT1 57
2

EC_RSMRST# E9 RTS1#/GPE5 L80LLAT/SMDAT4/GPE7 @ 2 RE341 1 0_0402_5% 3V_WLAN_EN# RE333 2 @ 1 10K_0402_5%

7 EC_RSMRST# CLKRUN#/GPH0/ID0 WLAN_WAKE# 35
A13 @2 RE340 1 0_0402_5% 3V_LAN_EN# RE332 2 @ 1 10K_0402_5%
B ADC13/GPL0 EC_ON2 63,65 B
A14 HP_JACK_IN 39,40
AC_PRESENT G1 ADC14/GPL1 A15 S1_DRV LAN_WAKE# RE346 2 @ 1 10K_0402_5%
7 AC_PRESENT CK32K/GPJ6 CLOCK ADC15/GPL2 S2_DRV# S1_DRV 57
B15
+3VALW ADC16/GPL3 M_TRCL S2_DRV# 57
B3 A2 M_TRCL 59
NC GPL4 A1 S_TRCL
GPL5 TP4_RESET S_TRCL 59
RP7 B1

ni
GPL6 3V_WLAN_EN# TP4_RESET 47,48
1 8 KSO1 C1
GPL7 3V_WLAN_EN# 53
2 7

AVSS
KSO2
VSS1

VSS2
VSS3
VSS4
VSS5
3 6 FAN_ID VSS6 +3VL +3VL +3VL
4 5
+5VALW IT8186VG-192-BX_VFBGA144
H5
H6
F6

G5
G6
J6

F11

2
10K_0804_8P4R_5%
RE304 RE311 RE345
RE337 1 2 10K_0402_5% USB_ON1 * For Mirror Code
EC_AGND
"H" --> Enable 100K_0402_5% 47K_0201_5% 47K_0201_5%

ca
"L" --> Disable (Default)

1
EC_MUTE# EC_ON EC_ON_5V
43 EC_MUTE#
AC IN

1
+3VL RE324 1 @ 2 0_0402_5%
58,61 VR_HOT# APU_PROCHOT# 6

2
RE317
ACPRN RE25 1 2 100K_0402_5% @ RE291 RE344

2
+3VALW RE26 1 @ 2 0_0402_5% H_PROCHOT#_EC RE325 1 @ 2 0_0402_5% 100K_0402_5% @ @
ACIN 58 1
10K_0402_5% 10K_0402_5%

2
DE1 22 11 @ RB751VM-40TE-17_UMD2M2 RE323 CE43

1
+3VL RE290 1 @ 2 2.2K_0201_5% EC_I2C2_SCL 100_0402_5% 47P_0201_25V8-J

l
RE299 1 @ 2 2.2K_0201_5% EC_I2C2_SDA @ 2 EMC_NS@
SYSON, SUSP#

1 1
RE79 1 2 10K_0402_5% EC_SMB_CK1 CE14 1 2 100P_0402_50V8-J
RE80 1 2 10K_0402_5% EC_SMB_DA1 D
H_PROCHOT#_EC 2
G
QE3 SUSP# RE306 1 2 1K_0402_5%
For ESD S

3
@ 2N7002WT1G_SC-70-3
CE27 1 2 220P_0402_50V7-K APU_LPC_RST# @

For EMI SYSON RE302 1 2 100K_0402_5%

@ RE305 +3VALW
CE26 1 2 10P_0402_50V8-J 1 @ 2 CLK_PCI_EC CE29 2 1 @ 0.1U_0402_10V7-K
A A
2

10_0402_5%
EC_RSMRST#
For EMC
RE336
CE31 2 1 100P_0402_50V8-J M_TEMP
10K_0402_5%
@
1

D
@
1

2
CE40 2 1 100P_0402_50V8-J S_TEMP G
2 QE5 S
3
1

D
@ 2N7002WT1G_SC-70-3 A. Vth = 1.5V (MAX)
5M_3M_PWRG 2 CE45 @ B. Id = ? mA (MAX)
60 5M_3M_PWRG C. RDSon = 13 ohm(MAX)
G 0.1U_0201_16V6-K Title
CE44 2 1 100P_0402_50V8-J APU_THERMTRIP# QE4 S 1 D. Vth in schematic = 3.3V Security Classification LC Future Center Secret Data
3

@
2N7002WT1G_SC-70-3 MEC1653(1/3)
Issued Date 2015/11/02 Deciphered Date 2015/8/10
eleTro-X Technical @ @
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 44 of 66
5 4 3 2 1
 5 4 3 2 1

Thermal Sensor
placed nearby SO-DIMM
eleTro-X Technical
THU1
+3VS

R11005 1 @ 2 0_0402_5% 1 10 R11016 1 @ 2 0_0402_5%

EC_SMB_CK3 6,20,44,50
D VCC SCL D
REMOTE1+ 2 9 R11015 1 @ 2 0_0402_5%
DP1 SDA EC_SMB_DA3 6,20,44,50
1
C126 REMOTE1- 3 8
DN1 ALERT#
0.1U_0402_10V6-K REMOTE2+ 4 7 F75303M_THERM# R202 1 @ 2 10K_0402_5%
2 DP2 THERM# +3VS
REMOTE2- 5 6
DN2 GND

F75303M_MSOP10

Address 1001_101xb
Internal pull up 1.2K to 1.5V

Ele
R for init i al t her mal s hut do wn t e mp

C C

tro
Close to THU1 Close to FIN
REMOTE1+ REMOTE2+ REMOTE1+

1 1 1

-X
1
C10057 C128 C129 C
@ 2 Q13
2200P_0402_50V7-K 2200P_0402_50V7-K 100P_0402_50V8-J B S TR TTC4116FU NPN SC-70-3
2 2 2 E SB00001LC00

3
REMOTE1- REMOTE2- REMOTE1-

Te
KevinH: Manaul update PN to MMBT3904TT1G

B REMOTE2+/-: B

Trace width/space:10/10 mil

ch
Trace length:<8"

Close CHARGER

ni
REMOTE2+

1
1

C130 C

ca
@ 2 Q14
100P_0402_50V8-J B S TR TTC4116FU NPN SC-70-3
2 E SB00001LC00
3

REMOTE2-

l
A
KevinH: Manaul update PN to MMBT3904TT1G A

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date USB PD CONNTROLLER (2/2)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 45 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

eleTro-X Technical

D D

Ele
A1 Pin : ORANGE
A2 Pin : WHITE

C C
LED1
+5VALW BATT_CHG_LED# R11086 1 2 68_0402_5% 1 + - 4
44 BATT_CHG_LED#

tro
ORG

R11087 1 2 1/16W_680_5%_0402 2 + - 3
WHI
19-223-S2T1D-C01-2T-WSN_ORG_WHI

2 2
C10126 C10127
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K

-X
@ @
1 1

Te

1
D
PWR_STATUS_LED# 2 Q6245
44 PWR_STATUS_LED#
G 2N7002WT1G_SC-70-3
S

3
2
B B
R41134

ch
100K_0402_5%

1
ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date USB PD CONNTROLLER (2/2)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 46 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

KB_LED_FNLOCK# KB_LED_MUTE# KB_LED_MICMUTE# KB_LED_CAPSLOCK# HOTKEY#

+3VALW +3VALW

2
C568
0.1U_0402_25V6-K
2
C10122
0.1U_0402_25V6-K
2
C10123
0.1U_0402_25V6-K
2
C10124
0.1U_0402_25V6-K
2
C10125
0.1U_0402_25V6-K
eleTro-X Technical

2
15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%
EMC@ EMC@ EMC@ EMC@ EMC@
F25 1 1 1 1 1
0.5A_32V_ERBRD0R50X
D D

1
2

2
1
C2582
0.1U_0201_6.3V6-K

1
2 VCC_TP VCC_TP +3VS +5VS +5VS

R8985

R8986

R8987

R8988

R8989

R8990

R8991

R8992
@ @ @ @ @ @ @ @ JKBL1 @

36
44 KBD_ID TP4MIDDLE 35 36
TP4RIGHT 34 35
TP4LEFT 33 34
32 33 @
KB_LED_CAPSLOCK# R2450 1 2 1/20W_100_1%_0201 31 32 R293 R294 R324 @ C9145 C296
31

2
30 F42 2 F13 2 F23
30

2
HOTKEY# 29
44 HOTKEY# KB_LED_MICMUTE# 1 2 1/20W_100_1%_0201 28 29
R944
KB_LED_MUTE# R41 1 2 1/20W_100_1%_0201 27 28

1A_32V_ERBRD1R00X

1A_32V_ERBRD1R00X

1A_32V_ERBRD1R00X
0.01U_0201_6.3V7-K

0.01U_0201_6.3V7-K
KB_LED_FNLOCK# 1 2 1/20W_100_1%_0201 26 27 1 1

10K_0201_5%
4.7K_0201_5%

4.7K_0201_5%
R103
25 26

Ele

1
KSO11 24 25
44 KSO[15:0] 23 24
KSO8
KSO10 22 23
KSO12 21 22
C KSO9 20 21 C
KSO13 19 20
KSO15 18 19 VCC_TP JTP1
KSO5 17 18 12 14
KSO7 16 17 KBD_BL_DTCT# 11 12 GND2 13
KSO6 15 16 44 KBD_BL_DTCT# KBD_BL_PWM 10 11 GND1
14 15 44 KBD_BL_PWM 9 10
KSO3
44 KSI[7:0] 13 14 1 20_0201_5% 8 9
KSO1 TP4CLK R510 @
12 13 48 TP4CLK 7 8
KSI5
12 7

tro
KSO2 11 TP4LEFT 6
KSO4 10 11 TP4RIGHT 5 6
KSI0 9 10 TP4MIDDLE 4 5
KSI2 8 9 TP4_RESET 3 4
7 8 44,48 TP4_RESET 1 20_0201_5% 2 3
KSO0 TP4DATA R511 @
6 7 48 TP4DATA 1 2
KSI1
KSI4 5 6 1
KSO14 4 5 HIGHS_FC1AF121-1151H
KSI6 3 4 @
KSI7 2 3 38
KSI3 1 2 GND2 37
1 GND1
KBD_BL_DTCT# 1 2 2
TP4CLK TP4DATA C8308 C8285 C8286

-X
HIGHS_FC5AF361-1151H 220P_0201_25V7-K 22U_0603_6.3V6-M 22U_0603_6.3V6-M
2 1 1
2 2 2
+3VALW C565 C566 C567
220P_0201_25V7-K 10P_0201_25V8-J 10P_0201_25V8-J
EMC@ EMC@ EMC@
1 1 1
1

R11203
B 10K_0201_5% B

Te
2

+3VALW
R11221 1 @ 2 0_0402_5% KB_LED_CAPSLOCK#
+3VALW

1
R11226
6

1
D
LED_CAPSLOCK# 2 10K_0201_5% R11233
7 LED_CAPSLOCK#
G

2
ch
S 10K_0201_5%
1

NTJD5121NT1G R11225 1 @ 2 0_0402_5% KB_LED_MUTE#

2
1

1 KB_LED_FNLOCK#
R11202 C116 Q641A R11232 1 @ 2 0_0402_5%
@
100K_0402_5% 100P_0402_50V8J +3VALW

6
2 D
2

2
7 LED_MUTE#

3
G D
1

S 7 LED_FNLOCK#
5

1
R11205 NTJD5121NT1G G

1
S

ni
1

4
10K_0201_5% R11224 C11155 Q642A NTJD5121NT1G

1
@ 1
2

100K_0402_5% 100P_0402_50V8J R11231 C11160 Q642B

R11223 1 @ 2 0_0402_5% KB_LED_MICMUTE# 2 @
2 100K_0402_5% 100P_0402_50V8J
2

2
3

ca
A 5 A
7 LED_MICMUTE#
G
S
4

NTJD5121NT1G
1

1
R11204 C11154 Q641B
@
100K_0402_5% 100P_0402_50V8J Title
2 Security Classification LC Future Center Secret Data
2

Issued Date 2015/11/02 Deciphered Date 2015/8/10 KEYBOARD/TRACK POINT

l
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 47 of 66
5 4 3 2 1

eleTro-X Technical
C
 5 4 3 2 1

+3VS +3VS

+3VS +3VS

2
R11209
100K_0402_5%
R11330
100K_0402_5% eleTro-X Technical

2
F15

1
@

0.5A_32V_ERBRD0R50X
LID_CLOSE_EC# TP4_RESET_CP R24 R25

1
2

2
D R11210 R11331 D

4.7K_0201_5%

4.7K_0201_5%
100K_0402_5% 100K_0402_5%

1
1

1
@ @

JCP1@
12 14
APU_SCL1 R11198 1 @ 2 0_0402_5% APU_SCL1_TP 11 12 GND2 13
10 11 GND1
TP4DATA 9 10
47 TP4DATA 8 9
TP4CLK
47 TP4CLK APU_SDA1 APU_SDA1_TP 8
R11197 1 @ 2 0_0402_5% 7
+3VS_PAD 6 7

Ele
5 6
44 LID_CLOSE_EC# 4 5
44 CP_CLK CP_DATA 3 4
44 CP_DATA TP4_RESET TP4_RESET_CP 3
R11211 1 @ 2 0_0402_5% 2
44,47 TP4_RESET PAD_DISABLE 1 2
44 PAD_DISABLE 1
HIGHS_FC5AF121-2131H

tro
C C

+3VS
1

R11163

Q268A 2.2K_0201_5%
NTJD5121NT1G_SC88-6
2

-X
APU_SMB_CK1 6 1 APU_SCL1
7,32,44 APU_SMB_CK1 D1 S1 A. Vth = 2.5V (MAX)
B. Id = 295 mA (MAX)
G1

C. RDSon = 2.5 ohm(MAX)

D. Vth in schematic = 0 - 3.3V
2

+3VS
+3VS

Te
1

R11164
5

2.2K_0201_5%
G2

APU_SMB_DA1 3 4 APU_SDA1
7,32,44 APU_SMB_DA1 D2 S2

Q268B

ch
NTJD5121NT1G_SC88-6
A. Vth = 2.5V (MAX)
B. Id = 295 mA (MAX) +3VS
C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 0 - 3.3V +5VS

B B

2
F8

0.5A_32V_ERBRD0R50X
ni
2

1
C2542 2
0.1U_0201_6.3V6-K F43
1A_32V_ERBRD1R00X
1 JFPR1
FUSEVCC3FP 1
USBP8- R799 1 @ 20_0201_5% USBP8-_CONN 2 1

PESD5V0H1BSF_SOD962-2
1

19 USBP8- 1 20_0201_5% USBP8+_CONN 3 2

JSC1 USBP8+ R800 @

PESD5V0H1BSF_SOD962-2
1 19 USBP8+ 4 3

ca
2 1 5 4
3 2 6 5
7 SC_DTCT# 3 6

1
APU_SCL1_TP APU_SDA1_TP USBP2+ 4 7
19 USBP2+ 4 7

1
USBP2- 5 8

1
19 USBP2- 6 5 8

1
6
1

9
D82 D81 7 10 GND1
1

EMC@ EMC@ 8 GND1 GND2

GND2 ELCO_04-6811-608-000-846+
HIGHS_FC5AF061-2131H @
SC_DTCT#

EMC@
D292
l
@

EMC@
D291
2

2
2

C208

2
UCLAMP3301H.TCT_SOD523-2 UCLAMP3301H.TCT_SOD523-2 2 2.2U_0402_6.3V6-K
2

C569
0.1U_0402_25V6-K 1
EMC@
1

CP_CLK CP_DATA TP4CLK TP4DATA

D83
1

D84 D85 D86

PESD5V0H1BSF_SOD962-2

A A
1

1
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
1

PLACE NEAR J48

2

2
2

Security Classification LC Future Center Secret Data Title

EMC@

Issued Date 2015/11/02 Deciphered Date 2015/8/10 TOUCH PAD/NFC/FPR

EMC@

EMC@

EMC@

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 48 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

+5VS

FAN CURRENT
IS 0.5A MAX

FUSE 2.0A

2
F4
2A_32V_ERBRD2R00X

Ele
1
JFAN1
+5VS_F4 1
EC_FAN_PWM 2 1
44 EC_FAN_PWM 3 2
4 3
5 4
5

tro
C 6 C
7 GND1
GND2
HIGHS_WS33050-S0351-HF
@

FAN_ID
FAN_ID 44

-X
EC_FAN_SPEED
EC_FAN_SPEED 44

FAN_ID

Te
2
C570
0.1U_0402_25V6-K
EMC@
1

ch
B B

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 FAN CONNECTOR

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 49 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

Ele
TABLE

P/N ADDR_SEL Address

H 32h (W) & 33h (R)

BMA255
L 30h (W) & 31h (R)

tro
C C
H 3Eh (W) & 3Fh (R)
KX022-1020
L 3Ch (W) & 3Dh (R)
+3VS

+3VS

R2421 1 2 10K_0402_5% ADDR_SEL @ R2420 1 2 10K_0201_5% 2 2

-X
C2550 C2551
+3VS 0.1U_0402_10V6-K 10U_0402_6.3V6-M
1 1

2
R11208
10K_0201_5%

1
@

Te
U148 @
ADDR_SEL 1 12 R11218 1 @ 2 0_0402_5%
SDO SCL EC_SMB_CK3 6,20,44,45
6,20,44,45 EC_SMB_DA3 R11217 1 @ 2 0_0402_5% 2 11
3 SDA PS 10
4 VDDIO CSB 9
GSENSE_INT 5 NC GND 8
44 GSENSE_INT 1 Test_Point_40MIL 6 INT1 GNDIO 7
TP151
@ INT2 VDD
BMA255_LGA12_2X2

ch
B TABLE of G-Sersor (U148) B

Vendor P/N LCFC P/N

BOSCH BMA255 SA00005YJ00
Kionix KX022-1020 SA000081E00

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 APS G-SENSOR

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 50 of 66
5 4 3 2 1
 5 4 3 2 1

+1.8VALW +1.8VS +1.8V_TPM

R11156 1 @ 2 0_0402_5%

R11155 1 @ 2 0_0402_5%
eleTro-X Technical

D D

+3VALW

1
R810
0_0603_5%
+1.8V_TPM
place close to

2
device VDD/GND pins
@

1 1 1 1 1
C10052 C808 C809 C810 C811
@ TPM@ TPM@ TPM@ @
1U_0201_6.3V6-K 0.1U_0201_10V6-K 0.1U_0201_10V6-K 1U_0201_6.3V6-K 10U_0603_6.3V6-M
2 2 2 2 2

22
Ele
UTPM1

1
VPS

NiC2

NiC1
R287 2 TPM@ 1 10K_0402_5% 18
+1.8V_TPM SPI_PIRQ TPM_GP2
3 R288 2 TPM@ 1 10K_0402_5%
NiC6 +1.8VS
4
PCH_SPI_D0 R10318 1 @ 20_0201_5% SPI_SI_R 21 NiC7 5
8 PCH_SPI_D0 PCH_SPI_D1 SPI_SO_R MOSI NiC8
R292 1 @ 20_0201_5% 24 10
8 PCH_SPI_D1 MISO NiC9 11
NiC10 12
NiC11 13
SPI_CS_R# 20 NiC12 14
SPI_CS NiC13 +1.8V_TPM
15
NiC14

tro
PCH_SPI_CLK R10139 1 TPM@ 2 0_0402_5% SPI_CLK_R 19 16
8,12 PCH_SPI_CLK SPI_CLK NiC15
C 25 C
TPM_PLT_RST# 17 NiC16 26
+1.8V_TPM SPI_RST NiC17 27
6 NiC18 28
GPIO NiC19 31
NiC20

1
7
R295 PP

1
TPM@
10K_0402_5% 29 R291
NiC21 30 @

2
D264 NiC22

GND1

GND2
10K_0402_5%

NiC3

NiC4

NiC5
1 2 TPM_PLT_RST#
7,19,29,31,32,35,36,37 PLT_RST#

2
-X
TPM@

23

32

33
RB751V-40_SOD323-2 ST33HTPH2E32AHB4_VQFN32_5X5
SCS00008K00

Te
1 2 SPI_CS_R#
8 SPI_CS#_TPM
D750
@
CUS357

R10317 1 @ 20_0201_5% NOTE:

Check timing sequence in SDV phase.

ch
5 ms < t
NOTE:
B 1) It is recommended to connect the TPM to the system's B
standby voltage to improve performance.
2) SPI_RST# must be asserted for at least 5 msec after
0 < t VSB power-up.
VSB 3) VSB may come up anytime before VDD power-up,
but not after VDD power-up.
4) SPI_RST# may be asserted together with VDD power

ni
negation, but should not at any point exceed 0.5V
VDD above the VDD power level.
1 ms < t

SPI_RST#

ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/02 Deciphered Date 2015/8/10 DISCRETE TPM 2.0

eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 51 of 66
5 4 3 2 1
 5 4 3 2 1

+3VALW +3VS +5VALW +5VS +3VALW +5VALW +5VALW

C11161 C11162
1 2 1 2
eleTro-X Technical
+5VALW +5VALW +5VALW
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K

KevinH： Add for LPC

1
C11163 C11164 C11165
0.047U_0402_25V6 0.047U_0402_25V6 0.047U_0402_25V6

2
PQ623
D FDMA8878_MICROFET-2X2-6-8 PQ28 D
FDMA8878_MICROFET-2X2-6-8

4
B+ +5VALW

4
Check

1
270_0402_5%
1

1
100_0402_5%
R955

2
PR891
R208

PR889
300K_0402_1% @ 1K_0402_5%

2
2

2
SUSP 9V-->5.1V
20 SUSP

1
13V-->7.4V
1

1
1

3
2

2
@ PC36 @ PC37 R11008
0.1U_0402_25V7K 0.1U_0402_25V7K 402K_0402_1%

2
2

2
PD23

1
D
PR888 RB521CM_30 PD24
100_0201_5% PR890 RB521CM_30 44,64 SUSP#
2
1

100_0201_5% G Q16

Ele

1
S 2N7002WT1G_SC-70-3
1

3
B+

1
3V_5VS_ON R11122
0_0402_5% 2 @ 1 R11124
2 1 3V_5VS_ON 0_0402_5% 2 @ 1 R11121

150K_0402_5%

1
D
2

PC39 SUSP 2

1
0.1U_0402_25V7K G PC38
Q633 S 0.047U_0402_25V6
1

3
2N7002WT1G_SC-70-3

2
tro
C C

-X
SB000013Q00，
SB00001B300 AON7400 +1.8VALW to +1.8VS 2A request
+0.9VALW_VDDP to +VDDP 10A request
B+ 9V--13.6V Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V
Rds(on) >= 7.5mohm
+1.8VALW +1.8VS

Te
+/- 1.5% Q28
Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V AON6414AL_DFN8-5
Rds(on) >= 7.5mohm
+0.9VALW 1 1
+0.9VS

1
+/- 1.5% Q25 C10061
1
5
2
3 C314 C10063
TPCA8057-H 10U_0603_6.3V6-M 10U_0603_6.3V6-M 1U_0402_6.3V6-K

2
1 @ 2
2 1 1
1 2 1 C10062

4
1

C305 5 3 @ C312 @

ch
10U_0603_6.3V6-M C222 C10060 0.1U_0201_6.3V6-K 0.01U_0201_25V6-K
@ 10U_0603_6.3V6-M 1U_0402_6.3V6-K 2 2
1 B+
2

2 2
1
4

@ C306 C10058
0.1U_0201_6.3V6-K R318 R320
@
2 0.01U_0201_25V6-K 1.8VS_GATE_R 1 2 1.8VS_GATE 1 2
B 2 1.8VS_GATE B

0_0402_5% 150K_0402_5%

1
D
@ 1
R312 @ 2
+3VS C316 R322 SUSP
0.9VS_GATE_R
1 2 1M_0402_5% G
0.01U_0201_25V6-K S Q29

ni

3
0_0402_5% 2 2N7002WT1G_SC-70-3
1

2
1 R314
C10059
820K_0402_5%
1

0.01U_0201_25V6-K
2
2

@ R41123
@ 470_0402_5%

ca
2
1

D
SUSP 2 Q6244 +0.9VS +3VALW +3VS
G 2N7002WT1G_SC-70-3
S
3

2
2

2
R11239
R11237 R11238
2.2K_0402_5%

l
2.2K_0402_5% 100K_0402_5%

1
+0.9VS_PG 44

1
@

1
@ @

1
+0.9VS QCC2 D
+1.8VS 2 A. Vth = 2.5V (MAX)
+0.6VS
For DisCharge +5VS G B. Id = 340 mA (MAX)
C. RDSon = 2.5 ohm(MAX)
D. Vth in schematic = 3.3V

1
C S

3
2 QC13 2N7002WT1G_SC-70-3
1

B MLMBT3904WT1G NPN SOT323-3

@
2
R209 R953 E

3
1

@ 470_0402_5% @ 470_0402_5% R11240

@
1

A
R954 @ A
@ 470_0402_5% R41135 100K_0402_5%
2

@ 470_0402_5%
1
2
1

D
2

SUSP 2 Q166
1

D D
G 2N7002WT1G_SC-70-3
1

2 SUSP SUSP 2 D
S Q637
3

G G 2N7002WT1G_SC-70-3 SUSP 2 Q6248

@
S Q17 S G 2N7002WT1G_SC-70-3
3

@ S
3

@
2N7002WT1G_SC-70-3 Title
@ Security Classification LC Future Center Secret Data
Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SW B
eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 52 of 66
5 4 3 2 1
 5 4 3 2 1

44 3V_WLAN_EN#
3V_WLAN_EN#
R11020 1 @ 2 0_0402_5%

1
3V_WLAN_EN_R#
eleTro-X Technical
C10073
@
0.1U_0402_10V7-K
2

3V_LAN_EN# R11021 1 @ 2 0_0402_5% 3V_LAN_EN_R#

D D
44 3V_LAN_EN#
1
C10070
@
0.1U_0402_10V7-K
2

Ele
tro
C C

+0.9VALW_VDDP to +VDDP 10A request +3VALW +3VALW1_LAN

R12098 1 @ 2 0_0603_5%
B+ 9V--13.6V Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V
Rds(on) >= 7.5mohm
+/- 1.5% Q293
Load MOS N MOS Id =< 40A Vgs(th) Max >= 2.6V AON6414AL_DFN8-5
Rds(on) >= 7.5mohm

-X
+3VALW 1 1
Q291 +3VALW_WLAN

1
+/- 1.5% AON6414AL_DFN8-5 C10093
1
5
2
3 C10095 C10091
10U_0603_6.3V6-M 10U_0603_6.3V6-M 1U_0402_6.3V6-K

2
1 @ 2
2 1 1
1 2 1 C10088

4
1

C10092 5 3 @ C10090 @
10U_0603_6.3V6-M C10094 C10087 0.1U_0201_6.3V6-K 0.01U_0201_25V6-K
@ 10U_0603_6.3V6-M 1U_0402_6.3V6-K 2 2
1
B+
2

2 2
1
4

@ C10084 C10085

Te
0.1U_0201_6.3V6-K R11058
@
2 0.01U_0201_25V6-K R11057 1 @ 2 0_0402_5% 1 2
2

150K_0402_5%

1
D
B+ C10089
1
R11059 2 3V_LAN_EN_R#
1M_0402_5% G
R11061
0.01U_0201_25V6-K S Q292

3
R11060 1 @ 2 0_0402_5% 1 2 2 2N7002WT1G_SC-70-3

2
ch
150K_0402_5%
1

D
1 3V_WLAN_EN_R#
C10096 R11062 2
1M_0402_5% G
0.01U_0201_25V6-K S Q294
3

2 2N7002WT1G_SC-70-3
2

B B

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SW WWAN & WLAN
eleTro-X Technical THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 53 of 66
5 4 3 2 1
 5 4 3 2 1

540_0402NEW_30%_PRF15BB541NB6RC
25~100Degree
0.54@25 Degree
1.2*0.54*k@85Degree
2*0.54 k@100 Degree
eleTro-X Technical
20*0.54 k@120Degree
100*0.54 k@130Degree
350*0.54 k@140Degree
D
Vbattrey min =9V,Vbattery max =12.6V D

Vthreshold min=0.65V,Vthreshold min=0.85V,

TotalR ( PTC)*(VBatt-1.25)/(TotalR ( PTC)+750)=0.65V
TotalR ( PTC)max=59.8K~==110 times 0.54 k PD1
PF5
1 2 1 2
TotalR ( PTC)min=43.72K~==80times 0.54 k M-BAT-PWR
0.5A_32V_ERBRD0R50X
Normal run 3Dmark 1SS355VMTE-17
PD2
PF6
the max T maybe 85 Degree 1 2 1 2
S-BAT-PWR
the total R PTC= 1.2*0.54*10=12*0.54 k 1SS355VMTE-17
0.5A_32V_ERBRD0R50X
PD3
if only one PTC over 130 degree, MAINPWON is open Drain output ,
So need pull high voltage level 1 2 1
PF10
2
VINT20_IN
the total PTC is 100*0.54K+11*0.54k,>80*0.54K remove the Pull high signal to 3/5V page
@ PR789
PD4
1SS355VMTE-17 PR793 PR788 0.5A_32V_ERBRD0R50X
1SS355VMTE-17
and over the min Vthreshold,and active the OTP 44,60 MAINPW ON
0_0201_5%
2 1 2 1
100K_0201_1%
2 1
10K_0201_1%
1 2 PD5
PF11
if only one PTC over 140 degree, 1 2 1 2
B+
the total PTC is 350*0.54K>>80*0.54K 1SS355VMTE-17
0.5A_32V_ERBRD0R50X

1
Ele
,can over the min Vthreshold

3
E
PQ616 PR790
2B 750K_0201_5%
and active the OTP 57 FET_OFF#
PMBT3906 S-Battey IN

2
C
so,the OTP function is ok DCIN 1 DCIN2 M-Battery IN PQ19 FET Charger VDDC-VDD

1
OTP_RESET# 14 PQ1 FET PQ5 FET PQ17 FET PRT407
PQ101 FET PQPQ620 FET
PRT2 540_0402NEW _30%_PRF15BB541NB6RC

1
C 540_0402NEW _30%_PRF15BB541NB6RC
PQ617 2 2 1 2 1 2 1 2 1 2 1 2 1
PMBT3904 B
E 2 PRT406 PRT3 PRT410 PRT413

1
D 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC
PC1179 2

tro
OTP_RESET 44
1U_0603_25V7K G PRT411
1 S PRT6 PRT8 540_0402NEW _30%_PRF15BB541NB6RC

3
540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC
C 2 1 2 1 2 1 2 1 2 1 C

PQ615 PRT7 PRT409

2N7002W T1G_SC-70-3 540_0402NEW _30%_PRF15BB541NB6RC 540_0402NEW _30%_PRF15BB541NB6RC

VDDCR-SOC VDDC-VDD 5Valwp 3Valw Battery Discharge

PQ403 PQ401 PQ203 FET PQ201 FET PQ103 FET

-X
Te
ch
PRT7 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

B B

+5VL

ni
1

1
PC1178 PR792
0.1U_0201_25V6-K 14K_0402_1%

2
PU704

ca
1 8 NTC_V_1 20170620
VCC TMSNS1
2 7 OTP_N_002 1 2
MAINPWON is open Drain output , GND RHYST1
So need pull high voltage level MAINPW ON 1 2 OTP_N_003 3 6 PR787
OT1 TMSNS2 20K_0201_1%
@ PR791 4 5
OT2 RHYST2

1
0_0402_5%
G718TM1U_SOT23-8 PRT1
100K_0402_1%_NCP15W F104F03RC

l
2018 4 3

2
A A

eleTro-X Technical Title

Security Classification LC Future Center Secret Data
Issued Date Deciphered Date BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 54 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical

D D

+3VALW/9.5A RichTek
Converter
RT8068 +1.8VSP/2.6A
Dock power TYPE-C 2 TI FOR SYSTEM
TYPE-C 1 +3VLP/ 100mA
Adaptor Controlor EN PAGE 76 PGOOD
Adaptor TPS51285B-1RUKR
5VALW/ 9.5A
FOR System power

Ele
+5VLP/ 100mA
EC_ON EN

PGOOD
5VALW_PWRGD

PAGE 71 ROHM Type C PD1

tro
C C
Load Sw
A 5VSP/3A

MPS EN
Converter 1.2VP/12A
TI NB687AGQ-Z_
BQ25700ARSNR 1.2VP/12A

-X
_QFN32_4X4 QFN16P_3X3
SUSP# FOR
S5 DDR4 +2.5VSP/ 2A ROHM Type C PD2
Battery Charger SYSON S3 PGOOD Load SW
B 5VSP/3A
Buck_Boost PAGE 75
PAGE 69

Te
EN PGOOD

B+ MPS
SMBus Converter

ch
Pre-charge NB693GQ-Z_
QFN16_3X3 +0.9VSP/10A
B
FOR System power B

BaTT+ EN PGOOD ALW_PWRGD

PAGE 74

ni
Main 2nd
Battery Battery
Polymer Polymer intesil
3S2P VDDCR_VDD /35A

ca
3S2P ISL62771HRTZ_
TQFN40_5X5
VDDCR__SOC / 10A
APUPWR_EN ENFOR APU Core Power

PAGE 72 PGOOD VCore PG

l
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 Power Diagram

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
eleTro-X Technical AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
T485 AMD
Saturday, April 14, 2018
0.1

Date: Sheet 55 of 66
5 4 3 2 1
 5 4 3 2 1

PD803
1SS400CMT2R_VMN2M2
TBT_VBUS20_F 2 1 1 2 PQ43
PMBT3906_SOT23-3
@ PR18 3 1

C
0_0402_5%

E
1
PC65

3.92K_0603_1%
2
1

1
PD802 0.1U_0402_25V7-K

eleTro-X Technical

PR22
1SS400CMT2R_VMN2M2 PR21 PR23 PR24
USBC_VBUS20_F

2
2 1 2K_0402_1% 3.92K_0603_1% 100K_0201_1%

2
1
PC68
0.01U_0402_25V7-K VCC3_LDO_DOCK

2
PR19 PR20

1
30.1K_0201_1% 324K_0201_1%
PR25 PD10 PD805 PR896 @0925
10K_0603_1% 1SS400CMT2R_VMN2M2 1SS400CMT2R_VMN2M2 100K_0201_1%

10K_0603_1%
add VCC3_LDO_DOCK to pull

1
D high the -TH_SHUTDOWN D

PR57
2

2
PU3
TL331IDBVR_SOT23-5 PD806 @ PR922
1 5 1SS400CMT2R_VMN2M2 0_0201_5%

2
IN- VCC 1 2 2 1 TH_SHUTDOWN#
2 PD804
GND 1SS400CMT2R_VMN2M2
3 4 2 1
IN+ OUT

@1009
PR886

90.9K_0201_1%
add PR922

330P_0402_50V8-J
1

1
274K_0201_1% D

1
1 2 2

PC66
PRT412 PQ44

PR887
PRF15BB541NB6RC_0402 G LSK3541G1ET2L

2
S

3
1

1
PD6 PC67
Add comment UDZVTE-175.1B_UMD2-2 2.2U_0603_25V6-K
PRT1 near PQ101

2
2
Ele
DOCK_VBUS20 TBT_VBUS20_F
PQ1 PQ2
SI7153DNT1GE_POWERPAK1212-8-5 SI7153DNT1GE_POWERPAK1212-8-5
PF1 1 1 PL1
5A_32V_0438005.WR 2 2 FBMJ2125HM210NT_0805
1 2 5 3 3 5 1 2
VINT20_IN

4
2 2 2

1
2 PC14 @ PC15 PC16

0.047U_0402_25V7-K
PC13 @ PR69 10U_0603_25V6-K 10U_0603_25V6-K 0.01U_0402_25V7-K

1
1U_0402_25V6-K 1 0_0201_5%

1
1 1 1

PC1
1 @ PR71

1
1 @ PC50 PR1 PR2 PR3
0_0201_5%

tro
2
0.1U_0201_25V6-K 100_0201_5% 100K_0201_1% 0_0201_5% PC51
2 1000P_0201_25V7-K

2
C 2 C

2
@

1
PR70
6.04K_0201_1%
PR72

2
6.04K_0201_1%
@
1 2

1
@
PR73 PU4
10K_0201_1% 5 1
V+ IN+

-X
PR75 2

2
1M_0201_5% V-
@
2 1 4 3
OUT IN-

1
@ TLV1701AIDBVR_SOT23-5
2

PR7
G

@
PQ45 10K_0201_1%
LSK3541G1ET2L_VMT3

2
3
S

1
1

@
@ PR76

Te
0_0201_5%
@ PR67

1
0_0201_5% D
TBT_HV_GATE
2

2 1 2 PQ3
24 TBT_HV_GATE G LSK3541G1ET2L
1

1 S

3
PR15 @ PC52
100K_0201_5% 0.1U_0201_6.3V7-K
2
2

ch
1
D
TH_SHUTDOWN# 2 PQ4
G LSK3541G1ET2L
20170912@Change
S
Follow T480
3

USBC_VBUS20
B B
PQ5 PQ6
SI7153DNT1GE_POWERPAK1212-8-5 SI7153DNT1GE_POWERPAK1212-8-5
PF2 USBC_VBUS20_F 1 1 PL2
5A_32V_0438005.WR 2 2 FBMJ2125HM210NT_0805
1 2 5 3 3 5 1 2

ni
4

4
1

PC2 2

1
1U_0402_25V6-K PC4 @ PC5 PC6
10U_0603_25V6-M 10U_0603_25V6-M 0.01U_0402_25V7-K
0.047U_0402_25V7-K
2

2
1

@ PR79 @ PR77 1
1 1
1
PC3

@ PC53 PR12 PR13 0_0201_5% PR8 0_0201_5%

0.1U_0201_25V6-K 100_0201_5% 100K_0201_1% 0_0201_5% PC54
1000P_0201_25V7-K
2

2 2

ca
2

@
1

@2017 1129
PR80 PR78
PR1,PR12,PC3,PC1,PC51,PC54 follow T480 6.04K_0201_1% 6.04K_0201_1%
1 2
2

@
1

@
PR81 PU5
10K_0201_1% 5 1
V+ IN+
PR91 2
2

1M_0201_5% V-

l
@
1 2 4 3
OUT IN-
2

@ TLV1701AIDBVR_SOT23-5
G

PQ46 @
LSK3541G1ET2L_VMT3 @ PR92 PR14
0_0201_5% 10K_0201_1%
3
S

1 1 2
2

@
@ PR68
1

0_0201_5% D
USBC_HV_GATE 2 1 2 PQ7
24 USBC_HV_GATE G LSK3541G1ET2L

S
3
1

1
PR16 @ PC55
100K_0201_5% 0.1U_0201_6.3V7-K
A A
2
2

D
TH_SHUTDOWN# 2 PQ8
G LSK3541G1ET2L

20170912@Change S
3

Follow T480

eleTro-X Technical Security Classification

Issued Date
LC Future Center Secret Data
Deciphered Date
Title

DC-IN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 56 of 66
5 4 3 2 1
 5 4 3 2 1

BAT-PWR
+3VL 20170920
change pull high voltage and R
M-BAT-PWR

2
MAIN BAT CONN PR26
1M_0201_5%
PQ17
AON7401 eleTro-X Technical
1 PQ18
@ PJ2 PF3 2 AON7401

1
1 10A_24V_TR-3216FF10-R 3 M_BAT_PWR_A 1
1 2 M_BAT_IN WIDE PATTERN 1 2 5 2
2 3 PR27 3
3

2
8 4 100_0201_5% 5

4
PTH1 4

2
9 5 1 2 I2C_CLK_BT0 PR55
PTH2 5 I2C_CLK_BT0 44
10 6 PR28 100K_0201_5% PR56

4
PTH3 6

2
D D
11 7 100_0201_5% 510K_0201_5%
PTH4 7 1 2 I2C_DATA_BT0 PC1198
I2C_DATA_BT0 44

1
HIGHS_WS33071-S0201-HF 0.01U_0402_25V

1
1 2 M_TEMP 44

2
PR58

2
10K_0201_1% PR59 PR60

390P_0201_25V7-K

2200P_0201_25V7K

390P_0201_25V7-K

2200P_0201_25V7K
M_TEMP_P 510K_0201_5% PR61
2 2 2 2 M_TEMP_P 58 100K_0201_5%
100_0201_5%

PC18

PC19

PC20

PC21

1
1 1 1 1

1
D D
@ @ 2 2
44 M1_DRV
G G
PQ622 PQ25
LSK3541G1ET2L_VMT3S LSK3541G1ET2L_VMT3S

3
2
PR62
PR83
100K_0201_5%

Ele
2 1

1
D

1
2
44 M2_DRV# 510K_0201_5%
G PQ26
LSK3541G1ET2L_VMT3
S

3
1
D

2
54 FET_OFF# 2

1
G PR63 D
PQ27 510K_0201_5% FET_OFF# 2
LSK3541G1ET2L_VMT3S G

3
PQ36

1
LSK3541G1ET2L_VMT3S

tro

3
C C

+3VL
20170920
change pull high voltage and R
S-BAT-PWR PQ19 PQ20
2

AON7401 AON7401
confirm with ME PR33 1
1M_0201_5% 1 S_BAT_PWR_A 2

-X
PF4 2 3
@ PJ3 10A_24V_TR-3216FF10-R 3 5
1

1 1 2 5
1

2
2 S_BAT_IN

4
2

2
3 PR34 PR883

4
3 4 100_0201_5% PR66 510K_0201_5%
4 5 1 2 I2C_CLK_BT1
5 I2C_CLK_BT1 44 100K_0201_5%

2
8 6

1
9 GND1 6 7 PR35 PC28

1
GND2 7 100_0201_5% 0.01U_0402_25V

1
Te
FOX_BBP27BY-B4801-7H 1 2 I2C_DATA_BT1
I2C_DATA_BT1 44

2
1 2
RF_NS@ RF_NS@ S_TEMP 44
PR880 PR884 PR882
PR902 100K_0201_5% 510K_0201_5% 100_0201_5%
390P_0201_25V7-K

390P_0201_25V7-K
2200P_0201_25V7K

2200P_0402_25V7-K

2 2 2 2 10K_0201_1%
S_TEMP_P
S_TEMP_P 58

1
1

1
ESD9B5.0ST5G SOD-923

ESD9B5.0ST5G SOD-923

ESD9B5.0ST5G SOD-923
PC22

PC23

PC24

PC25

ch
1 1 1 1
PD7

PD8

PD9
2

1
D D
2 2
44 S1_DRV
G G
B B
PQ30 PQ31
LSK3541G1ET2L_VMT3S LSK3541G1ET2L_VMT3S

3
ni
PR84

2
PR881 2 1
100K_0201_5%
510K_0201_5%

1
D
2
44 S2_DRV#

ca
G PQ32
LSK3541G1ET2L_VMT3
S

3
2
1
D PR74
FET_OFF# 2 510K_0201_5%
G
PQ33

1
LSK3541G1ET2L_VMT3S

1
D
FET_OFF# 2
20170918 G
PQ34
delete the Think engine power input LSK3541G1ET2L_VMT3S

3
No think engine

A A

eleTro-X Technical Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date BATTERY INPUT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 57 of 66
5 4 3 2 1
 5 4 3 2 1

eleTro-X Technical
1,snnuber PC142PR153,PC143,PR156 delete EMC@
2,PC136,PC146 delete EMC@
3,PC129.PC140 delete EMC@

D D

Table PL101

TOKO : FDSD0630-H-2R2M
Cyntec : CMLE063T-2R2MS

20171009@VBUS add a 0805R to 1

MLCCs must be placed and change PC102 to 0.47U MLCCs must be placed
VINT20_IN 20170918@Snuber Cap Change 20170918@Snuber Cap Change
symmetrically on Top and Bottom. Follow TI Follow TI Follow TI symmetrically on Top and Bottom.

330P_0402_50V7-K
PR158 PQ101 PL101 PQ102 Add poscap for E-noise
0.01_1206_LE_1% BSC0923NDI_PG-TISON-8-7 2.2UH_CMLE063T-2R2MS_10A_20% Dave
1 2 RF_NS@ RF_NS@ 1 2
SIZ340DTT1_POWERPAIR_3X3-9-10
RF_NS@ RF_NS@
B+

22U_B2_25VM_R100M

22U_B2_25VM_R100M

22U_B2_25VM_R100M

2200P_0402_25V7-K
100P_0402_50V8-J

47P_0402_50V8-J

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
2 2 1 1 1 1 1 1 1

1
100P_0402_50V8-J

47P_0402_50V8-J

PC182

PC183
0.01U_0402_25V7-K

0.1U_0402_25V6-K
PR196 PR197 PC147 PC162 1 1 1

1
1000P_0402_25V7-K

PC143

PC132

PC150

PC160

PC156

PC161

PC135

PC129

PC140
0_0201_5% 0_0201_5% 5 PC142 0.047U_0402_25V7K 0.047U_0402_25V7K 7 10
10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

PC1215

PC1216

PC1217
1 1 1 1 1 2 4 330P_0402_50V7-K 6 4 + + +

1 2

1 2

2
1

1
1 1 2 2 2 2 2 2 2

PC180

PC181

PC136

PC146
3 5 3

Ele

2
2

2
PC138

PC149

PC151

PC163

PR149 PR137 2

1 2
PU101 PR156 2 2 2
0_0402_5% 0_0402_5%

2
2 2 2 2 @ @ 2 PR153 BQ25700ARSNR_QFN32_4X4

1
PR138 56_0603_5% 56_0603_5%
30 25

BAT-PWR
PR133 4.99_0201_1% PQ103

1
4.99_0201_1% BTST1 BTST2 SI7129DNT1GE_POWERPAK1212-8-5 @ @ @

2
LX1_CHG 32 23 LX2_CHG 1 PR151

2
PR893 SW1 SW2 2 0.01_1206_LE_1%
C C
2

@ PC145 1_0805_5% DL1_CHG 29 26 DL2_CHG 3 5 1 2

0.01U_0402_25V7-K LODRV1 LODRV2 @
DH2_CHG

0.01U_0201_25V6-K

0.1U_0402_25V7K
1 2 PR160 1 2 0_0402_5% 31 24 1 2 1 PC141

1
HIDRV1 HIDRV2

PC1210

1U_0402_25V6-K

0.1U_0402_25V7K
PC158 PR161 0_0402_5% 1 2

PC134
0.033U_0402_25V7-K 1 22
VBUS VSYS

1
tro

PC154

PC153
0.033U_0402_25V7-K

1 2 @ 0.1U_0402_25V7K
CH_AGND

2
2 21 BATDRV# 1 2 2
ACN BATDRV# PR170 0_0402_5% @
Should be placed

2
3 20
ACP SRP
1

near ACP, ACN

PC164

1U_0402_25V6-K

1
PC144

7 19
VDDA SRN PR139 10_0201_5% 1 2
VDDA REGN
2

PR136
@ 2 10_0603_5% 6 28 1 2 PR155 10_0201_5% 2 1
ILIM_HIZ REGN CH_AGND
1 2 40.2K_0201_1% PC155 2.2U_0402_10V6-K
Keep these two signals CH_AGND CH_AGND
1
PC102 PC148 1 2 PR134 1 2 PR144 680P_0201_25V7-K
as pair routing REGN 0.47U_0402_25V6-K 16 17 1 2 PC157 1 2
CH_AGND COMP1 COMP2 CH_AGND

10U_0603_25V6-K

10U_0603_25V6-K
1800P_0201_25V7-K PC133 1 2 10K_0201_1%
2 1 2

-X
33P_0201_25V8-J 1 1

PC167

PC168
1 PR142 1 2 75_0201_5% 11 18 PC137 15P_0201_25V8-J
44,61 VR_HOT# PROCHOT# CELL_BATPRES
PC165
1U_0402_25V6-K PR146 1 @ 2 0_0402_5% 13
VDDA 44 EC_SMB_CK1 SCL 8 PR157 1 @ 2 0_0201_5% 2 2
2 IADPT ADP_I 44
PR148 1 @ 2 0_0402_5% 12
44 EC_SMB_DA1 SDA 9 PR141 1 @ 2 0_0201_5%
IBAT
2

CH_AGND 4 PR921 @
PR147 @ PR168 CHRG_OK 10 1 2
PSYS PSYS 44
174K_0201_1% 1 2 5 0_0402_5%
VDDA ENZ_OTG 27
PGND

2
Te

100P_0201_50V7-K

100P_0201_50V7-K

100P_0201_50V7-K
10K_0201_5% 15
VDDA
1

CMPOUT

2
33 PR101
PAD

2
14 PR150 137K_0201_1%
CMPIN

PC152

PC131

PC139
20K_0201_1%
1

1
+3VALW

1
1

2
D
B PR135 PR123 B

1
1
PSYS 1 2 ACOFF 2 100K_0201_1% 1 PR140 82K_0201_1%
G PQ626 PC1319 10K_0201_5% PR190

1
@ PR927 S 1U_0402_25V6-K 10K_0201_1% CH_AGND CH_AGND CH_AGND CH_AGND CH_AGND
3

2
0_0402_5% 2N7002WT1G_SC-70-3 PR919

1
1

2 300K_0201_1%

ch
PR923
10K_0201_1% CH_AGND

2
@
CH_AGND CH_AGND CH_AGND
2

PR920 1 @ 2 0_0201_5% PR162

44 ACIN

1
@ 0_0201_5%
PD102

1
2 1 D
PR130
1 2 2 100K_0201_1%
57 M_TEMP_P G PQ104
S

2
1
1SS355VMTE-17 2N7002WT1G_SC-70-3
@ PR132

ni
PD103 @
CH_AGND 1M_0201_5%
1 2
57 S_TEMP_P

2
1SS355VMTE-17 @
20170918@ follow T475 @
1,add ADP_I CH_AGND
2,change the charger OK to ACIN
3,change the Call_pres to T475

ca
20171204@ follow T475
add PQ626PR924,,PR925
# of CELL VCELL_PRES PR154

1-CELL 1.5V 301K

IDPM V(ILIM) PR147
A 2-CELL 2.5V 140K A

500mA 1.2V 402K

l
3-CELL 3.5V 71.5K
1.0A 1.4V 332K
4-CELL 4.5V 33.2K
1.5A 1.6V 280K
Title
2.0A 1.8V 237K Security Classification LC Future Center Secret Data
Issued Date Deciphered Date BATTERY CHARGER(BQ25700A)
3.0A 2.2V 174K LOGIC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
3.25A 2.3V 162K AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 AMD 0.1

Date: Saturday, April 14, 2018 Sheet 58 of 66

5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

eleTro-X Technical

B+
D D

1
PR4
750_0603_1%

2
1 PQ42
2SCR512P5T100_MPT3

3
Ele 1
PR5
20_1210_1%

PU6

2
3
NCP431AISNT1G_SOT23-3
Cathode
2
Reference
Anode

1
PR6

tro
24_1210_1%

C M-BAT-PWR C

2
PQ21
SSM6J402TU_UF6
6 PD15
5 DAN222MGT2L_VMD3
4 2 2
1 M-BAT-TRCL_A 1

-X
3

2 3
2
2
PC26 PR40 2
0.01U_0402_25V7K 470K_0201_5% PR41 1
100_0201_5% 3
1

1
PD16

1
DAN222MGT2L_VMD3

Te
2
PR42
4.7K_0201_5%

1
ch
1
2 PQ22
44 M_TRCL
DTC015EMT2L_VMT3

3
B B

S-BAT-PWR

ni
PQ23
SSM6J402TU_UF6
6 PD17
5 DAN222MGT2L_VMD3
4 2 2
1 S-BAT-TRCL_A 1

ca
3

23
2
2
PC27 2
0.01U_0402_25V7K PR43 PR44 1
470K_0201_5% 100_0201_5% 3
1

1
PD18
DAN222MGT2L_VMD3
N37033408

l
2
PR45
4.7K_0201_5%

1
1

2 PQ24
44 S_TRCL
DTC015EMT2L_VMT3
3

A A

eleTro-X Technical Security Classification

Issued Date
LC Future Center Secret Data
Deciphered Date
Title

CHARGER SELECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 59 of 66
5 4 3 2 1
 5 4 3 2 1

1,PC206,,PC229,PC228,PC226PC227,PC230 PC231PC222,PC224 delete EMC@

2,change snnuber EMC-NS@ to @
eleTro-X Technical

D All the input MLCCs on 20V must be placed D

symmetrically on Top and Bottom.

All the input MLCCs on 20V must be placed
symmetrically on Top and Bottom.
@ PJ202
@ PJ201 @ PR221 JUMP_43X79
JUMP_43X79 0_0201_5% 2 1
2 1 B+

22U_B2_25VM_R100M

22U_B2_25VM_R100M
47P_0402_50V8-J

47P_0402_50V8-J
0.1U_0402_25V6
2 1 1 2

100P_0402_50V8-J
5V EN2

100P_0402_50V8-J
B+ 2 1

22U_B2_25VM_R100M

22U_B2_25VM_R100M

0.01U_0402_25V7-K

0.1U_0402_25V6
1 1

PC230

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
0.01U_0402_25V7-K
1 1 1 1 1 1 1 1

1
PC226

PC227

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

PC206

PC1219

PC1230

PC229

PC228

PC231
+ +
1 1 1 1
B+ +5VL

1
PC1226

PC1218

PC205

PC207

PC208

PC209

PC210
2 + +
VCC5M

PC201

PC202

PC203

PC204
PR222

2
2 2 2 2 2 2 2 2
0_0201_5%

1
2 2 2 2 2 2
TDC= EDC= @ PD201
RB521CM_30

2
9.5A
OCP = 13A

2
@
@ @ +3VL VCC3M TDC=
16.6A @ @
EDC= 9.5A
OCP =

4.7U_0402_6.3V
1 1 13A +3VALW 15A

1
PC212
PC211 PC213 @ PC235
0.01U_0402_25V 4.7U_0402_6.3V6-M 0.1U_0201_25V6-K
+5VALW

2
2 2

Ele 5

5
3/5V EN PQ203

D
Table PL202

12

13
AON7516 1N DFN

1
PQ201
1

1 2 TPS51285B_ON_1
Table PL201 AON7516 1N DFN @ PJ807 PJ808

1
VREG5

VREG3
VIN
4 4 1st : Cyntec :CMLE063T-1R0MS JUMP_43X79 JUMP_43X79
1

PJ805 PJ806 G PR201 20 6 G

EN1 EN2 2st : SUMIDA:0630CDMCDDS-1R0MC

2
JUMP_43X79 JUMP_43X79 1st : Cyntec :CMLE063T-1R0MS 0_0201_5% @ @

S1
S2
S3

S3
S2
S1
C C
2

@ @
2st : SUMIDA:0630CDMCDDS-1R0MC

2
1 2PR202 TPS51285B_DH116 10 TPS51285B_DH2
1 2PR203
2

1
2
3

3
2
1
1_0402_5% DRVH1 DRVH2 1_0402_5% PC215
PC214 PR205 0.1U_0402_25V7-K
1 2 1 2PR204 TPS51285B_BST117 9 TPS51285B_BST2
1 2 1 2
VBST1 VBST2

tro
PL201 2.2_0402_5% PU201 2.2_0402_5% PL202
1UH_CMLE063T-1R0MS_16A_20% 0.1U_0402_25V7-K TPS51285B-1RUKR_WQFN20_3X3 1UH_CMLE063T-1R0MS_16A_20%
+5VALWP 1 2 TPS51285B_LX1 18 8 TPS51285B_LX2 1 2 +3VALWP
SW1 SW2

5
PQ204
@

D
5
TPS51285B_DL1 15 TPS51285B_DL2

220U_B2_6.3VM_R25M

220U_B2_6.3VM_R25M
11

0.01U_0201_6.3V7-K
AON7508 1N DFN 1
DRVL1 DRVL2
1

1
PC216
@ +5VALWP 1 1

D
PR206 1 1000P_0201_50V7-K PR207 1
TPS51285B_VFB2

PC222

PC223

PC218
0_0201_5% PC217 14 4 4 0_0201_5% + +
VO1 VFB2 G 2
220U_B2_6.3VM_R25M

220U_B2_6.3VM_R25M

220U_B2_6.3VM_R25M

PGOOD
@ 1000P_0201_50V7-K
@

1
TPS51285B_FB1 2
0.01U_0201_6.3V7-K

VCLK
@

S3
S2
S1
1 1 1

GND
2

1 2
CS1

CS2
2 G VFB1 PR208 2 2 2
1 @ 2
1
PC219

PC220

PC221

PC224

+ + + PC225 2.2_0603_5%

S1
S2
S3

3
2
1
1

PR209 0.1U_0201_6.3V6K +3VALW

-X
PR211

19

21

7
PR210 2.2_0603_5% 1 133K_0201_1%
2
3

2
2 2 2 2 154K_0201_1% PQ202 1

10K_0402_1%
AON7508 1N DFN
2

2
2
2

5.6K_0201_5%

PR885
1

2
PR212 @

PR213
200_0402_1% PR214

1
5.6K_0201_5%

1
5M_3M_PWRG PR215

2
5M_3M_PWRG 44 200K_0201_1%

1
Te
Table PC218,PC223

2
2

PR216 Panasonic : 6TPE220MAPB

100K_0201_1%
B
KEMET : T520B227M006ATE025 B
1

Table PC219,PC220,PC221

Panasonic : 6TPE220MAPB

ch
@11/29,changePR202,PR203 to 0 ohm
KEMET: T520B227M006ATE025 @11/29,changePR204,PR205 to2.2ohm
@11/29,changePR213,PR214 to5.6Kohm

PR898 PR929
20K_0402_1% 20K_0402_1%
EC_ON 1 2 5V EN2 EC_ON_5V 1 2 3/5V EN
44,63,64,65 EC_ON 44 EC_ON_5V

ni
1 2
@ PR231 0_0201_5%
2

2
+3VL
1

1
@ PC1235 PR901 @ PC1320 PR928
0.1U_0201_25V6-K 100K_0201_1% 0.1U_0201_25V6-K 100K_0201_1%
2

2
2

1
PR899

ca
2

100K_0201_1%
PR897
100K_0201_1%
1

1
D D
5V EN2 Gate 2 5V EN2 Gate 2
1

G G PQ628
3

D
S @9.25 follow A475 S
1

3
44,54 MAINPWON 5 @ PR230 NTJD5121NT1G 2N7002WT1G_SC-70-3
G add MAINPWON on to control 3/5V power
A 47K_0201_5% A
S PQ624A change PR901 to 100K from 1M @
4

NTJD5121NT1G EN input current=1UA,Nosuggest above 200K R for it

1

l
PQ624B
@2018.1.31 add EC_ON2 control

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date DC/DC VCC5M/VCC3M(TPS51285B-1)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 60 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

PL805
BLM18KG300TN1D_2P
1 2

PL809
1,change the debug part to 0402 BLM18KG300TN1D_2P
2,chage the Core coreNB input cap VIN_+VDDNB_CORE 1 2
3,change the GPUcore some debug part to 0402 B+

22U_B2_25VM_R100M

22U_B2_25VM_R100M
1 1
eleTro-X Technical

47P_0402_50V8-J

0.1U_0402_25V6

0.1U_0402_25V6
1 1 1 1 1

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
1

1
+ +

PC404

PC403

PC402

PC1209

PC1224
5

PC405

PC408

PC1195

PC1196
PQ401

2
TPCA8065-H 2 2 2 2 2 2 2

PC401 PR402
680P_0402_50V7-K 2K_0402_1%
UGATE_NB 4 @ +VDDNB_CORE
@ @ @ @
1 2 1 2
TDC=10A
D D
@ @ EDC=13A

3
2
1
PL806
PC409 0.36UH 20% PCMB063T-R36MS3R205 20A OCP=16A
PR403 PR404 390P_0402_50V8-J PR405
PHASE_NB 1 4 +VDDCR_SOC
PR401 590_0402_1% 47K_0402_1% 32.4K_0402_1%
100_0402_1% 1 2 1 2 2 1 1 2
+VDDCR_SOC
1 2 PQ402 2 3 1 1
+VDDCR_SOC

330U_D2_2V_Y

330U_D2_2V_Y

10U_0603_6.3V6M

0.1U_0402_10V6K
5

2
@ PR408 PC413 TPCA8057-H
BOOT_NB 1

2
PR407 PC411 2 1 2 PR409 + +

PC414

PC415

PC417
PC1227
301_0402_1% 100P_0402_50V8-J 4.7_0603_5%
1 2 1 2 1 2 1 2 2.2_0603_5% 0.22U_0603_25V7K
6 VDDCR_SOC_VCC_SENSE @

1
PR406 @ 0_0402_5% 2 2
LGATE_NB

1
4
PC412 PC410
1000P_0201_50V7-K

1
1 2 PC419
680P_0402_50V7-K

3
2
1
@

2
330P_0402_50V7-K
VSUMP_NB 2 @

COMP_NB
VSEN_NB
2.61K_0402_1%
PR410

FB_NB
1
PR411 PR414
2 1

11K_0402_1% 3.65K_0402_1%
VSUMP_NB

1
1 2
PGOOD_NB
PRT401 PC420 PC418
CLOSE PL401 10K_0402_NTC 0.033U_0402_25V7-K 0.033U_0402_25V7-K
2

2
LGATE_NB
PR418
PR412 1_0402_1%
PHASE_NB VSUMN_NB
1

698_0402_1% 1 2
VSUMN_NB 1 2
UGATE_NB
PR413
PC422 100_0402_1% PC421
BOOT_NB

1
0.1U_0402_25V6-K 1 2 1 2 PL808

Ele
BLM18KG300TN1D_2P
PR415 @ 1 2

2
27.4K_0402_1% 820P_0402_50V7-K

40

39

38

37

36

35

34

33

32

31
1 2 @ PL807
BLM18KG300TN1D_2P

ISUMP_NB

ISUMN_NB

VSEN_NB

FB_NB

COMP_NB

PGOOD_NB

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB
VIN_+VDD_CORE 1 2
PR416
10.7K_0402_1% PRT402 B+
470K_0402_3% CLOSE PQ401

33U_D2_25VM_R40M

33U_D2_25VM_R40M
1 2 2 1 APU_NTC_NB 1 30 BOOT2_APU

2200P_0402_25V7-K
1 1

22U_B2_25VM_R100M

22U_B2_25VM_R100M
NTC_NB BOOT2
1 1

47P_0402_50V8-J

0.1U_0402_25V6
APU_IMON_NB 2 29 UGATE2_APU + +

PC406

PC407
1 1 1 1 1

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
IMON_NB UGATE2

1
+ +

PC1220

PC1208

PC1173

PC1175

PC1174
APU_SVC PHASE2_APU

5
1 2 3 28

PC1176

PC1171

PC1177

PC1172
C 6 APU_SVC PR417 @ 0_0402_5% SVC PHASE2 PQ403 2 2 C
APU_VRHOT_A LGATE2_APU

2
1 2 4 27 TPCA8065-H 2 2 2 2 2 2 2
44,58 VR_HOT# PR419 @ 0_0402_5% VR_HOT_L LGATE2
APU_SVD APU_VDDP
1

1 2 5 26 0_0603_5% 2 @ 1PR422
6 APU_SVD SVD VDDP +5VALW UGATE1_APU
1

PR420 @ 0_0402_5% 4
1 2 6 25 APU_VDD @ @ @ @
PR421 PC423 PU401 0_0603_5% 2 @ 1PR872 @
+1.8VS VDDIO VDD

tro
133K_0402_1% 0.1U_0402_25V6-K PR423 @ 0_0402_5% ISL62771HRTZ_TQFN40_5X5
APU_SVT LGATE1_APU
2

1
1 2 7 24 PC424 PC1156
6 APU_SVT
2

PR425 @ 0_0402_5% SVT LGATE1 1U_0402_10V 1U_0402_10V

EN_APU PHASE1_APU

3
2
1
8 23

2
ENABLE PHASE1 PL3103
APU_PWROK_1 9 22 UGATE1_APU
0.24UH_PCME063T-R24MS1R145_35A_20%
PWROK UGATE1 PHASE1_APU 1 2
PC433 1 2 0.1U_0402_25V7-K 10 21 BOOT1_APU +VDDC_VDD
IMON BOOT1 PQ404 PQ405 1 1 1

330U_D2_2V_Y

10U_0603_6.3V6M

0.1U_0402_10V6K
470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M
5

2
PGOOD
PC423 change to SE00000G80T @11/29 PR430 PC434 TPCA8057-H TPCA8057-H

ISUMN
ISUMP

COMP
PR426 BOOT1_APU

ISEN2

ISEN1

2
VSEN
1 2 1 2 PR431 + + +

PC159
PC1160

PC1158

PC1077

PC1157
+VDD_CORE
NTC

RTN
1 2 4.7_0603_5%

FB

TP
2.2_0603_5% 0.22U_0603_25V7K Dave change to EX85 L
+3VALW @

1
2 2 2
TDC=35A

1
11

12

13

14

15

16

17

18

19

20

41
133K_0402_1% LGATE1_APU 4 4
@
EDP=45A

10K_0402_1%
2
+1.8VS PR427
27.4K_0402_1% OCP=55A

PR428
@

1
1 2 PC1060

-X

3
2
1

3
2
1
1

APU_VSEN

APU_COMP
680P_0402_50V7-K

APU_FB
APU_RTN
PR429
@

2
1.91K_0402_1% 2 1
PGOOD_APU 1 2
PRT403 CLOSE PQ403 IMVPPOK 44
2

470K_0402_3% PR432 @ 0_0402_5%

1 2 @ APU_PWROK_1
6 APU_PWROK PR433 @ 0_0402_5% PR869 PGOOD_NB APU_ISEN1
10.7K_0402_1% 1 2 1 2
PR435 @ 0_0402_5%
2

PR819 10K_0201_1%
PR439
@ 3.65K_0402_1%
APU_ISEN2 2 1 VSUM+_VDD 1 2

Te
0_0402_5% PR878
+1.8VS @
APU_ISEN1 2 1 PR444
0.22U_0402_25V6-K

0.22U_0402_25V6-K

0_0402_5% PR879 1_0402_1%

VSUM-_VDD 1 2
1

1
PC1191

PC1192
2

330P_0201_25V7-K

PR440 PR441
2

1K_0402_1% 1K_0402_1% PC1072 PR442 PC1068 PR443

B 1000P_0201_50V7-K 301_0402_1% 100P_0402_50V8-J 32.4K_0402_1% B
1 2 1 2 1 2 1 2
VSUM+_VDD
1

@ @
PC1059 @
2

PR873 PR876 390P_0402_50V8-J

ch
APU_SVC
0.082U_0402_50V7-K

PR870 681_0402_1% 56K_0402_1%

2.61K_0402_1% 1 2 1 2 2 1 VIN_+VDD_CORE
PC1055

APU_SVD
1
1

PC1067
PC1069
11K_0402_1%
1

PC1062 PR877 680P_0402_50V7-K

PR448

2200P_0402_25V7-K
22U_B2_25VM_R100M

22U_B2_25VM_R100M
CLOSE PL406 0.1U_0402_25V6-K @ 2K_0402_1% 1 1

47P_0402_50V8-J

0.1U_0402_25V6
2

2
2

1 2 1 2 1 1 1 1 1

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
<BOM Structure>

1
PRT404 + +

PC1225

PC1214

PC1166

PC1168

PC1167
2
1

5
10K_0402_NTC

PC1169

PC1164

PC1170

PC1165
@ @
PR868 PR451 100_0402_1% PQ620

2
PR450 PR452 620_0402_1% 1 2 TPCA8065-H 2 2 2 2 2 2 2
VSUM-_VDD 2APU_ISUMN
+VDDC_VDD
1

220_0402_5% 220_0402_5% 1
+VDD_CORE
UGATE2_APU
2

4 @
@ @
1

1 2
PC1061 PR455 PR454 @ 0_0402_5% VDDCR_VCC_SENSE 6 @ @ @ @ TDC=35A

ni
0.1U_0402_25V6-K 100_0402_1% PC1071
EDP=45A
2

1 2 1 2

3
2
1
OCP=55A
1 2 PL3104
Dave 2017 0824 @
820P_0402_50V7-K PR871 @ 0_0402_5% VDDCR_VSS_SENSE 6
PHASE2_APU
0.24UH_PCME063T-R24MS1R145_35A_20%
@ 1 2
SVID SVIC set the Boost Voltage. +VDDC_VDD
1

PR875 100_0402_1%
1 2
01 for 0.9V PC1066 PQ619 PQ618

10U_0603_6.3V6M

0.1U_0402_10V6K
5

2
PR458 .01U_0402_25V7-K PR817 PC1057 TPCA8057-H TPCA8057-H Dave change to EX85 L
1 1
2

BOOT2_APU

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

2
47K_0402_5% 1 2 1 2 PR816

PC1151

PC1152
1 2 4.7_0603_5% + +

PC1154

PC1155
PR868 change to SD00001PB0T @11/29 44 APUPWR_EN 2.2_0603_5% 0.22U_0603_25V7K
@

1
ca
EN_APU LGATE2_APU

1
4 4 2 2
1

1
PC1045
@

3
2
1

3
2
1
PC1070 680P_0402_50V7-K
0.1U_0402_25V6-K
@
2

2
APU_ISEN2 1 2

PR821

l
10K_0201_1%
A A
PR814
3.65K_0402_1%
VSUM+_VDD 1 2

PR815
1_0402_1%
VSUM-_VDD 1 2

Dave detel the net

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date DC/DC IMVP8(NCP81218)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 61 of 66
5 4 3 2 1

eleTro-X Technical
 A
B
C
D
PC505
22U_0603_6.3V6-M

@
2 1

2
1
PC506

@
22U_0603_6.3V6-M

2
1
2 1

PC1232
+VDDCR_SOC

BAT-PWR
PC507 PC1202
22U_0603_6.3V6-M 22U_0603_6.3V6-M
2 1 @ 2 1

PC1233
2200P_0201_25V7K
PC508 PC1201
22U_0603_6.3V6-M 22U_0603_6.3V6-M
@

1000P_0402_50V7-K
PC1074 2 1 2 1
22U_0603_6.3V6-M
2 1 PC509 PC1200

5
5

@
2 1 22U_0603_6.3V6-M 22U_0603_6.3V6-M
@

PC1075 2 1 2 1

2
PC1265 22U_0603_6.3V6-M

@
0.1U_0402_25V6 2 1 PC510 PC1199
22U_0603_6.3V6-M 22U_0603_6.3V6-M

PC1231

1
@

PC1079 2 1 2 1
22U_0603_6.3V6-M
2 1 PC511
22U_0603_6.3V6-M

2200P_0201_25V7K
PC1080 2 1
22U_0603_6.3V6-M

Main source :SE00000M03T

2 1 PC512
22U_0603_6.3V6-M

@
PC1081 2 1

2
1
22U_0603_6.3V6-M
2 1 PC513
+VDDC_VDD

BAT-PWR
22U_0603_6.3V6-M

@
2 1

2
1
PC1197 PC514

PC1263
BAT-PWR
22U_0603_6.3V6-M 22U_0603_6.3V6-M

2nd source :SE00000M04T sumsung

2 1 2 1

Murata

PC1234

1000P_0402_50V7-K

@
2 1

eleTro-X Technical
PC1264

2200P_0201_25V7K
0.1U_0402_25V6

@
2 1
+VDDC_VDD
+VDDC_VDD

+1.2V
PC1253 PC1204
0.1U_0402_25V6 180P_0402_50V8-J
2 1

@
2 1

PC1252 PC1277
0.1U_0402_25V6 PC1301 330U_B2_2.5VM_R9M

4
4

0.22U_0402_25V6-K
2
1
+

2 1

+3VALW1_LAN

@
2 1
PC1302

+1.2V
PC1239 0.22U_0402_25V6-K PC1278
0.1U_0402_25V6 2 1 470U_D2_2VM_R4.5M
@
2
1
+

PC1299
0.22U_0402_25V6-K PC1279
@

2 1 470U_D2_2VM_R4.5M
2
1
+

PC1300

@
2 1 0.22U_0402_25V6-K PC1276

@
2 1 2 1 1U_0402_10V6-K
PC1247 2 1

+3VS
PC1240 0.1U_0402_25V6 PC1295

+1.8VALW
0.1U_0402_25V6 0.22U_0402_25V6-K PC1272
@

2 1 1U_0402_10V6-K
@

2 1

PC1296 PC1273
0.22U_0402_25V6-K 1U_0402_10V6-K
@

2 1 2 1
Ele
PC1274
PC1293 0.47U_0402_25V6-K
@

0.22U_0402_25V6-K 2 1
@

2 1

@
@
2 1 2 1

+0.9VS
PC1289
PC1241 PC1248 PC1294 0.47U_0402_25V6-K

+3VS
@

0.1U_0402_25V6 0.1U_0402_25V6 0.22U_0402_25V6-K 2 1

@

2 1

PC1290
tro
PC1291 0.47U_0402_25V6-K
@

0.22U_0402_25V6-K 2 1

3
3

2 1

PC1292
0.22U_0402_25V6-K
@
@

2 1 2 1

@
2 1
+3VS
-X
PC1249

+5VS
PC1242 0.1U_0402_25V6
0.1U_0402_25V6
+VDDC_VDD

Issued Date
Security Classification
+VDDC_VDD

@
@

2 1 2 1
Te
+5VS
+3VS

PC1243 PC1254
0.1U_0402_25V6 0.1U_0402_25V6

@ PC1228
2 1 22U_0603_6.3V6-M
2 1
+2.5V

PC1255
ch
0.1U_0402_25V6 PC1229
PC1310 22U_0603_6.3V6-M
@

2 1 0.22U_0402_25V6-K 2 1
@

2 1
PC1250
0.1U_0402_25V6 PC416
+VDDC_VDD

PC1311 22U_0603_6.3V6-M
0.22U_0402_25V6-K 2 1
2 1
@

2 1 PC534
22U_0603_6.3V6-M

2
2

ni
@

PC1256 PC1312 2 1
+0.6VS

0.1U_0402_25V6 0.22U_0402_25V6-K
2 1 PC535
Deciphered Date
@

2 1 22U_0603_6.3V6-M
@

PC1315 2 1
PC1251 PC1309 2.2U_0402_25V6-K
@

2 1 0.1U_0402_25V6 0.22U_0402_25V6-K 2 1 PC536

+VDDC_VDD

B+
@

PC1085 2 1 22U_0603_6.3V6-M
LC Future Center Secret Data
ca
PC1261 1U_0402_10V6-K PC1314 2 1
@

0.1U_0402_25V6 2 1 2.2U_0402_25V6-K
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

PC1306 2 1 PC537
0.47U_0402_25V6-K 22U_0603_6.3V6-M
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
@
@

2 1 PC1083 2 1 2 1
B+

l
2 1 1U_0402_10V6-K PC1313
B+

PC1258 2 1 2.2U_0402_25V6-K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

PC1262 0.1U_0402_25V6 PC1305 2 1 PC538

1000P_0402_25V7-K 0.47U_0402_25V6-K 22U_0603_6.3V6-M
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
@
@

PC1084 2 1 2 1
1U_0402_10V6-K
@
@

2 1 2 1 PC1304 PC1307 PC539

B+

0.47U_0402_25V6-K 1U_0402_10V6-K 22U_0603_6.3V6-M

@

PC1259 PC1205 2 1 2 1 2 1
2 1 1000P_0402_25V7-K 180P_0402_50V8-J
B+

2 1 PC1308 PC540 PC1207

C

PC1269 PC1303 1U_0402_10V6-K 22U_0603_6.3V6-M 470U_D2_2VM_R4.5M

@

0.1U_0402_25V6 0.47U_0402_25V6-K 2 1 2 1
Size

Date:
2
1
+

2 1
Title
@

2 1
B+

2 1 PC1246
B+

0.1U_0402_25V6
PC1268
1000P_0402_25V7-K

2 1
Document Number
B+
+VDDCR_SOC

PC1257
1000P_0402_25V7-K
+VDDCR_SOC
+VDDCR_SOC
+VDDCR_SOC
+VDDCR_SOC

Saturday, April 14, 2018

1
1

Close to the CPU,Dave

2 1 2 1
B+
B+

PC1266 PC1271
DC/DC CPUCORE(NCP302045)

0.1U_0402_25V6 0.1U_0402_25V6
Sheet
Windu-2 AMD
@

2 1
62
B+

2 1 PC1270
B+

of

1000P_0402_25V7-K
PC1267
1000P_0402_25V7-K
66
eleTro-X Technical

Rev
0.1
A
B
C
D
 5 4 3 2 1

eleTro-X Technical

D D

@ PJ804
JUMP_43X79
2 1
+0.9VALWP 2 1 +0.9VALW

1
PR702
91K_0201_1%

2 1 +0.9VALWP

Ele
2
0_0402_5% @ PR703
FSW=700KHz
+0.9VALW_BST TDC:8A

1
PC1092 OCP:12A

11

10
0.22U_0402_25V6-K PL3105

2
0.68UH_PCMC063T-R68MN_15.5A_20%

BST
CLM
PJ709 +0.9VS
2 1 EMC@ EMC@ +0.9VALW_VIN 1 9 +0.9VALW_SW 1 2 EMC@ EMC@
C B+ 2 1 VIN SW +0.9VALWP C
22U_B2_25VM_R100M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
@ JUMP_43X79 @ PR701

1
2200P_0402_25V7-K

2200P_0402_25V7-K

0.1U_0402_25V6-K
1 10K_0402_1%
+0.9VALW_EN
10U_0603_25V6-K

10U_0603_25V6-K

0.1U_0402_25V6-K

1 1 1 2 15 PU705 PR862

PC1087
EN
1

1
PC1221

PC1096

PC1094

PC707

PC1097

PC1091

PC1093

PC1089

PC1088
+ 0_0201_5%
PC1098

13 +0.9VALW_FB

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
PC1086

PC1099

tro
PR823
FB

1
10K_0402_1% PC1095
+3VALW
2

2
2
2 2 2 1 2 0.1U_0402_16V7-K @ PR705
@

1
PC1316

PC1317

PC1318
NB693GQ-Z_QFN16_3X3 PR711 1K_0201_5% PC1090

2
12 2 1 4.7_0603_5% 220P_0201_25V7-K
PG 1 2 1 2
EMC_NS@

2
PR704

1
@ @ PR706 100K_0201_1%

1
0_0201_5% @
44,65 EC_ON2 2 1 14 16 PR708 PR710
MODE NC2 +0.9VALW_PWRGD 44
499_0201_1% 7.5K_0201_1%
44,60,64,65 EC_ON PR712 VFB=0.6V

1
8.2_0402_5% PC1100 Vout=0.6V*(7.5k/14.3K)=0.91V

2
1 2 3 8 680P_0402_50V7K
+3VALW 3V3 NC1 +0.9VALW_VIN
EMC_NS@

-X
2
+0.9VALW_FB

1
PGND1

PGND2

PGND3

PGND4

PGND5
@ PD701
+0.9VALW_SW

1
10U_0603_25V6-K

1 1SS355VMTE-17
PR709
PC713

14.3K_0402_1% @10.09
2

2
change the PR709 to 14.3K
2 Pin 8 and Pin16 and improve the Output to 0.910V

2
follow MPS suggestion @11/29,add PC1316 and PC1317
@11/29,change PR837 to jump
for SDLE test fail

@11/29,add PR702 change to SD00002380T

@11/29,change PR712 change to 8.2ohm and PC713 to 10UF for input noise

Te
@12/11,change PR709 change to SD00000QM0T

B B

ch
ni
ca
A A

l
Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date DC/DC VCCGFXCORE_I(NCP302035)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 63 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

PJ809

+1.2VP 1
JUMP_43X79
1 2
2 eleTro-X Technical
+1.2V
@

PJ810
JUMP_43X79

D 1 2 D
+1.2VP 1 2 +1.2V
@

@ PJ811
JUMP_43X39
2 1
PJ710 +0.6VSP 2 1 +0.6VS
2 1
B+ 2 1
@ JUMP_43X79 @ PJ812
JUMP_43X39
10U_0603_25V6-K

10U_0603_25V6-K

4700P_0402_25V7-K
+DDR_2.5VP 2 1
+2.5V +1.2VP

10U_0603_25V6-M
2 1
PC1121

PC1108
1 1 1 1

1
PC1111

PC1118

PC1109

22U_B2_25VM_R100M
0.1U_0402_25V7-K 1
@
PC1114
0.22U_0402_25V6-K
PR372,PR373 change to SD00001RB0T TDC= 7.5A
Table PL301

2
2 2 2 2
@ + 1 2 1 2
EDC= 9A

PC1222
PR841 0_0402_5%
NEC TOKIN MPLCH0530LR68G
2 CYNTEC CMLB053T-R68MS
OCP = TBD
+3VALW

Ele
TDK SPM5030T-R68M

10
1
PL3106

BST
VIN
@ 0.68UH_CMLB053T-R68MS_17A_20%
PR848 8 9 1R2A_SW 1 2
8.2_0402_5% VPPIN SW +1.2VP
1 2 3

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

0.1U_0201_6.3V6-K
3V3
2

PC1110 PR844 PU706 13

FB

2
C 22U_0603_6.3V6-M 100K_0201_5% NB687GQ-C669-Z C

PC1103

PC1102

PC1113

PC1120

PC1107

PC1116

PC1117

PC1115

PC1119
1 2 +1.2V_PG 12
1

PG

tro
6

1
PC1104 1 2 1U_0402_6.3V6-K VDDQ PR846 PC1112
AGND_1R2A
@ @ 0_0201_5% 220P_0201_25V7-K
SUSP# PR847 2 1 0_0201_5% +1.2V_EN1 16 2 1 1 2 @ @ @
44,52 SUSP# EN1 5
1A
@ VTT +0.6VSP
SYSON PR838 2 1 0_0201_5% +1.2V_EN2 15
27,44 SYSON EN2

VTTREF
1A

MODE

1
AGND

PGND
11 2
@ VPP +DDR_2.5VP PC1101 PR842 PR839
44,60,63,65 EC_ON PR849 2 1 0_0201_5% 22U_0603_6.3V6-M 499_0201_1% 102K_0201_1%

-X
4

14

7
1

2
1
AGND_1R2A
PR845

Te
100K_0201_1%

0.22U_0402_25V6-K
1

22U_0603_6.3V6-M

22U_0603_6.3V6-M

2
2
PR843

PC1106
@ 0_0201_5%

1
1 2

PC1105

PC1122
PR840 0_0402_5% 1
2

AGND_1R2A
@

ch
B B

AGND_1R2A

AGND_1R2A

@11/29,change PR848 to SD00001L30T

ni
TABLE NB687GQ:EN1/EN2 TABLE NB687GQ:MODE
State EN1 EN2 VDDQ VTTREF VTT VPP State USM Fs Resistor to GND

ca
S0 High High ON ON ON ON M1 NO 700KHz 0
S3 Low High ON ON OFF(High-Z) ON M2 YES 700KHz 90K
S4/S5 Low Low OFF OFF OFF OFF M3 NO 500KHz 150K

l
Others High Low OFF OFF OFF OFF M4 YES 500KHz >230K or Float
A A

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date DC/DC VCCSA(NCP302035)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Saturday, April 14, 2018 Sheet 64 of 66
5 4 3 2 1

eleTro-X Technical
 5 4 3 2 1

eleTro-X Technical

D D

@ PJ813
JUMP_43X39
2 1
+1.8VALWP 2 1 +1.8VALW

+3VALW

2
PR806
100K_0201_5%
+1.8VALW
TDC: 2.6A

1
Fsw: 1MHz
PU707
@2017 1129
PL3107 PC1123 change to SE00000ZH0T

Ele
@ PJ803 RT8068AZQW_WDFN10_3X3 1UH_PH041H-1R0MS_3.8A_20%
+1.8VALWP

4
JUMP_43X39
2 1 VIN_+1.8VALWP 10 1 1.8VALWP_LX 1 2
+3VALW

PG
2 1 PVIN2 LX1

10U_0603_10V
1

2
10U_0603_10V
PC1126
9 2
PVIN1 LX2

2
PC1129
1
8 3 PC1123

2
SVIN1 LX3 PR808 PR853
4.7_0603_5% 102K_0201_1% 68P_0201_25V8-J

2 1
2

2200P_0402_25V7-K
22U_0805_6.3VAM

22U_0805_6.3VAM

0.1U_0402_25V6
@ PC1128,PC816 delete the EMC@

PC816
5 6

GND
EN FB

PC1124

PC1125

PC1128
@ PR810

NC
33K_0402_1%
@

2
1 2 +1.8VALW_EN PC813
44,63 EC_ON2

7
11
tro
C 680P_0402_50V7K C
@

2
1 2

1
@ PR855 PC818
20170629 1M_0201_5% 0.1U_0201_25V6-K
PC1128,PC816 change

1
PD801

2
CUS357 the EMC_NS@ to @ PR854

1
1/20W_51K_1%_0201
PR813
33K_0402_1%

2
1 2
44,60,63,64 EC_ON @128
PR854 SD0435102PT change to SD00002790T for 1%

-X
Te
ch
B B

ni
ca
l
A A

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Windu-2 AMD
eleTro-X Technical
5 4 3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2
Date: Saturday, April 14, 2018
1
Sheet 65 of 66
 5 4 3 2 1

UC1 ZEN7@
H1 H2 H10
PAD_C6P0D3P2 PAD_C6P0D3P2
eleTro-X Technical
PAD_C6P0D2P5

@ @ @

1
S IC RAVEN RIDGE YM270BC4T4MFB 2.2G PR
SA00008ZH00

H5 H3 H4 H11
D pad_D2P8 PAD_C6P0D3P2 PAD_C6P0D3P2 pad_ct6p0shapeb7p0x7p5d2p5 D
UC1 ZEN5@

@ @ @ @

1
S IC RAVEN RIDGE YM250BC4T4MFB 2G BGA PR
H12
SA00008ZJ00
PAD_CT6P0B5P0D2P5

H6
UC1 ZEN3@ PAD_C6P0D2P5 @

1
@

1
S IC RAVEN RIDGE YM230BC4T4MFB 2G BGA PR

Ele
SA00008ZK00
H9
PAD_C6P0D2P5
H7 H8
pad_D2P8 PAD_C5P0D2P5
@

1
ZZZ1
ZZZ2 @ @ H14

1
PAD_CB6P0D2P9

tro
@

1
PCB EA481 NM-B711 NS-B711/B712
C C
DAZ19500100 HDMI LOGO
RO00000040J

H15
PAD_CT6P0B7P6D2P5

U88 AOU_TI@ U88 AOU_PERI@

@

-X

1
S IC SN1702001RTER WQFN 16P USB CHARGING S IC PI5USB2546HZHDEX UQFN CONTROLLER H18
PAD_O3P1X2P1D3P1X2P1N
SA00008HF00 SA000094700

Te
@

1
U148 GSE_BOS@ U148 GSE_KIO@

S IC BMA255 LGA12P G-SENSOR S IC KX022-1020 LGA 12P G-SENSOR

H19 H20 H21 H22

ch
SA00005YJ00 SA000081E00
PAD_SHAPET8P0X11P0CB7P6D2P5 pad_ct6p0shapeb8p0x6p0d2p5
PAD_C6P0D2P5 PAD_CB6P0D2P9

@ @ @ @

1
UTPM1 TPM_INF@ UTPM1 TPM_ST@
B B

H23

ni
PAD_SHAPET8P0X11P0CB7P6D2P5 H24 H25 H26
S IC SLB9670VQ2.0FW7.63 VQFN 32P TPM S IC ST33HTPH2E32AHB4 VQFN 32P TPM 2.0 PAD_O3P1X2P1D3P1X2P1N PAD_C2P3D2P3N pad_o2p1x3p1d2p1x3p1n
SA000075L50 SA000089E10
@

1
@ @ @

1
ca
UC3 ROM_W@ UC3 ROM_M@ H27 H28
pad_o1p1x2p7d1p1X2p7n PAD_O0P9X2P6D0P9X2P6N

@ @

1
S IC FL 128M W25Q128FWSIQ SOIC 8P 1.8V S IC FL 128M MX25U12873FM2I-10G SOP 8P
SA00008E400 SA000089J00

l
PCB Fedical Mark PAD
FD1 FD2 FD3 FD4 FD5 FD6

1
A A

Security Classification LC Future Center Secret Data Title

eleTro-X Technical Issued Date 2014/07/01 Deciphered Date 2015/12/31 SCREW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2 AMD
Date: Monday, April 16, 2018 Sheet 66 of 66
5 4 3 2 1