SWAMI KESHVANAND INSTITUTE OF TECHNOLOGY,

MANAGEMENT& GRAMOTHAN, JAIPUR

ECL-12

LABORATORY MANUAL

COURSE NAME- ELECTRONICS DESIGN LAB

COURSE CODE- 6EC4-23

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

 Electronics Design lab

Table of Content

S. No. Content Page No.

1. Vision, Mission, Quality policy of Institute 3

Vision, Mission of Department 4

2. PEO, PO and PSO 5
3. CO, CO-PO-PSO mapping 6
4. Syllabus 7
5. List of experiments 8
6. Experiments beyond RTU syllabus and their mapping with PO, PSO 9

7. Lab ethics 10

8. Safety measures 11
9. Guideline to simulate circuit in Proteus V.8 environment 12

10. Experiment - 01 13
11. Experiment – 02 17
12. Experiment – 03 22
13. Experiment - 04 27
14. Experiment - 05 30
15. Experiment - 06 38
16. Experiment - 07 43
17. Experiment - 08 49
18. Experiment - 09 54
19. Experiment - 10 58
20. Experiment - 11 64
21. Experiment - 12 67

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Vision, Mission & Quality Policy of Institute

 Vision: To promote higher learning in advanced technology and industrial research

to make our country a global player

 Mission: To promote quality education, training and research in the field of

Engineering by establishing effective interface with industry and to encourage
faculty to undertake industry sponsored projects for students

 Quality Policy: We are committed to ‘achievement of quality’ as an integral part

of our institutional policy by continuous self-evaluation and striving to improve
ourselves.

Institute would pursue quality in

 All its endeavor’s like admissions, teaching- learning processes, examinations,

extra and co-curricular activities, industry institution interaction, research &
development, continuing education, and consultancy.

 Functional areas like teaching departments, Training & Placement Cell, library,
administrative office, accounts office, hostels, canteen, security services, transport,
maintenance section and all other services.”

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Vision and Mission of the Department

 Vision: To evolve the department as a center of excellence in the field of electronics

and communication engineering for enriched education, higher learning, research
and development.
 Mission: To empower students by imparting quality education in electronics and
communication engineering for better employability and preparing them to be
competent in dealing with industrial and societal challenges.

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Program Educational Objectives (PEOs): -

The graduates will be able:
I. To pursue their career successfully in the field of Electronics & Communication
Engineering and advance in their profession.
II. To excel in pursuing higher education and life-long learning.
III. To hold high ethical standards and work effectively in multidisciplinary teams with
strong management and team work skills.

Programme Outcomes (POs):

After completion of UG program students will be able to:
1. Engineering Knowledge: Apply the knowledge of mathematics, science,
engineering fundamentals, and an engineering specialization to the solution of
complex engineering problems.
2. Problem Analysis: Identify, formulate, review research literature, and analyze
complex engineering problems reaching substantiated conclusions using first
principles of mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering
problems and design system components or processes that meet the specified needs
with appropriate consideration for the public health and safety, and the cultural,
societal, and environmental considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of
data, and synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources,
and modern engineering and IT tools including prediction and modelling to
complex engineering activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge
to assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional
engineering solutions in societal and environmental contexts, and demonstrate the
knowledge of, and need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and
responsibilities and norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member
or leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with
the engineering community and with society at large, such as, being able to
comprehend and write effective reports and design documentation, make effective
presentations, and give and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of
the engineering and management principles and apply these to one’s own work, as
a member and leader in a team, to manage projects and in multidisciplinary
environments.
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12. Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of
technological change.

Program Specific Objectives (PSOs)

After completion of UG program students will be able to
1. Understand principles and applications of electronic components, circuits and
devices.
2. Develop proficiency in Electronics and Communication Engineering to enhance
employability skills.

Course Outcomes (COs):

After completion of this Lab course students will be able to:

Course Outcomes

C6EC4-23.1: Define and obtain the parameters of 741 op-amp IC.

C6EC4-23.2: Apply the principle of feedback in op-amp for summing, scaling, inverting
and non-inverting amplification-based applications

C6EC4-23.3 Produce non-sinusoidal waveforms using 555 Timer IC.

C6EC4-23.4: Design oscillators using op-amp and amplifiers using BJT

C6EC4-23.5 Design filters using op-amp and find the frequency response

CO-PO-PSO Mapping
PO PO PO PO PO PO PO PO PO PO PO PO PSO PSO
1 2
1 2 3 4 5 6 7 8 9 10 11 12

CO1
2 3 - - - - - - 3 3 - 3 - 2
CO2
3 3 - 3 - - - - 3 3 - 3 - 3
CO3
2 3 - 3 - - - - 3 3 - 3 - 3
CO4
3 3 - 3 - - - - 3 3 - 3 - 3
CO5
3 3 - 3 - - - - 3 3 - 3 - 3

RAJASTHAN TECHNICAL UNIVERSITY

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Detailed Syllabus B.Tech. ECE VI Sem. 2019-20

6EC4-23: Electronics Design Lab

Class: VI Sem. B.Tech. Evaluation

Branch: Electronics & communication Examination Time = Two(2) Hours
Schedule per Week Maximum Marks = 100
Practical Hrs : 4 Sessional/Mid-term (60) & End term(40)]

S.No. List of Experiments

To design the following circuits, assemble these on bread board and test them and
Simulation of these circuits with the help of appropriate software.
1 Op-Amp characteristics and get data for input bias current measure the output-offset
voltage and reduce it to zero and calculate slew rate.
2 Op-Amp in inverting and non-inverting modes.

3 Op-Amp as scalar, summer and voltage follower.

4 Op-Amp as differentiator and integrator.

5 Design LPF and HPF using Op-Amp 741

6 Design Band Pass and Band reject Active filters using Op-Amp 741.

7 Design Oscillators using Op-Amp (i) RC phase shift (ii) Hartley (iii) Colpitts

8 Design (i) Astable (ii) Monostable multivibrators using IC-555 timer

9 Design Triangular & square wave generator using 555 timer.

10 Design Amplifier (for given gain) using Bipolar Junction Transistor.

Beyond Curriculum Experiments

1 Design a Wein bridge oscillator using op- amp 741.

2 Design a Saw tooth wave generator using op-amp 741.

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List of experiments:
1. To study op-amp characteristics and get data for input bias current, measure the output-
offset voltage and reduce it to zero and calculate slew rate.
2. Design a non-inverting amplifier for Af (gain with feedback) = 11 and an inverting
amplifier for Af (gain with feedback) = (-10) using op-amp 741.
3. Design a summing amplifier for Vo= -2 volt and a scaling amplifier for Vo= -3 volt and
a voltage follower using op-amp 741.
4. i) Design a differentiator to differentiate a triangular input signal using op-amp 741.
ii)Design an integrator to integrate a square wave using op-amp 741.
5. i)Design a first order low pass filter at a cutoff frequency of 1 kHz with a pass band gain
of 6 dB. using op-amp 741.
ii)Design a first order high pass filter at a cutoff frequency of 1 kHz with a pass band gain
of 12 dB using op-amp 741.
6. i) Design a band pass filter with a pass band gain of 12 dB, lower cutoff frequency of
200 Hz and higher cutoff frequency of 1 KHz.
ii)Design a band reject filter with a pass band gain of 6 dB, higher cutoff frequency of
200 Hz and lower cutoff frequency of 1 KHz.
7. i)Design RC Phase shift oscillator of frequency 650 Hz using op- amp IC 741.
ii)Design Hartley oscillator using op-amp IC 741.
iii)Design colpitts oscillator using op-amp IC 741.
8. a)Design astable multivibrator having duty cycle of 60% and frequency of oscillation
is 5 kHz & monostable multivibrator using IC-555 timer.
b) Design monostable multivibrator which generate a 500 milisecond wide pulse using
IC-555.
9. Design triangular and square wave generator of frequency 10 KHz using 555 timer IC.
10. Design a common emitter amplifier of voltage gain AV=6 dB using Bipolar Junction
Transistor.
11. Design a Wein bridge oscillator using op- amp 741.
12. Design a Saw tooth wave generator using op-amp 741.

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Experiments beyond RTU syllabus:

C6EC23.B1 - Design Wein Bridge oscillator using op- amp IC 741.
C6EC23.B2 - Design sawtooth wave generator using op- amp IC 741

Mapping of Beyond Curriculum Topics with PO and PSO

PO PO PO PO PO PO PO PO PO PO PO PO PSO PSO
1 2
1 2 3 4 5 6 7 8 9 10 11 12

B1 3 3 - 3 - - - - 3 2 - 3 - 2

B2 3 3 - 3 - - - - 3 2 - 3 - 2

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LAB ETHICS

DO’S

1. Student should get the record of previous experiment checked before starting the new
experiment.
2. Read the manual carefully before starting the experiment.
3. Before starting the experiment, get circuit diagram checked by the teacher.
4. Before switching on the power supply, get the circuit connections checked.
5. Get your readings checked by the teacher.
6. Apparatus must be handled carefully.
7. Maintain strict discipline.
8. Keep your mobile phone switched off or in vibration mode.
9. Students should get the experiment allotted for next turn, before leaving the lab.

DON’TS

1. Do not touch or attempt to touch the mains power supply wire with bare hands.
2. Do not overcrowd the tables.
3. Do not tamper with equipment’s.
4. Do not leave the lab without permission from the teacher.

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SAFETY MEASURES
1. Avoid direct contact with any voltage source and power line voltage. (Otherwise,
and such contact may subject you to electrical shock).
2. Use insulating materials while working on electrical equipment.
3. Ensure that the power is OFF before you start connecting up the circuit. (Otherwise
you will be touching the live parts in the circuit).
4. Check power chords for any sign of damage and be certain the chords use safety
plugs and do not defeat the safety feature of these plugs by using ungrounded plugs.
5. When using connection leads, check for any insulation damage in the leads and
avoid such defective leads.
6. Do not defeat any Safety devices such as fuse or circuit breaker by shorting across
it. Switch on the power to your circuit and equipment only after getting them
checked up and approved by the staff member.

Guideline to simulate circuit in Proteus V.8 environment

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1. Open PROTEUS software environment.

2.Click on “New Project”.

3. Name your project.

4.Give destination folder for file project.

5. Select “create a Schmatic” from selected template.

6. Select “default” option.

7. Click “next”.

8 . Click “Finish”.

9. Project window will open.

10.Choose “components” from “libraries”and make connection.

11.After completing connections click on “simulate”option.

EXPERIMENT NO.01
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AIM:- To study op-amp characteristics and get data for input bias current, measure the
output-offset voltage and reduce it to zero and calculate slew rate.

APPARATUS REQUIRED:-
• Digital multimeter
• Bread board with power supply (±12V).
• Function generator.

COMPONENTS REQUIRED:-
Capacitor and resistors of desired values, Op-amp IC 741

THEORY:-
• INPUT BIAS CURRENT :

An input bias current is defined as the average of two input currents I B+ and IB- , that is

Where IB+ = DC bias current at non-inverting input and IB- = DC bias current at inverting
input.

Fig.1.1.Circuit for Input Bias Current

The value of input bias current is very small in the range of a few hundred nano-amperes.
It is a DC current. Although this is very small but may cause a significant output offset
voltage in the circuit using relatively large feedback resistors.

• OUTPUT OFFSET VOLTAGE:

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Even though all the components of an op-amp are integrated on the same chip, but
it is impossible to have two transistors in the input stage (Dual input balanced output
differential amplifier) with exactly the same characteristics. Therefore, the collector
currents in two transistors are not same, which provides a differential output voltage from
first stage. This output voltage get amplified by the next stages and gives a significant
voltage at the output of op-amp. This output voltage is named as output offset voltage.
Output offset voltage is a DC voltage may be positive or negative in polarity. This
is depending on the potential difference between two input terminals i.e. positive or
negative.
For better results the output offset voltage should be reduced to zero. When output
offset voltage reduces to zero, the op-amp is then said to be nulled or balanced.

Fig.1.2.Circuit for Output Offset Voltage

• SLEW RATE:
The slew rate is defined as the maximum rate of change of output voltage per unit
of time.

The slew rate actually represents how fast the output of an op-amp changes with the
change in input signal of the op-amp. Slew rate is important factor for the op-amps used in
AC applications. High slew rate is required for better results.
The typical value of slew rate for 741 IC is 0.5ec. This value of slew rate limits the
741C op-amp to use in relatively high frequency applications.

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Fig.1.3.Circuit for slew rate

PROCEDURE:-

1(a) Procedure for input bias current.

• Assemble the circuit on bread board as shown in fig.1.1.
• Measure the value of current in both the input terminal using multimeter.

1(b) Procedure for output offset voltage.

• Assemble the circuit on bread board as shown in fig.1.2.
• Measure the voltage in the multimeter.
• To reduce the output offset voltage to zero, a 10kΩ potentiometer be replaced across
offset null pins 1 and 5 and a wiper be continued to the negative supply pin 4.
• By adjusting the wiper position output offset voltage may be set to zero.

1(c) Procedure for slew rate.

• Assemble the circuit on bread board as shown in fig.1.3.
• Measure the minimum output offset voltage.
• Measure the maximum output voltage.
• Measure the time required to change output from minimum output voltage to
maximum output voltage with the help of CRO.

OBSERVATIONS AND CALCULATIONS:-

1(a) For input bias current.

Current reading from multimeter ( IB-) ………..nA.
Current reading from multimeter ( IB+ ) ………..nA.

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Hence, the input bias current is

or IB = ……………..nA

1(b) For output offset voltage.

Voltage reading from the multimeter (V) = ………….V

1(c) For slew rate

Measured minimum output voltage (VB1) = …………..V
Measured maximum output voltage (VB2) = …………..V
Measured time difference to change output from minimum to maximum value
( t)…………..µsec
Hence, the slew rate is

or SR = ……V/µsec…

RESULT:- Thus we have studied and measured op amp parameters like input bias
current , slew rate , output offset voltage.
Hence the values of the parameters
input bias current:
slew rate:
output offset voltage:

Discussion:
Q.1 What is the value of slew rate for IC741?
Q.2 Offset voltage should be high or low for an op-amp?
Q.3 What is input and output offset voltage?

EXPERIMENT NO. 2
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AIM: Design a non-inverting amplifier for Af (gain with feedback) = 11 and an inverting
amplifier for Af (gain with feedback) = (-10) using op-amp 741.

APPARATUS REQUIRED:

• Function generator
• CRO
• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:
Capacitor and resistors of desired values, Op-amp IC 741

THEORY:

Op-amp can be connected to negative feedback to stabilize gain and increase the frequency
response. The extremely high open loop gain of an op-amp creates an unstable situation
because a small noise voltage on the input can be amplified to a point where the amplifier
is driven out of its linear region. The open loop gain parameter of an op-amp can vary
greatly from one device to the other. Negative feedback takes the portion of output and
applies it back to the input, creating effective reduction in gain. This closed loop gain is
usually much less than the open loop gain.

• Non-Inverting Amplifier:-
The non-inverting amplifier is so connected that the input signal goes directly to the non-
inverting terminal. In this configuration, as the signal moves in either direction, the output
will follow in phase. An op-amp connected in an open loop configuration as a non-inverting
amplifier is shown in fig.2.1 and in closed loop configuration with a controlled amount of
voltage gain is shown in fig.2.2.The input signal is applied to non-inverting (+) input. The
output is applied back to the inverting input through the feedback circuit formed by the
input resistor and feedback resistor.
This creates negative feedback as follows. Resistors form a voltage feedback circuit, which
reduces and connects the feedback voltage to the inverting input. The feedback is expressed
as
VF = ( ) VO

This differential voltage is amplified by the gain of the op-amp and produces an output
voltage expressed as

VO= ) Vi

The closed loop gain of non-inverting amplifier is

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A= (1+ ( ))

Fig. 2.1 Non-inverting op-amp (closed-loop)

Fig. 2.2 Input and output waveform of Non-inverting op-amp

• Inverting Amplifier:-
The input is connected such that the input signal is applied to the inverting terminal.
The non-inverting input is connected to the ground reference. In operation, as the
input signal moves positive, the output will move negative and vice versa. An op-
amp connected in an open loop and closed loop configurations as an inverting
amplifier is shown in fig2.3 & fig2.4.

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Fig. 2.3 Inverting op-amp (closed loop)

Fig. 2.4 Input and output waveform of inverting op-amp

The input signal is applied through a series input resistor to the inverting input. The output
is fed back through the same input. The non-inverting input is grounded.
An expression for the output voltage of the inverting amplifier is written as
VO = - (Rf / R1) Vi
The negative sign indicates that the input and output signals are out of phase by 180.
Therefore it is called inverting amplifier. The gain can be selected by selecting R f and R1
(even < 1).
The closed loop gain of inverting amplifiers is, thus
A= - (Rf / R1)

DESIGN PROCEDURE:

(i) Non-inverting op-amp

Closed loop voltage gain is given by
Af = 1+ Rf / R1 …………….(2.1)

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Since we need to design a non-inverting amplifier for Af (gain with feedback) = 11

By eq. (2.1)
Rf / R1 = 10
So Rf = 10R1
Let R1 = 1kΩ, then Rf = 10 kΩ
(ii) inverting op-amp
Closed loop voltage gain is given by
Af = - (Rf / R1 ) …………….(2.2)
Since we need to design a non-inverting amplifier for Af (gain with feedback) = -10
By eq. (2.2)
- (Rf / R1 ) = -10
So Rf = 10R1
Let R1 = 470Ω, then Rf = 4.7 kΩ

PROCEDURE:

Procedure For Non-Inverting Amplifier With Feedback

 To achieve the desired gain we have to calculate the value of Rf and R1.
 Determine R1 and Rf from the given value of Af.
 Connect the circuit as shown in figure.
 Apply AC input signal from function generator on pin 3 of IC 741.
 Connect CRO at pin 6 of IC 741.
 Apply 1 kHz frequency for ac input signal.
 Observe input and output waveform simultaneously on CRO in dual mode.

2(d) Procedure For Inverting Amplifier With Feedback

 To achieve the desired gain we have to calculate the value of Rf and R1.
 Determine R1 and Rf from the given value of Af.
 Connect the circuit as shown in figure.
 Apply AC input signal from function generator on pin 3 of IC 741.
 Connect CRO at pin 6 of IC 741.
 Apply 1 kHz frequency for ac input signal.
 Observe input and output waveform simultaneously on CRO in dual mode.

RESULT:
We have successfully designed a non-inverting amplifier for Af (gain with feedback) = 11
and an inverting amplifier for Af (gain with feedback) = (-10) using op-amp 741.

Designed parameters are as follows:

Non-inverting amplifier: Af = 11, R1=1 kΩ, Rf = 10 kΩ

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Inverting amplifier: Af = -10, R1 = 470Ω, Rf = 4.7 kΩ.

We have obtained 180° and 0° phase shift in inverting and non-inverting amplifier
respectively.

DISCUSSION:

Q.1 What is the difference between inverting and non-inverting amplifier?

Q.2 Which feedback topology is called inverting amplifier?
Q.3 How gain of non-inverting amplifier can be changed?

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EXPERIMENT NO.03

AIM: Design a summing amplifier for Vo= -2 volt and a scaling amplifier for Vo= -3 volt
and a voltage follower using op-amp 741.

APPARATUS REQUIRED:
• Function generator
• CRO
• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:
Capacitor and resistors of desired values, Op-amp IC 741

THEORY:
SUMMER AND SCALAR
The summing amplifier is used for combining several signals. The summing
amplifier using operational amplifier is used to combine the voltages present on two or
more inputs into a single output voltage.

Fig.3.1.Scalar amplifier in inverting mode

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The transfer function of the above circuit (fig. 3.1) is

VO = ( + + ) Rf

This circuit is known as scalar or weighted amplifier.

If all input resistors are equal, the output is a scaled sum of all inputs. i.e.

If R1=R2 =R3=RF

Then V0 =V1+V2+………VN

VOTAGE FOLLOWER

The circuit in the fig.3.2 demonstrates how the addition of a simple feedback loop
to the open loop amplifier converts it from a device of no usefulness to one with many
practical applications. Analyzing this circuit, we see that the voltage at the non-inverting
input is, the voltage at the inverting input approaches the voltage at the non-inverting input,
and the output is at the same voltage as the inverting input.
Hence, V0=V1
Since no current flows at the non-inverting input, the input impendence of the op-amp is
infinite. The output impedance is just that of the ideal operational amplifier i.e. zero.
Here RF =0 and R1=∞
So V1

Thus,
V1

i.e. VO = V1
Unity gain circuits are used as electrical buffer to isolate circuits or devices from one
another and prevent undesired interaction. As a voltage following power amplifier, this
circuit will allow a source with low current capabilities to derive a heavy load.
The gain of the voltage follower with the feedback loop (closed loop gain) is unity. The
gain of the ideal operational amplifier without a feedback loop (open loop gain) is infinity.
Thus, we have achieved a gain control by adding feedback.

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Fig.3.2. Circuit of Voltage follower

Fig. 3.3 Input and output waveform of voltage follower

DESIGN PROCEDURE:
Summing amplifier
Since Vo = -(RF/R)(V1 + V2 + V3)
In summing amplifier R1= R2= R3=R
So let R1= R2= R3= 3 kΩ, and RF= 1 kΩ;
And given that Vo= -2 volt
Choose V1= 1 volt, V2= 2 volt, V3= 3 volt;
Now Vo= - (1/3)*(1+2+3)
= -2 volt
Scaling amplifier
Since Vo = -( RF /R1 V1 + RF /R2 V2 + RF /R3 V3)
And in scaling amplifier RF/R1 ≠ RF /R2 ≠ RF /R3
Let R1= 1 kΩ, R2= 2 kΩ, R3= 3 kΩ, RF = 1 kΩ;
and Vo= -3 volt
Choose V1= 1 volt, V2= 2 volt, V3= 3 volt;
Now Vo= - (1+1+1) = - 3 volt

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PROCEDURE:
3(a) Procedure for summer
• To achieve the desired output voltage select R1= R2= R3=3 kΩ, RF = 1 kΩ .
• Choose voltages V1= 1 volt, V2= 2 volt, V3= 3 volt.
• Calculate the value of output voltage.
• Connect the circuit as shown in fig.3.1.
• Apply DC input signal of two different values and measure output through
multimeter at output terminal.
• Compare theoretical & practical output values.

3(b) Procedure For Scalar

 To achieve the desired output voltage select R1= 1 kΩ, R2= 2 kΩ, R3= 3 kΩ, RF= 1
kΩ.
 Choose voltages V1= 1 volt, V2= 2 volt, V3= 3 volt.
 Calculate the value of output voltage.
• Connect the circuit as shown in fig.3.1 of scalar or weighted amplifier in inverting
mode.
• Apply DC input signal of two different values and measure output through
multimeter at output terminal.
• Compare theoretical & practical output values.

3(c) Procedure for voltage follower

• Connect the circuit as shown in fig.3.2
• Apply AC input signal (in mV) of 1KHz frequency.
• Observe the output on CRO.
• Repeat step 2 & 3 for different values of input signal.
• Trace input & output waveform.

OBSERVATIONS:
Observation table for scalar or weighted amplifier in inverting mode

S.NO. V1 V2 V3 Vo Vo
(Practical) (Theoretical)
1
2
3

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Observation table for summing amplifier in inverting mode

S.NO. V1 V2 V3 Vo Vo
(Practical) (Theoretical)
1
2
3

RESULT:-
We have successfully designed the op-amp as scalar with Vo= -3V, summer with Vo= -2V
& voltage follower using op-amp 741.

Designed parameters are as follows:

Inverting summer amplifier: R1= R2= R3= 3 kΩ, and RF= 1 kΩ
V1= 1 volt, V2= 2 volt, V3= 3 volt
Inverting scaling amplifier: R1= 1 kΩ, R2= 2 kΩ, R3= 3 kΩ, Rf= 1 kΩ.
V1= 1 volt, V2= 2 volt, V3= 3 volt

We have got the values of the output of voltage follower equal to the input.

Discussion:

Q.1 What is a feedback?

Q.2 List two applications of closed configuration of op-amp.
Q.3 Is there any limitation of scalar and summer circuit? Explain.
Q.4 How can you change the scale factor of the scalar circuit?
Q.5 What is virtual ground concept?
Q.6 Is the voltage follower a special case of the non-inverting amplifier?

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EXPERIMENT NO.04
AIM:-
(i) Design a differentiator to differentiate a triangular input signal using op-amp
741.
(ii) Design an integrator to integrate a square wave using op-amp 741.

APPARATUS REQUIRED:-
• Function generator
• CRO
• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:-
Capacitor and resistors of desired values, Op-amp IC 741

THEORY:-
DIFFERENTIATOR:
A differentiator circuit performs the mathematical operation of differentiation, i.e.
the output waveform is the derivative of the input waveform. The differentiator may be
constructed from a basic inverting amplifier if an input resistor is replaced by a capacitor .
The expression for the output voltage is given as,

Here the negative sign indicates that the output voltage is 180 0 out of phase with the input
signal. The differentiator is most commonly used in wave shaping circuits to detect high
frequency components in an input signal.

Fig.4.1. Circuit diagram of differentiator

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OUTPUT WAVEFORM OF DIFFERENTIATOR

Fig. 4.2 Input and output waveform of differentiator

INTEGRATOR:
A circuit in which the output voltage is the integral of the input voltage is called as the
integrator or the integration amplifier. Such a circuit is obtained by using a basic inverting
amplifier configuration if the feedback resistor is replaced by a capacitor.
The expression for the output voltage can be written as,
dt+ C

Fig.4.3 Circuit diagram of integrator

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Fig. 4.4 Input and output waveform of integrator

PROCEDURE:-
DIFFERENTIATOR:
• Connections are made as per fig.4.1.
• Positive and negative supply is given to the power supply terminal of the Op-Amp
IC.
• By adjusting the amplitude and frequency knobs of the function generator,
appropriate input voltage is applied to the inverting input terminal of the Op-Amp.
• The output voltage is obtained in the CRO and the input and output voltage
waveforms are plotted.

INTEGRATOR:
1. Switch ON the power supply.
2. Apply input from function generator i.e. square wave
3. Connect output of integrator to CRO and observe the waveforms.
RESULT:-
Thus we have designed:
• A Differentiator and got output as square wave for triangular wave as an input.
• An Integrator circuit and got output as triangular wave for square wave as an input.

Discussion:
Q.1 List three applications of:
• The differentiator
• The integrator.
Q.2 What is the basic function of differentiator?
Q.3 What are the limitations of an ideal integrator?
Q.4 What practical modifications are needed to be done to the basic integrator and why?

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EXPERIMENT NO. 5
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AIM:-

 Design a first order low pass filter at a cutoff frequency of 1 kHz with a pass band
gain of 6 dB. using op-amp 741.
 Design a first order high pass filter at a cutoff frequency of 1 kHz with a pass band
gain of 12 dB using op-amp 741.

APPARATUS REQUIRED:-

• Function generator

• CRO

• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:-
Capacitor and resistors of desired values, Op-amp IC 741

THEORY:-

A low-pass filter (LPF) is a filter that passes signals with a frequency lower than a selected
cutoff frequency and attenuates signals with frequencies higher than the cutoff frequency.
RC Passive Filter (low pass filter) can be made using a single resistor in series with a
capacitor connected across a sinusoidal input signal. The main disadvantage of passive
filters is that the amplitude of the output signal is less than that of the input signal, i.e. the
gain is never greater than unity and that the load impedance affects the filters
characteristics.
With passive filter circuits containing multiple stages, this loss in signal amplitude called
“Attenuation” can become quiet severe. One way of restoring or controlling this loss of
signal is by using amplification through the use of Active Filters.
As their name implies, Active Filters contain active components such as operational
amplifiers, transistors or FET’s within their circuit design.
A first-order active low pass filter has the same magnitude and phase response
characteristics as a passive RC filter with the exception of the fact that you can have gain
in the pass band.

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Fig 5.1 Low pass filter

This low pass filter consists of two sections: The first is a passive low pass filter
(using capacitor C1 and resistor R1). The second is an op-amp working in non–inverting
mode.

Voltage Gain of a first-order low pass filter

Voltage gain can be given by the expression as:

Where:
 AF = the pass band gain of the filter, (1 + RF/RG)
 ƒ = the frequency of the input signal in Hertz, (Hz)
 ƒc = the cut-off frequency in Hertz, (Hz) and can be defined by the expression
ƒc =

Thus, the operation of a low pass active filter can be verified from the frequency gain
equation above as-

1. At very low frequencies, ƒ < ƒc

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2. At the cut-off frequency, ƒ = ƒc

3. At very high frequencies, ƒ > ƒc

Thus, the Active Low Pass Filter has a constant gain AF from 0 Hz to the high frequency
cut-off point, ƒC. At ƒC the gain is 0.707AF, and after ƒC it decreases at a constant rate as
the frequency increases. That is, when the frequency is increased tenfold (one decade), the
voltage gain is divided by 10.
In other words, the gain decreases 20dB (= 20 log(10)) each time the frequency is increased
by 10. When dealing with filter circuits the magnitude of the pass band gain of the circuit
is generally expressed in decibels or dB as a function of the voltage gain, and this is defined
as:
Voltage Gain in (dB)
Av(dB) =20 log10

= Af = 1+

HIGH PASS FILTER

A high-pass filter (HPF) is a filter that passes signals with a frequency higher than a
certain cutoff frequency and attenuates signals with frequencies lower than the cutoff
frequency.
The basic operation of a High Pass Filter (HPF) is exactly the same as that for its equivalent
RC passive filter circuit, except that this type of circuit has an operational amplifier
included within its design for amplification and gain control.
A 1st order High Pass Active Filter as its name implies, attenuates low frequencies
at the roll of rate of 20dB/Decade and passes high frequency signals. It consists simply a
passive filter section which is having one pair of RC component followed by a non-
inverting operational amplifier.

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Fig. 5.2 High pass filter

Voltage Gain of a first-order High pass filter

Voltage gain can be given by the expression as:

Where:
 AF = the pass band gain of the filter, (1 + RF/RG)
 ƒ = the frequency of the input signal in Hertz, (Hz)
 ƒc = the cut-off frequency in Hertz, (Hz) and can be defined by the expression
ƒc =

Thus, the operation of a low pass active filter can be verified from the frequency gain
equation above as-

At very low frequencies, ƒ < ƒc

< AF

At the cut-off frequency, ƒ = ƒc

= = 0.707 AF

At very high frequencies, ƒ > ƒc

= AF

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Thus, the Active High Pass Filter has a constant gain AF for very high frequencies,
At ƒC the gain is 0.707AF, and from 0 Hz to lower cut-off point, ƒC gain increases as
frequency increases. That is, when the frequency is increased tenfold (one decade), the
voltage gain is become 10 time.
In other words, the gain increases 20dB each time the frequency is increased by 10. When
dealing with filter circuits the magnitude of the pass band gain of the circuit is generally
expressed in decibels or dB as a function of the voltage gain, and this is defined as:
Voltage Gain in (dB)
Av(dB) =20 log10

= Af = 1+

Design Procedure:
Low Pass Filter
Cutoff frequency of a low pass filter is given by
ƒc =
Since we need to design a filter with cut off frequency of 1 KHz i.e. fc= 1 kHz
Let C1= 0.01µf
By putting the value of fc, and C1, determine R1
R1=15.9 kΩ.
Since pass band gain = 6 dB
So 20 log Af = 6
Af = 2

So Rf = RG
Let Rf =10 kΩ. so RG=10 kΩ
High Pass Filter
Cutoff frequency of a high pass filter is given by
ƒc =
Since we need to design a filter with cut off frequency of 1 KHz i.e. fc= 1 kHz
Let C1= 0.01µf
By putting the value of fc, and C1, determine R1
R1=15.9 kΩ.
Since pass band gain = 12 dB
So 20 log Af = 12
Af = 4

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Af = 1+
So Rf = 3 RG
Let RG=10 kΩ so Rf =30 kΩ.

PROCEDURE:
 To achieve the desired gain we have to calculate the value of A f
 Calculate the value of RG and Rf from the calculated value of Af.
 Calculate the value of R1/C1with the help of desired cut off frequency fc using given
equation. First assume any value of C1/R1 for this.
 Connect the circuit as shown in figure.
 Apply AC input signal on pin 3 of IC 741.
 Observe the output on CRO by varying the frequency of input signal from function
generator.
 Calculate gain in dB using given equation.
 Plot the frequency response curve between gain and frequency.
• Obtain the 3dB point for the frequency response curve.

OBSERVATION:-
Low Pass Filter
Av= 20 log (Vout/Vin)
S.No. Frequency (Hz) Vin(V) Vout(V)
(dB)
1
2
3
4

High Pass Filter

Av= 20 log (Vout/Vin)

S.No. Frequency (Hz) Vin(V) Vout(V)
(dB)
1
2
3
4
5

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FREQUENCY RESPONSE CURVE

5.3 Frequency response of Low pass filter

Fig. 5.4. Frequency response of high Pass filter

RESULT:

Low Pass Filter

We have successfully designed a low pass filter of cut-off frequency 1 kHz with a pass
band gain of 6 dB, using op-amp 741.
Designed parameters are as follows:
fc= 1 kHz, Af= 6dB, C1 = 0.01µf, R1=15.9 kΩ, , Rf = RG =10 kΩ
We have plotted the frequency response curve for the designed filter. As per the frequency
response curve, the output voltage is constant for low frequencies till 1 kHz and then
decreases with frequency. Further, we observed that gain is also constant for lower
frequencies up to 1 kHz and decreasing for higher frequencies.

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HIgh Pass Filter

We have successfully designed a high pass filter of cut-off frequency 1 kHz with a pass
band gain of 6 dB, using op-amp 741.
Designed parameters are as follows:
fc= 1 kHz, Af= 12 dB, C1 = 0.01µf, R1=15.9 kΩ, , Rf =30 kΩ, RG =10 kΩ
We have plotted the frequency response curve for the designed filter. As per the frequency
response curve, the output voltage is increasing for low frequencies till 1 kHz and then
becomes constant with frequency. Further, we observed that gain is also increasing for
lower frequencies up to 1 kHz and constant for higher frequencies.

DISCUSSION:
1. What do you mean by filter ? Why we required filter circuit?
2. Compare active and passive filters.
3. Draw the frequency response curve for low pass filter. Analyze different points on
the curve.
4. What are the limitations of the low pass filter?
5. What is the significance of 3 dB gain in low pass filter?
6. What is the roll off rate of filter? How this rate can be varied?

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EXPERIMENT NO. 06

AIM:-
 Design a band pass filter with a pass band gain of 12 dB, lower cutoff frequency of
200 Hz and higher cutoff frequency of 1 KHz.
 Design a band reject filter with a pass band gain of 6 dB, higher cutoff frequency
of 200 Hz and lower cutoff frequency of 1 KHz.

APPARATUS REQUIRED:-
• Function generator

• CRO

• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:-
IC-741, resistor and capacitor of desired value

THEORY:-

BAND PASS FILTER

A Band Pass Filter is a circuit which allows only particular band of frequencies to pass
through it. This Pass band is mainly between the cut-off frequencies and they are fL and
fH, where fL is the lower cut-off frequency and fH is higher cut-off frequency. The fL value
must always be less than the value of fH. The pass band of the filter is nothing but the
bandwidth of the filter.
When a High Pass Filter is cascaded with Low pass filter the simple Band Pass Filter is
obtained. It uses two amplifying elements (Op-amps) in design. First the signal will pass
through the high pass filter, the output signal of this high pass filter is given to the low pass
filter at the end.

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Fig 6.1 Band pass filter

BAND REJECT FILTER

The band reject is also called a band-stop or band elimination filter. In this filter, frequency
are attenuated in the stopband while they are passed outside this band. The function of a
band stop filter is to pass all those frequencies from zero (DC) up to its first (lower) cut-off
frequency point ƒL, and pass all those frequencies above its second (upper) cut-off
frequency ƒH, but block or reject all those frequencies in-between. Then the filters
bandwidth, BW is defined as: (ƒH – ƒL).

Fig.6.2 Band reject filter

Design parameters
1: Band pass Filter:
Lower cutoff frequency of the above circuit is

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Let C=0.05 µF
fL = 200 Hz (given)
by putting the value of C and fL

R= 15.9 kΩ
Higher cutoff frequency

Let C’ = .01 µF then

R’ = 15.9 kΩ
Pass band gain of band pass filter is the product of gain of HPF and LPF
Since we have used equal resistor values for both LPF and HPF so gain of each LPF and
HPF will become 12/2 = 6 dB
So 20 log Af = 6
Af = 2
Af = 1+
So RF= R1
Let RF =10 kΩ. so R1=10 kΩ
So the band pass filter is designed with parameters as
R= 15.9 kΩ , C=0.05 µF C’ = .01 µF, R’ = 15.9 kΩ Rf =10 kΩ. so R1=10 kΩ

Frequency response:

Fig.6.3 Frequency response of Band Pass Filter

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2: Band Reject Filter

In band reject filter lower cutoff frequency is always higher than higher cutoff frequency
ie. Cutoff frequency of LPF is higher than cutoff frequency of HPF
Since it is given that fL= 1kHz and fH= 200 Hz. These band frequency are interchanged as
it has in case of band pass filter . so we can use the same components but interchanged
between high pass and low pass sections ,which will be
RLP = 15.9 kΩ CLP =0.01µF, RHP =15.9 kΩ, CHP= 0.05µF

As the Pass band gain of band reject filter is same as the gain of individual LPF section and
HPF section.

So 20 log Af = 6
Af = 2
Af = 1+
So Rf = R1
Let Rf =10 kΩ. so R1=10 kΩ

Frequency response

Fig.6.4 Frequency response of band reject filter

PROCEDURE:
1: Band Pass Filter.
 Calculate the value of Af by the given value of gain in dB.
 Calculate the value of Rf , R1 given value of gain.
 Calculate the value of R , C & C’, R’ by the given value of ƒL and ƒH.
 Connect the circuit as shown in fig 6.1.
 Apply AC input signal on pin 3 of IC 741.
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 Connect the CRO with pin 6 of LPF section and observe the output on CRO.
 Trace the frequency response curve by changing the value of frequency of input
waveform.

2: Band Reject filter.

 Calculate the value of Af by the given value of gain in dB
 Calculate the value of Rf , R1 given value of gain
 Calculate the value of R , C & C’ , R’ by the given value of ƒL and ƒH
 Connect the circuit as shown in fig6.2
 Apply AC input signal on pin 3 of IC 741.
 Observe the output on CRO.
 Connect the CRO with pin 6 of LPF section and observe the output on CRO.
 Obtain the 3db point for the frequency response.

RESULT:
 We have designed a band pass filter with a pass band gain of 12 dB, lower cutoff
frequency of 200 Hz and higher cutoff frequency of 1 KHz by choosing parameters
as R= 15.9 kΩ , C=0.05 µF , C’ = .01 µF, R’ = 15.9 kΩ, Rf =10 kΩ. so R1=10 kΩ.
 We have designed a band reject filter with a pass band gain of 6 dB, higher cutoff
frequency of 200 Hz and lower cutoff frequency of 1 KHz.

DISCUSSION :

 How bandwidth of band reject filter can be calculated?

 How Narrow band reject filter can be deigned?
 In which way roll of rate can be increased?
 Why we have to take ƒL greater than ƒH in case of band reject filter?
 What is roll off rate ?
 Why we have to take ƒL less than ƒH in band pass filter ?
 What is the relation between quality factor and bandwidth ?

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EXPERIMENT NO. 7

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AIM:

 Design RC Phase shift oscillator of frequency 650 Hz using op- amp IC 741.
 Design Hartley oscillator using op-amp IC 741.
 Design colpitts oscillator using op-amp IC 741.

APPARATUS REQUIRED:

• Function generator

• CRO

• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:
IC-741, resistor and capacitor and inductor of desired value.

THEORY:

RC PHASE SHIFT OSCILLATOR

An oscillator is basically a feedback amplifier, in which a fraction of the output is fed back
to the input with the use of a feedback circuit. Phase shift oscillator consists of an op-amp
at the amplifying stage and three RC cascade networks as the feedback circuit. The
feedback circuit provides feedback voltage from the output back to the input of the
amplifier. The Op-Amp is used in the inverting mode; therefore any signal that appears at
the inverting terminal is shifted by 180° at the output. An additional 180° phase shift
required for oscillation is provided by the cascade RC networks. Thus the total phase shift
around the loop is 360° or 0°. At some specific frequency when the phase shift of the
cascade RC network is exactly 180° and the gain of the amplifier is sufficiently large, the
circuit will oscillate at that frequency. This frequency is called the frequency of oscillation
and is given by:
f0 =

Also oscillator circuit must satisfy the relation RF = 29 R1

Thus the circuit will produce a sinusoidal waveform of frequency f0, if the gain is 29 and
the total phase shift around the circuit is exactly 360°.

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Fig. 7.1 RC Phase Shift Oscillator

Hartley Oscillator
The Hartley oscillator uses a tank circuit as feedback circuit. The tank circuit of Hartley
oscillator consists of two separate coils in series which are in parallel with a variable
capacitor, C as shown.in fig 7.2
An LC network (tank circuit) consisting of inductive reactance and a capacitive reactance
forms the feedback network and the phase shift through the feedback network is 180°. In
the Hartley oscillator the tuned LC circuit is connected between the output and the inverting
terminal of operational amplifier, so it will produce 1800 phase shift between input and
output so total phase shift in the circuit is 3600.

Fig.7.2 Hartley Oscillator

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The frequency of oscillation of Hartley oscillator is given as

where Lt =L1 +L2 and L1 and L2 are inductance of coils.

Colpitt Oscillator:
The Colpitts oscillator uses a capacitive voltage divider network as its feedback source.
The two capacitors, C1 and C2 are placed parallel to a single common inductor, L as shown
in fig 7.3. Similar to Hartley oscillator, Colpitts oscillator uses tank circuit as feedback
circuit. The tank circuit of Colpitts oscillator consists of two capacitors and one inductor.
The feedback signal is connected to inverting terminal of op-amp, phase shift in inverting
mode of Op amp is 180 and the phase shift through the feedback network is 180°, so total
phase shift in the circuit is 3600.

Fig 7.3. Colpitts Oscillator

The frequency of oscillation of Colpitt oscillator is given as

where Ct= (c1c2 / (c1+ c2))

DESIGN PROCEDURE :

1. RC phase shift oscillator

Given that oscillation frequency is 650 Hz
f0 =

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=
Let C= 0.1 µF
So, R= 1 kΩ
Also, it is known that RF = 29 R1
so let us assume R1 = 33 kΩ
RF= 1M Ω
So we can design the RC phase shift oscillator circuit with the following parameters
c = 0.1 µF, R= 1 kΩ, R1 = 33 kΩ RF= 1M Ω.

2. Hartley oscillator
Given that oscillation frequency is 10 KHz

Let C= 0.1 µF
So Lt become 25.3mH
Hence L1=L2=12.66mH
So we can design the Hartley oscillator circuit with the following parameters
C= 0.1 µF ,L1=L2=12.66mH

3. Colpitt Oscillator
Given that oscillation frequency is 11 KHz

Let C1= 5nF and C2= 20 nF

So L become 50mH
So we can design the Colpitt oscillator circuit with the following parameters
C1= 5nF and C2= 20 nF, L 50mH

OUTPUT WAVEFORM:-

Fig.7.4 Output waveform of RC phase shift oscillator

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Fig.7.5 Output waveform of Hartley oscillator

Fig.7.6 Output waveform of Colpitts oscillator

PROCEDURE:

RC phase shift oscillator

 First we have to calculate The value of R &C of RC network by the expression
ƒo =
 Then calculate the value of RF and R1 using the relation Rf = 29 R1
 Connect the circuit as shown in fig7.1.
 Connect the CRO from pin 6 of the IC- 741
 Observe the output on CRO
 Observe the output waveform and calculate the frequency of the output wave.

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Hartley oscillator
 First we have to calculate the value of L &C of LC network by the expression

 Then calculate the value of RF and R1.

 Connect the circuit as shown in fig7.2.
 Connect the CRO from pin 6 of the IC- 741
 Observe the output on CRO
 Observe the output waveform and calculate the frequency of the output wave.

Colpitts oscillator
 First we have to calculate the value of L &C of LC network by the expression

 Then calculate the value of RF and R1.

 Connect the circuit as shown in fig7.2.
 Connect the CRO from pin 6 of the IC- 741
 Observe the output on CRO
 Observe the output waveform and calculate the frequency of the output wave.

RESULT:
 We have designed RC Phase shift oscillator of frequency 650 Hz using OP- AMP
IC 741.
 We have designed Hartley oscillator of frequency 10 KHz using OP- AMP IC 741.
 We have designed RC Phase shift oscillator of frequency 11KHz using OP- AMP
IC 741.

DISCUSSION:
Q.1 Explain Bark Hausen criteria.
Q.2 Which oscillator is used in audio frequency range?
Q.3 Which type of feedback is used in oscillator?
Q.4 How a square wave is produced using an oscillator?

EXPERIMENT NO. 08 (a)

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AIM:-
Design astable multivibrator having duty cycle of 60% and frequency of oscillation is 5
kHz & monostable multivibrator using IC-555 timer.

APPARATUS REQUIRED:-
• Function generator
• CRO
• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:-
IC-555 and resistor and capacitor of desired value

THEORY:-
Astable operation:
In astable mode, the 555 timer acts as an oscillator that generates a square wave.
The frequency of the wave can be adjusted by changing the values of two resistors and
a capacitor connected to the chip because frequency of wave can be varied by charging and
discharging time of capacitor. Charging time and discharging time is given by

TC= 0.69 (RA+RB) C

TD= 0.69 RB C

Fig.8.2. Astable operation of 555 timer.

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DESIGN PROCEDURE:
Tc= 0.69 (RA+RB) C
TD= 0.69 RB C
Total time period T = 0.69 (RA+2RB) C
The frequency is 1/T which is given as 10 KHz
So 1/0.69 (RA+2RB) C= 10 x 103
Duty cycle is 60%
So = 0.6

= 0.6

By solving above equations

RA= 2.8 kΩ
And RB= 5.6 kΩ

PROCEDURE:
 To achieve the output of desired frequency and duty cycle calculate the suitable
value of resistor RA and RB.

 The make the connection as shown in the figure 8.2.

 Then we can observe output on CRO, measure the frequency.

 Trace the output wave.

RESULT:

Thus we have designed an astable multivibrator of frequency 10 KHz and duty cycle of
60% ,using IC 555 . Design Parameters are C = 0.01 µF , RA= 2.8 kΩ And RB= 5.6 kΩ.

DISCUSSION:
Q.1 Explain the classification of multivibrator.
Q.2 List important features of the 555 timer.
Q.3 Draw the various waveforms of monostable mulivibrator using 555 timer.
Q.4 Draw the functional diagram of astable multivibrator using 555 timer
Q.5 Draw the pin diagram of 555 timer and discuss the function of each pin.

EXPERIMENT NO. 08 (b)

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AIM:-
Design monostable multivibrator which generate a 500 milisecond wide pulse using IC-
555.

APPARATUS REQUIRED:

• Function generator
• CRO
• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:-
IC-555 and resistor and capacitor of desired value

THEORY:-
Mono-stable operation:
In monostable mode, the 555 timer outputs a single pulse of current for a certain length of
time. This is sometimes referred to as a one-shot pulse. Mono stable mode operation
required a trigger pulse at pin 2 which produce a pulse which is quasi stable state of the
circuit, after the some time the pulse return to its stable state.
This time can be calculated from the equation:

Where t is the length of the electrical output in seconds, R is the resistance of the resistor
in Ohms, and C is the capacitance of the capacitor in Farads.

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Fig.8.3 Monostable operation of 555 timer.

DESIGN PROCEDURE:
It is given that required pulse is of 500 millisecond wide
Time period of quasi stable state (time period of required pulse) T= 1.1 R A C
Assume C = 4.7 µF
So RA = 100 KΩ

PROCEDURE:
 To achieve the desired pulse width calculate the value of R A by using formula T=
1.1 RA C

 Then make the connection as shown in the figure.

 Give the trigger input at pin no 2 of IC 555 timer.

 Then we can observe a square wave output on CRO, measure the pulse width .

 Trace the output wave.

RESULT:-

Thus we have designed a monostable multivibrator which generate a 500 milisecond wide
pulse using IC 555 . Design Parameters are C = 4.7 µF and RA = 100 KΩ

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DISCUSSION:

Q.1 Explain the application of monostable multivibrator.

Q.2 How pulse stretching is done in a monostable multivibrator circuit?
Q.3 Draw the various waveforms of monostable mulivibrator using 555 timer.
Q.4 Why triggering is required in monostable operation?

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EXPERIMENT NO. 09
AIM:
Design triangular and square wave generator of frequency 10 KHz using 555 timer IC.

APPARATUS REQUIRED:

• Function generator
• CRO
• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:
IC-555, IC-741, capacitors and resisters of desired value.

THEORY:-
SQUARE WAVE GENERATOR
Square wave generator generates the square wave . A 555 timer IC can be work as a square
wave generator when it is operated in Astable mode as shown in the given below
connection diagram and when charging and discharging time of capacitor is same .
We know charging time TC = 0.693 (RA+ RB).C
And discharging time TD= 0.693 RB C

TC and TD will be same when the resistor RA and RB is same and a diode is connected in
parallel to RB , so that capacitor C charges through RA and diode D, and discharges through
RB.

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Fig.9.1 Square wave generator using 555 timer

DESIGN PROCEDURE:
It is given that square wave is having frequency = 10 KHz
Time period of oscillation of this circuit T= 2 x 0.693 RA C
Frequency of square wave will be = 10 KHz
Assume C = 0.01 µF
So RA = 7.2 KΩ

PROCEDURE:
 To achieve the desired frequency wave calculate the suitable value of resistor RA
and RB ( In this case both are equal)
 Then make the connection as shown in the figure.
 Then we can observe a square wave output on CRO, measure the frequency.
 Trace the output wave.

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TRIANGULAR WAVE GENRATOR

When the square wave is input in the integrator then the output will be triangular wave. So
to obtain triangular wave we have to give output of Square wave generator designed with
IC 555 to the input of an integrator as shown in the figure given below the resultant output
wave will be triangular wave having same frequency of oscillation which the square wave
generator is having.
So the design parameters a will be same as in case of square wave generator.

Fig 9.2: Triangular wave generator

DESIGN PROCEDURE:
It is given that square wave is having frequency = 10 K
Time period of oscillation of this circuit T= 2 x 0.693 RA C
Frequency of square wave will be = 10 KHz
Assume C = 0.01 µF
So RA = 7.2 KΩ

Procedure
To achieve the output wave of desired frequency calculate the suitable value of resistor RA
and RB (In this case both are equal)

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The make the connection as shown in the figure.

Connect the output of 555 timer IC to the input of integrator circuit, as shown in the figure
..
Now observe the output on CRO and measure the frequency.
Trace the required triangular wave.

RESULT:
Thus we have designed a Triangular wave generator of frequency 10 KHz using IC 555. Design
Parameters are C = 0.01 µF and RA = 7.2 KΩ

DISCUSSION:
1. What is the application of 555 timer in astable mode?
2. Define the duty cycle.
3. How can we achieve 50% duty cycle in astable multivibrator?
4. Is it possible to vary Duty cycle of astable multivibrator ?

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EXPERIMENT NO.10
AIM:

Design a common emitter amplifier of voltage gain AV=6 dB using Bipolar Junction
Transistor.

APPARATUS REQUIRED:
• Function generator
• CRO
• Bread board with power supply (±12V).

COMPONENTS REQUIRED:

Capacitor and resistors of desired values

THEORY:

Bipolar junction transistor (BJT) is a two junction, bi-polar, 3-terminal device.

Transistor is the main component in amplifiers, switching circuits, oscillators and logical
circuits. It is also used to match the impedances of source and load.
Depending upon the nature of biasing, the transistor works in one of the three
operating regions, which are as follows:
• Active region: J1 junction is forward biased
J2 junction is reversed biased
• Cut off Region: J1 junction is reversed biased
J2 junction is reversed biased
• Saturation region: J1 junction is forward biased
J2 junction is forward biased
For operating transistor as an amplifier, the junctions are so biased that it must be
operated in active region, while for switching purpose the transistor is biased in cut-off and
saturation region.
The transistor is generally used in common emitter configuration (CE) to design the
amplifier since it shows the highest voltage gain. In common emitter configuration the input
signal is applied between input terminal base B and common terminal emitter E and output
is collected between output terminal collector C and common terminal E.
To use the common emitter configuration as an amplifier we require proper biasing
of the transistor to keep it in active region. Biasing establishes the steady value of collector
current (IC) and collector to emitter voltage (VCE).This steady value of voltage and current
is known as Q point or operating point. The circuit that provides transistor biasing is known
as biasing circuits. There are four type of biasing:
• Base bias or fixed bias.
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• Voltage divider bias or self bias.

• Collector feedback bias.
• Split supply bias.

The most common technique for biasing is a voltage divider biasing technique for
the amplifier. The voltage divider bias configuration is a network which is almost
independent of β of the transistor. This configuration is most stable configuration among
all the biasing configurations.

The voltage gain of common emitter amplifier is given as

Where:
V0=output voltage of amplifier
VI=input signal of the amplifier
AI=Current gain of an amplifier
RC=load resistance of the amplifier
RI=Input resistance of the amplifier
hfe=Small signal current gain
hie=input impedance of the amplifier

If (1+ And then,

Subject to the above approximations, Av is completely stable since it is independent of all

transistor parameters.

Choosing the Collector and Emitter Resistors:

The purpose of the collector resistor RC is to set the collector current Ic as well as the
emitter collector voltage Vce. In other words, RC helps to set the transistor at the operating
point" of the amplifier.
The purpose of the emitter resistor RE is to prevent "thermal runaway". If the emitter
resistor is not present, the collector current might increase as the transistor heats up. As a
result of Ib = Ic /β there is then an increased base current which further heats up the transistor

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until the transistor burns up. At the very least, this effect is a cause of amplifier instability.
As per given:

If Av=6 dB then
So 20 log Av= 6
Av= 2
We consider RE=1KΩ then RC=2 KΩ

The Choice of the Bias Resistors R1 and R2

The bias resistors R1 and R2 essentially work as a voltage divider for the battery voltage
VCC. The values of R1 and R2 are chosen so that the base-emitter junction is biased in the
forward direction at least 0.7 volts since otherwise the transistor will not work.

Fig.10.1 CE bias circuit

A current I0 goes through resistors R1 and R2 and a current Ib just goes through R1 and enters
the base from the connection with R1 and R2. Conservation of current allows us to conclude
the current in R1 is the sum of these currents that is I 0 + IB.

The voltage between the transistor base and the ground is VBE=0.7 volts plus the voltage
across the emitter resistor. From the diagram above, it should be clear this is also the voltage
across the resistor R2.
VE+VBE=I0R2
I0R2=IERE+0.7V
I0R2 =4x1+0.7V=4.7V
R1(I0+IB)+I0R2=VCC
R1(I0+0 .002)+I0R2=12 V
It is a good idea to choose I0>> IB since in this case changes in IB (due to, for example, an
input AC voltage) will not change the bias voltage. Let I0 = 25 IB

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Assuming following parameter:

VBE=0.7V, IC=4mA, VCC=12V, β=200
IB = = =.002mA

Since IB = 0.002 mA in our example means that I0 is

I0=25IB
I0=25 x 0.002=0.5 mA
From equation (i)
R2=4.7/0.5= 9.4 KΩ
From equation (ii)
R1= =14.54 KΩ

Where: Av=2, RE=1 KΩ, RC=2 KΩ, R1=15 KΩ, R2=10 KΩ,C1=10µF ,CC= 10 µF VCC=12V

Fig.10.2 BJT as an amplifier

PROCEDURE:
 Calculate the value of RC and RE from the given gain value of AV.
 Calculate the value of R1 and R2 Register in voltage divider bias by using KVL in
base and emitter circuit.
 Connect the circuit as shown in figure.
 Apply AC input signal in between emitter- base circuit in BJT.
 Observe the output on CRO by changing the amplitude of the input signal.
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 Note the output voltage for given input signal.

OBSERVATION:

Av= Vo/Vi
S.No. Vin(V) Vout(V)

1
2
3
4
5

OUTPUT WAVEFORM:

Fig. 13.2 Input and output waveform of an amplifier

RESULT:

We have successfully designed a common emitter amplifier circuit of voltage gain 6 dB

using bipolar junction transistor.

Designed parameters are as follows:

Av=6 dB, RE=1KΩ, RC=2 KΩ, R1=15 KΩ, R2=10 KΩ,
We have plotted the waveform for the designed value. We observed the output signal for
the given input signal.

DISCUSSION:

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Q.1 What the parameter that are affecting the amplification factor of the transistor?
Q.2 What are the needs of biasing? Why voltage divider biasing used in circuits?
Q.3 Define the different operating region of the transistor and application of that region.
Q.4 What is Q-point or operating point?

EXPERIMENT NO. 11

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AIM: Design wein bridge oscillator using op- amp.

APPARATUS REQUIRED:
• Function generator
• CRO
• Multimeter
• Power Supply with Bread Board (+12V & -12V)

COMPONENT REQUIRED:

COMPONENT NAME TYPE QUANTITY

OP-Amp IC-741 1

Resistor 10kΩ 3

1kΩ 1

Capacitor 0.01µf 2

THEORY:
WEIN BRIDGE OSCILLATOR
The Wein bridge oscillator is designed with the help of two RC networks, one is series RC
network and other one is parallel RC network. These two networks are connected to the
oscillator in the two adjoining arms. In the remaining two arms of the oscillator, resistors
and are connected. The Wein bridge oscillator is shown in fig11.1.
According to Barkhausen Criterion, the total phase shift around the circuit must be 0º or
360º for sustained oscillations. This condition occurs only when the bridge is balanced, that
is, at resonance. The resonant frequency of balanced Wein bridge is the frequency of
oscillation and denoted by .

The feedback network of Wein bridge oscillator consists of two RC networks. Wein bridge
oscillator is the example of RC oscillator and mostly used for audio frequencies. Because
of its simplicity and stability, Wein bridge oscillator is used in many applications.

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Fig11.1Wein bridge oscillator

OUTPUT WAVEFORM:

Fig11.2 Output of Wein bridge oscillator

PROCEDURE:
• Connect the circuit as shown in fig11.1
• Connect the CRO from pin 6 of the IC- 741.
• Observe the output on CRO.
• Observe the output waveform and calculate the frequency of the output wave.

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RESULT:
We have successfully designed Wein bridge oscillator using op-amp & obtained frequency
of oscillation = …………..(Hz).

DISCUSSION:
Q.1 What are the applications of Wein bridge oscillator?
Q.2 What are two conditions for oscillation?
Q.3 Differentiate oscillator and amplifier.
Q.4 Why Wein bridge oscillator is a low frequency oscillator?
Q.5 Explain the working principal of oscillator.

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EXPERIMENT NO. 12
AIM: Design sawtooth wave generator using op-amp.
APPARATUS REQUIRED:
• Function generator
• CRO
• Multimeter
• Bread board with power supply (±12V).

COMPONENT REQUIRED:
COMPONENT NAME TYPE QUANTITY

Op-amp IC-741 1

Resistors 2

Capacitor 1

THEORY:
SAWTOOTH WAVE GENERATOR
Sawtooth waveform is similar to the triangular waveform with a difference that the rise
time and fall time are unequal whereas these times are equal for triangular waveform. It
means that the time required to swing from to and to swing from to are unequal for
sawtooth waveform. The triangular wave generator can be converted into a sawtooth wave
generator by introducing a DC voltage at the non-inverting input terminal of the integrator
circuit. This can be provided by the power supplies and a potentiometer as shown in fig12.1.

The duty cycle the square wave will be determined by the polarity and amplitude of the
DC level at the non-inverting terminal of second op-amp. A duty cycle not equal 50% will
then cause the output to be a sawtooth.

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Fig.12.1Sawtooth wave generator

OUTPUT WAVEFORM:

Fig.12.2 Output waveform of Sawtooth wave generator

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PROCEDURE:
• Assemble the circuit on breadboard as shown in fig.12.1.
• Trace the output waveform on a trace paper from CRO.

• Measure the output pulse width.

OBSERVATION AND CALCULATION:

One cycle period of output waveform, T=................sec.

‘ON’ time of the output waveform = …………sec.

‘OFF’ time of the output waveform = ………….sec.

Duty cycle =…………%

RESULT:
Thus we have designed a sawtooth wave generator and got output as a sawtooth wave.

DISCUSSION:
Q.1 Define the duty cycle.
Q.2 How can we vary duty cycle in sawtooth generator?

Q.3 Explain operating principle of sawtooth generator.

Q.4 What are the formulas for ‘ON’ time, ‘OFF’ time and total time of output of
sawtooth generator.

Q.5 What are the applications of sawtooth generator?

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