In1307 04
In1307 04
Ordering Information
Operating
Device Package Packing
Temperature Range
IN1307N DIP-8 Tube
TA = -40°C ~+85°C
IN1307DT SOP-8 Tape& Reel
for all packages
IN1307D SOP-8 Tube
DESCRIPTION
IN1307 is essentially the binary – decimal digital watch with a calendar, it has the additional
56 bytes of the power self-sufficient static RAM and possesses the low power consumption. The
addresses and data are applied consecutively via the two-wire bi-directional bus. The microcircuit
is intended for count of the real time in hours, minutes and seconds, count of week days, date,
month and year. The last day of the month is automatically adjusted for the months of less, than 31
days, including correction for the leap year. The watches function in the 24-hour format or in the
12-hour format with the AM / PM-indicator. IN1307 has the built-in power supply control circuit,
which determines the supply disruption and automatically switches over the device into the battery
mode.
PIN DISCRIPTION
BLOCK DIAGRAM
X1 X2
Generator RTC
& Divider
SCL
Interface BUS Address
SDA Register
DC ELECTRICAL CHARACTERISTICS
(ТА = –40...+ 85С, VCC = 4.5 – 5.5 V )
Limit
Parameter Symbol Mode Unit
min max
Input leakage current, (SCL only) ILI – – 1 uА
In / Out leakage current,
ILO – – 1 uА
(SDA and SQW/OUT)
1)
Low level output voltage VOL VСС = 4.5 V – 0.4 V
Consumption current in the data
ICCA fSCL = 100 kHz – 1500 µА
transfer mode
Consumption current in the static VСС = 5 V and SDA,
ICCS – 200 µА
mode SCL = 5 V
Consumption current in the battery
VCC = 0 V,
mode IBAT1 – 0.5 µA
VBAT = 3 V
(SQW/OUT OFF., 32 kHz – ON)
Consumption current in the battery
VCC = 0 V,
mode IBAT2 – 0.8 µA
VBAT = 3 V
(SQW/OUT – ON, 32 kHz – ON)
Low level voltage is determined under the load current of 5 mА; VOL = GND under the capacitance load
AC ELECTRICAL CHARACTERISTICS
(ТА = –40...+ 85С, VCC = 4.5 – 5.5 V )
Limit
Parameter Symbol Mode Unit
Min Max
– kHz
Cycle frequency SCL fSCL 0 100
TIMING CHART
FUNCTIONING
IN1307 operates as the driven device on the serial bus. For access to it it is required to set
the status START and to send after the register address the device identification code. It is possi-
ble to address the next register consequently, until the status STOP is set. When VCC drops below
1.25 x VBAT, the access in progress to the device is ceased and the address counter is reset. At
this time the device does not recognize the input data, excluding the erroneous information writing.
When VCC drops below VBAT, the device switches over to the battery mode, consuming low power.
When switching on the power supply VCC above VBAT + 0.2 V, the device switches over from the
battery power supply to VCC; and recognizes the input data, when VCC becomes above 1.25 x VBAT.
OSCILLATOR CIRCUIT
IN1307 uses an external 32.768kHz crystal. The oscillator circuit does not require any exter-
nal resistors or capacitors to operate. Table specifies several crystal parameters for the external
crystal.
CRYSTAL SPECIFICATIONS*
*The crystal, traces, and crystal input pins should be isolated from RF generating signals.
Application Note : Crystal Considerations for Real-Time Clocks for additional specifications. See 12
page.
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of
the match between the capacitive load of the oscillator circuit and the capacitive load for which the
crystal was trimmed. Additional error will be added by crystal frequency drift caused by tempera-
ture shifts. Externalcircuit noise coupled into the oscillator.
Figure shows a functional schematic of the oscillator circuit. If using a crystal with the specified
characteristics, the startup time is usually less than one second.
Information on the time and date is obtained by means of reading the appropriate register
bytes. Hour registers of the real time are indicated in the Figure. Pre-setting and time and calendar
initialization are performed by means of writing the appropriate bytes. Information, contained in the
time and calendar registers, represents the binary-decimal code. Bit 7 of register 0 represents the
hour stop bit (CH). When this bit is set to “1” , the generator is off.
When switching on the power supply, the initial status of all registers is not determined. It is
necessary to enable the generator (bit CH = 0) when setting the initial configurations.
IN1307 operates in the 12-hour or in the 24-hour format. The bit 6 of the watch register de-
termines the operational mode. 12-hour mode corresponds to the high level. In the 12-hour mode
the bit 5 is the AM/PM bit. The high level corresponds to PM. In the 24-hour mode, the 5 is the
second bit of tens of hours (20 -23 hours).
During application of the signal “START” to the two-wire bus there happens transfer of the
real time to the auxiliary set of registers. The time data are read from these auxiliary registers,
while the watch proceeds in operation. This eliminates the necessity of repeated reading in case of
updating the basic registers in the access process.
CONTROL REGISTER
OUT (output control): This bit presets the output logic level of the pin SQW/OUT, when the
output of the rectangular signal is locked.
SQWE (rectangular signal enabling): This bit, pre-set to the logic “1”, activates the generator
output. Frequency of the output rectangular signal is determined by the bits RS0 and RS1.
RS (frequency selection): These bits determine the frequency of the output rectangular signal,
when the output of the rectangular signal is activated. The table indicates the frequencies, which
can be selected by the bits RS.
Frequency
RS1 RS0
SQW/OUT
0 0 1 Hz
0 1 4,096 kHz
1 0 8,192 kHz
1 1 32,768 кГц
IN1307 supports the bi-directional two-wire bus and the protocol of the data exchange. The
bus can be controlled by the “master” device, which generates the cycle signal (SCL), controls ac-
cess to the bus, generates the statuses START and STOP. Typical configuration of the bus with
the two-wire protocol is indicated in Figure.
Data transfer can be initiated only when the bus is not occupied. In the process of the data
transfer the data line should remain stable, while the line of the cycle signal is in the high status.
Status alterations of the data line at that moment, when the cycle line is in the high status, will be
regarded as the control signals.
In compliance with this the following conditions are determined:
Bus not occupied: both the data line and the cycle signal are in the HIGH status.
Data transfer start: Status alteration of the data line during transition from HIGH to LOW,
while the cycle line is in the HIGH status, is determined as the status START.
Data transfer stop: Status alteration of the data line during transition from LOW to HIGH,
while the cycle line is in the HIGH status, is determined as the status STOP.
Valid data: Data line status complies with the valid data, when after the status START the
data line is stable during the HIGH status of the cycle signal. Data on the line should be altered at
the time of the LOW status of the cycle signal. One cycle pulse per one data bit.
Each data transfer starts at the beginning of the status START and ceases at the beginning
of the status STOP. Number of the data bytes, transferred between the statuses START and
STOP is not limited and is determined by the «master» device. Information is transferred byte by
byte, and each receipt is confirmed by the ninth byte. IN1307 operates in the normal mode only
(100 kHz).
Confirmation of receipt: Each receiving device, when it being addressed, has to generate
the recept confirmation after receiving each byte. «Master» device should generate the cycle
pulses, which are allocated in compliance with the confirmation bits.
If the receipt confirmation signal is in the high status, then on arrival of the confirmation cycle
pulse, the device, confirming the receipt, should switch over the SDA line to the low status. Of
course, there should be considered the pre-set time and the hold time. The «master» device
should signalize on completion of the data transfer to the “slave” device, ceasing generation of the
confirmation bit on receiving the receipt confirmation from the “slave” cycle pulse. In this case, the
«slave one should switch over the data line to the low status, in order to enable the «master» one
generate the condition of STOP.
Depending on the status of bit R / W , there are possible two types of transfer:
1. Data are transferred from the «master» transmitter to the «slave» receiver. The first byte,
transmitted by the «master» one, is the address for the «slave» one. Then follows a sequence of
the data bytes. The «slave» one returns the receipt confirmation bytes after each received byte.
Order of the data transfer: the first is the most senior digit (MSB).
2. The data are transferred from the «slave» transmitter to the «master» receiver. The first
byte (address of «slave») is applied to the «master». Then the «master» returns the confirmation
bit. This follows after the transfer by the «slave» of the data sequence. The «master» returns the
receipt confirmation bit after each received byte, with the exception of the last byte. After receipt of
the last byte the receipt confirmation bit is not returned.
The «master» device generates all cycle pulses and the statuses START and STOP. Transfer is
completed at emergence of the status STOP or the repeated emergence of the status START. As
the repeated status START is the beginning of the next serial transfer, the bus is not vacated.The
data transfer order: the first is the most senior digit (MSB).
Serial data and cycles are received via SDA and SCL appropriately. After transfer of each byte the
confirmation bit is sent. The statuses START and STOP are recognized as the beginning and the
end of the serial transfer. The address recognition is performed by means of the hardware after
receipt of the “slave” address and the direction bit. The address byte isthe first byte, received after
occurrence of the START status, generated by the “master”. The address byte contains the seven
address bits of IN1307, equal to 1101000, accompanied by the direction bit ( R / W ), which for write
is equal to 0.After receipt and decoding of the address byte, DS1307 applies confirmation to the
line SDA. After confirmation by IN1307 of the “slave” address and the write bit, the «master» sends
the register address of IN1307. Thus the register indicator will be preset in IN1307. Then the
«smart» shall start to send each data byte with the subsequent receipt confirmation of each byte.
Upon completion of writing the “master” shall formulate the status STOP for termination of the data
transfer.
<Slave Address> <Word Address (n)> <Data (n)> <Data (n+1)> <Data (n+X)>
ss 1101000
1101000 00 AA XXXXXXX
XXXXXXX AA XXXXXXXX
XXXXXXXX AA XXXXXXXX
XXXXXXXX AA XXXXXXXX
XXXXXXXX AA PP
The first byte is received and processed as in the mode of the «slave» receiver. However, in this
mode the direction bit will signify, that the transmission direction is changed. IN1307 sends the se-
rial data by SDA, the cycle pulses - by SCL. statuses START and STOP are understood as the be-
ginning and end of the consecutive transmission. The address byte is the first byte, received after
occurrence of the status START, generated by the «master». The address byte contains the seven
bits of the address IN1307, equal to 1101000, accompanied by the direction bit ( R / W ), which is
equal to 1 for reading. After receipt and decoding of the address byte IN1307 receives confirmation
from the line SDA. Then IN1307 starts to send the data from the address, which is indicated by the
register indicator. If the register indicator is not written prior to initialization of the read mode, then
the first read address is the last address , retained in the register indicator. IN1307 should send the
bit of «non-confirmation», in order to complete the reading.
n byte
R/W R/W
at this moment master- auto increment
transmitter becomes memory word address
master receiver and
IN1363 slave-receiver
becomes slave-transmitter
no acknowledgement
from master
DATA 1 P
last byte
auto increment
memory word
address
Master reads after setting word address (write word address ; read data )
<R/W>
<Slave Address> <Data (n)> <Data (n+1)> <Data (n+2)> <Data (n+X)>
ss 1101000
1101000 11 AA XXXXXXX
XXXXXXX AA XXXXXXXX
XXXXXXXX AA XXXXXXXX
XXXXXXXX AA XXXXXXXX
XXXXXXXX AA PP
S - START
A - ACKNOWLEDGE
P - STOP DATA TRANSFERRED ( X+1 BYTES + ACKNOWLEDGE) :
A - NOT ACKNOWLEDGE LAST DATA BYTE IS FOLLOWED BY A NOT ACKNOWLEDGE( A ) SIGNAL
APPLICATION NOTE
This application note describes crystal selection and layout techniques for connecting a 32,768Hz crystal to a
real-time (RTC). It also provides information about oscillator circuit-design criteria, system design, and manu-
facturing issue.
OSCILLATOR BASICS
The oscillator used in RTCs is a CMOS inverter variation of a Pierce-type oscillator. Figure 1 shows a gen-
eral configuration. These RTCs include integrated load capacitors (CL1 and CL2) and bias resistors. The
Pierce oscillator utilizes a crystal operating in parallel-resonance mode. Crystals used in parallel-resonance
mode will be specified for a certal frequency with a specific load capacitance. For the oscillator to run at the
correct frequency, the oscillator circuit must load crystal with the correct capacitive load.
Figure 1. RTC oscillator with internal load capacitors and bias resistors.
ACCURACY
The frequency accuracy of a crystal-based oscillator circuit is mainly dependent upon the accuracy of the
crystal and the accuracy of the match between the crystal and the oscillator capacitive load. If the capacitive
load is less than the crystal was designed for, the oscillator runs fast. If the capacitive load is greater than
what the crystal was designed for, the oscillator runs slow.
In addition to the errors from the crystal and the load match, crystals vary from their base frequency as the
ambient temperature changes. RTCs use "tuning fork" crystals, which exhibit an error over temperature, as
shown in Figure 2 . An error of 20ppm is equivalent to approximately 1 minute per month.
Note: If better accuracy is required, a TCXO such as the DS32kHz can be used
CRYSTAL PARAMETERS
Figure 3 shows the equivalent circuit for a crystal. Near the resonate frequency the circuit consists of a se-
ries circuit including motional inductance L1, motional resistance R1, and motional capacitance C1. The par-
allel component C O is the shunt capacitance of the crystal.
The load capacitance CL is the capacitive load of the oscillating circuit as seen from the pins of the crystal.
Figure 4 shows CL as a capacitance in parallel with the crystal. The load capacitors used in an oscillator
circuit, CL1 and CL2, plus any stray capacitance in the circuit, combine to create the overall load capacitance.
All RTCs have integrated CL1 and CL2 capacitors. Care should be taken to minimize stray capacitance in
the PC board layout. The following formula shows the relationship between CL and load capacitor values:
Most crystals allow a maximum drive level of 1μW. All RTCs run under 1μW. Drive level may be determined
using the following formula:
Oscillator startup times are highly dependent upon crystal characteristics, PC board leakage, and layout.
High ESR and excessive capacitive loads are the major contributors to long startup times. A circuit using a
crystal with the recommended characteristics and proper layout usually starts within one second.
Note 1: Some devices allow higher ESR values, check the datasheet for specific requirements.
Note: Cylinder-type dimensions are barrel diameter and length, and exclude leads.
All dimensions approximate.
Manufacturer Links
http://www.citizen.co.jp/tokuhan/quartz/Catalog1/Crystals.htm
http://www.eea.epson.com/
http://www.kdsj.co.jp/english.html
http://www.pletronics.com/XTAL.htm#32
http://www.foxonline.com/
http://www.ecsxtal.com/thrucrys.htm
POWER CONSUMPTION
Many RTCs are designed to operate from a battery supply. In a typical application, a small lithium bat-
tery can be used to run the oscillator and clock circuitry while the main supply is off. To maximize battery life,
the oscillator must run using as little power as possible. To accomplish this, some design tradeoffs must be
made.
Negative Resistance
For typical high-frequency oscillator circuits, it is normal for the circuit to be designed with a 5 or 10X
margin for the ESR. Low-frequency crystals typically have higher ESRs. An RTC oscillator may have less
than a 2X margin for negative resistance. An oscillator circuit with a low margin normally consumes less cur-
rent. As a result, an RTC oscillator often is sensitive to relatively small amounts of stray leakage, noise, or an
increase in ESR. The CL of the oscillator circuit influences the power consumption. An RTC with 12.5pF in-
ternal loads consumes more power than one that has 6pF loads. However, the oscillator with 12.5pF load
capacitors is usually less susceptible to noise.
Since the crystal inputs of RTCs have very high impedance (about 109 ), the leads to the crystal act
like very good antenna, coupling high-frequency signals from the rest of the system. If a signal is coupled
onto the crystal pins, it can either cancel out or add pulses. Since most of the signals on a board are at a
much higher frequency than the 32.768kHz crystal, it is more likely to add pulses where none are wanted.
These noise pulses get counted as extra clock "ticks" and make the clock appear to run fast.
The following steps illustrate how to determine if noise is causing the RTC to run fast:
1. Power the system up and synchronize the RTC to a known accurate clock.
2. Turn the system power off.
3. Wait for a period of time (two hours, 24 hours, etc.). The longer the time period, the easier it is to
measure the accuracy of the clock.
4. Turn the system on again, read clock, and compare to the known accurate clock.
5. Resynchronize the RTC to the known accurate clock.
6. Keep the system powered up and wait for a period of time equal to the period in Step 3.
7. Read the clock after waiting for the above period of time and compare it to the known accurate clock.
By using the above steps, the accuracy of the clock can be determined both when the system is pow-
ered up and when the system is powered down. If the clock proves to be inaccurate when the system is
powered up, but is accurate when the system is powered down, the problem is most likely due to noise from
other signals in the system.
However, if the clock is inaccurate both when the system is powered up and when it is powered down,
then the problem is not due to noise from the system. Since it is possible for noise to be coupled onto the
crystal pins, care must be taken when placing the external crystal on a PC board layout. It is very important
to follow a few basic layout guidelines concerning the placement of the crystal on the PC board layout to en-
sure the extra clock ticks do not couple onto the crystal pins.
1. It is important to place the crystal as close as possible to the X1 and X2 pins. Keeping the trace
lengths between the crystal and RTC as small as possible reduces the probability of noise coupling
by reducing the length of the antenna. Keeping the trace lengths small also decreases the amount of
stray capacitance.
2. Keep the crystal bond pads and trace width to the X1 and X2 pins as small as possible. The larger
these bond pads and traces are, the more likely it is that noise can couple from adjacent signals.
3. If possible, place a guard ring (connected to ground) around the crystal. This helps isolate the crystal
from noise coupled from adjacent signals. See Figure 2 for an illustration of using a guard ring
around a crystal.
4. Try to ensure that no signals on other PC board layers run directly below the crystal or below the
traces to the X1 and X2 pins. The more the crystal is isolated from other signals on the board, the
less likely it is that noise is coupled into the crystal. There should be a minimum of 0.200 inches be-
tween any digital signal and any trace connected to X1 or X2. The RTC should be isolated from any
component that generates electromagnetic radiation (EMR). This is true for discrete and module type
RTCs.
5. It may also be helpful to place a local ground plane on the PC board layer immediately below the
crystal. This helps to isolate the crystal from noise coupling from signals on other PC board layers.
Note that the ground plane needs to be in the vicinity of the crystal only and not on the entire board.
See Figure 5 for an illustration of a local ground plane. Note that the perimeter of the ground plane
does not need to be larger than the outer perimeter of the guard ring.
Note that care must be taken concerning the use of a local ground plane because of the stray capaci-
tance that it introduces. The capacitance between the traces/pads and ground plane is added to the internal
load capacitors (CL1 and CL2). Therefore, some factors must be taken into account when considering adding
a local ground plane. For example, the capacitance due to the ground plane can be approximated by the
following equation:
Therefore, to determine if a ground plane is appropriate for a given design, the above parameters must
be taken into account to ensure that the capacitance from the local ground plane is not sufficiently large
enough to slow down the clock.
The first impulse that a designer has when checking for oscillator operation often is to connect an os-
cilloscope probe to the oscillator input (X1) or output (X2) pin. Doing so is not recommended when using a
Real-Time Clock. Since the oscillator is designed to run at low power (which extends operating time from a
battery), loading the oscillator with an oscilloscope probe is likely to stop the oscillator. If the oscillator does
not stop, the additional loading will reduce the signal amplitude, and may cause erratic operation, such as
varying amplitude. Oscillation should therefore be verified indirectly.
Oscillation can be verified several ways. One method is to read the seconds register multiple times,
looking for the data to increment. On RTCs with an OSF (Oscillator Stop Flag), clearing and then monitoring
this bit will verify that the oscillator has started and is continuously running. These methods won’t work if the
designer is troubleshooting a design and cannot communicate with the RTC. An alternate method is to check
the square wave output on RTCs that have a square wave output. Check the datasheet to verify if the RTC
must be written first to enable the oscillator and square wave output. Note that most RTC square wave out-
puts are open-drain, and require a pull up resistor for operation. The square wave output can also be used to
verify the accuracy of the RTC, however, a frequency counter with sufficient accuracy must be used.
Fast Clocks
The following are the most common scenarios that cause a crystal-based RTC to run fast.
1. Noise coupling into the crystal from adjacent signals. This problem has been extensively covered
above. Noise coupling usually causes an RTC to be grossly inaccurate.
2. Wrong crystal. An RTC typically runs fast if a crystal with a specified load capacitance (CL) greater
than the RTC-specified load capacitance is used. The severity of the inaccuracy is dependent on
the value of the CL. For example, using a crystal with a CL of 12pF on an RTC designed with a
6pF CL causes the RTC to be about 3 to 4 minutes per month fast.
Slow Clocks
The following are the most common scenarios that cause a crystal-based RTC to run slow.
1. Overshoots on RTC input pins. It is possible to cause a RTC to run slow by periodically stopping the
oscillator. This can be inadvertently accomplished by noisy input signals to the RTC. If an input sig-
nal rises to a voltage that is greater than a diode drop (~0.3V) above VDD, the ESD protection diode
for the input pin will forward bias, allowing the substrate to be flooded with current. This, in turn,
stops the oscillator until the input signal voltage decreases to below a diode drop above VDD.
This mechanism can cause the oscillator to stop frequently if input signals are noisy. Therefore, care
should be taken to ensure there is no overshoot on input signals.
Another situation that is common to overshoot problem is having an input to the RTC at 5V when the
RTC is in battery-backup mode. This can be a problem in systems that systematically shut down cer-
tain circuits but keep others powered up. It is very important to ensure there are no input signals to
the RTC that are greater than the battery voltage (unless stated otherwise in the device data sheet)
when the device is in battery-backup mode.
2. Wrong crystal. A RTC typically runs slow if a crystal with a specified CL is less than the CL of the
RTC. The severity of the inaccuracy is dependent on the value of the CL.
3. Stray capacitance. Stray capacitance between the crystal pins and/or to ground can slow an RTC
down. Therefore, care must be taken when designing the PC board layout to ensure the stray ca-
pacitance is kept to a minimum.
4. Temperature. The further the operating temperature is from the crystal turnover temperature, the
slower the crystal oscillates. See Figures 3 and 4.
The following are the most common scenarios that cause a RTC to not run.
1. The single most common problem when the clock does not run is that the CH (clock halt) or EOSC
(enable oscillator) bit has not been set or cleared, as required. Many RTCs include a circuit that
keeps the oscillator from running when power is first applied. This allows a system to wait for ship-
ment to the customer, without drawing power from the backup battery. When the system is powered
for the first time, the software/firmware must enable the oscillator and prompt the user for the correct
time and date.
2. Surface mount crystals may have some N.C. (no connect) pins. Make sure that the correct pins from
the crystal are connected to the X1 and X2 pins.
Tuning fork crystals should not be exposed to ultrasonic cleaning. They are susceptible to damage
from resonant vibration.
Crystals should not be exposed to temperatures above their maximum ratings. Exposure to excessive
temperatures may damage the crystal, and usually increase the ESR. Crystal "cans" should not be soldered
to a PC board. This is sometimes done to ground the case of the crystal. Soldering directly to the case of the
crystal usually subjects the unit to excessive temperatures.
RTCs should generally be used in noncondensing environments. Moisture forming around the oscilla-
tor conductors can cause leakage, which can cause the oscillator to stop. Conformal coatings can be used to
protect the circuit, however, conformal coating may by itself cause problems.
Some conformal coatings, especially epoxy-based materials, can have unacceptable levels of ionic
contamination. In addition, conformal coatings can, if the PC board surface is not sufficiently cleaned prior to
conformal coating, cause contaminants to concentrate around leads and traces.
Solder flux residue can cause leakage between pins. RTC oscillator circuits are especially sensitive to
leakage because of their low-power operation. Leakage between the oscillator input and output, or leakage
to ground, often keep the oscillator from running.
PACKAGE DIMENSION
8 5
Dimension, mm
B Symbol MIN MAX
1 4 A 8.51 10.16
B 6.1 7.11
C 5.33
F L
D 0.36 0.56
C F 1.14 1.78
-T- SEATING
PLANE
N
G 2.54
M J H 7.62
G K
H
D
J 0° 10°
0.25 (0.010) M T
K 2.92 3.81
L 7.62 8.26
NOTES:
M 0.2 0.36
1. Dimensions “A”, “B” do not include mold flash or protrusions.
N 0.38
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC
(MS - 012AA)
Dimension, mm
A
8 5 Symbol MIN MAX
A 4.8 5
H B P
B 3.8 4
C 1.35 1.75
1 G 4
D 0.33 0.51
C R x 45
F 0.4 1.27
-T-
SEATING G 1.27
PLANE
D K M
J F H 5.72
0.25 (0.010) M T C M
J 0° 8°
K 0.1 0.25
NOTES:
M 0.19 0.25
1. Dimensions A and B do not include mold flash or protrusion.
P 5.8 6.2
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B ‑ 0.25 mm (0.010) per side. R 0.25 0.5
TEST FIXTURE
for IN1363 & IN1307
Application Note
IK SEMICON
Contents
1. Test fixture overview ................................................................................................................................. 25
1.1. Installing the hardware ..................................................................................................................... 25
1.2. Major Components .......................................................................................................................... 25
1.3. Basic Specification .......................................................................................................................... 27
2. Real Time Clock Program .......................................................................................................................... 28
2.1. Flow Chart ..................................................................................................................................... 28
2.2.1. Initialization Register Setting Up .................................................................................................... 30
2.2.2 Timer Register Setting Up............................................................................................................... 30
2.3 Register Set Up for IN1307 ............................................................................................................... 31
2.3.1. Initialization Register Setting Up .................................................................................................... 31
2.3.2 Timer Register Setting Up............................................................................................................... 31
2.4 Hyper Terminal Configuration ........................................................................................................... 32
3. Example Source for RTC ........................................................................................................................... 34
3.1. Read Current Time from IN1363 & IN1307 ........................................................................................ 34
3.2.Write Set Time for IN1363 & IN1307 ................................................................................................. 34
3.3. I2C Example Source for IN1363 & IN1307 ........................................................................................ 35
4. Test Procedure for RTC ............................................................................................................................. 38
4.1. Test Procedure for IN1363 ................................................................................................................ 38
4.2. Test Procedure for IN1307 ................................................................................................................ 38
Polarity +
Adapter (Main Power DC12V)
Polarity -
IL1307 Backup
Battery
Socket DC3V 2400m A
IN1363 Backup
initial switch Battery
Socket and
PCB should be
aligned in the
Programming same direction.
writing Connector
F H I
IN1307 IN1363
A 32.768KHz
B J
C LED
TP11
TP1
TP2
IN1363
IN1363 SOCKET
SOCKET
TP12 TP3
TP13 SiLabs TP4
D TP14
TP15
TP16
C8051F410 TP5
TP6
TP7
32.768KHz
TP10 TP8
TP9
E IN1307 K
IN1307 SOCKET
SOCKET
MAX3223E
RS232C
F
B. Init Switch
This switch initialize time to 23 July 2012, current time to 14:03:02(IN1363).
C. LED
This LED blinking every 1 seconds. if there is a power on the test fixture.
D. Test Point
In/Output pin of the MCU is connected.
If need the user, use as the test pin.
E. Debugger Connector
This test program exchanges with PC(Personal Computer) through this debugger connector.
G. 32.768KHz
Connection of the standard quartz resonator for the frequency 32.768KHz. IN1363 can operate from external
oscillator with the frequency 32.768KHz
H. IN1307_BAT
If you test the IN1307,Connect Battery on the IN1307_BAT.
I. IN1363_BAT
If you test the IN1363, Connect Battery on the IN1363_BAT
Note: Although the power eliminate, the Real Time Clock is working if the battery is connected on the
IN1307/IN1363_BAT
J. IN1363_SOCKET
To test of IN1363 RTC, it should select IN1363_SOCKET.
K. IN1307_SOCKET
To test of IN1307 RTC, it should select IN1307_SOCKET.
Note: To avoid any confusion by program selector, only one IC should be selected by socket.
Read data
: Address 0x00
ACK received No
12[YY]:07[MM]:23[DD]:14[HH]:03[MM]:02[SS]
Yes
DTE : I2C Error No Ack
Read data
:Address
from 0x02 to 0x8
IN1363 Initialize
Write Data
ACK received No
TEST1 bit = 0;
Address, Data
0x04, 0x14
Address, Data
DTE : Initialize by SW press
0x07, 0x07
Yes
Address, Data
IN1363 Initialize 0x08, 0x12
Write Data
Power ON : IN1307
Read data
: Address 0x00
ACK received No
Yes
DTE : I2C Error No Ack
Read data
:Address
from 0x00 to 0x06
Address, Data
0x02, 0x13
Address, Data
0x03, 0x05
SW Press Yes
Address, Data
0x04, 0x15
Write Data
Address, Data
0x07, 0x00
0x0FH Timer -
For example, we want to set the date for 23 July 2012, current time to 12:03:02, and then we need to call.
0x07H Control
For example, we want to set the date for 23 June 2012, current time to 13:10:05, and then we need to call.
Run the Serial terminal and make sure the baud rate is set correctly at 9600bps
#ifdef IN1363
sbit SCL = P1^7;
sbit SDA = P1^6; //
#endif
#ifdef IN1307
sbit SDA = P0^2;
sbit SCL = P0^1;
#endif
/* Writing a byte to a slave, with most significant bit first. The function returns acknowledgment
bit.*/
unsigned char i2c_write(unsigned char byte)
{
unsigned char mask = 0x80;
unsigned char aaa;
while (mask) {
if (byte & mask)
SDA = 1;
else
SDA = 0;
i2c_clock();
mask >>= 1;
}
aaa = i2c_clock();
return (aaa);
}
/* Reading byte from a slave, with most significant bit first. The parameter indicates, whether to
acknowledge (1) or not (0) */
unsigned char i2c_read(unsigned char acknowledgment)
{
uchar mask = 0x80, byte = 0x00;
while (mask) {
if (i2c_clock())
byte |= mask;
mask >>= 1; /* next bit to receive */
}
if (acknowledgment) {
SDA = 0;
i2c_clock();
SDA = 1;
}
else {
SDA = 1;
i2c_clock();
}
return (byte);
}
}
}
else status = 1;
i2c_stop();
return(status);
}