Course Curriculam

Course Code: CSE207 Credit Units L T P/S SW AS/DS FW No. of PSDA Total Credit Unit
Course Level UG 2 0 2 4 0 0 0 5
Digital Electronics and Computer
Course Title
Organization

Course This course covers combinational and sequential logic circuits. Course of digital electronics is the study of electronic circuits that are used
Description : to process and control digital signals.

Course Objectives :

SN
Objectives
.
This course covers combinational and sequential logic circuits. Course of digital electronics is the study of electronic circuits that are used to process
1
and control digital signals.

Pre-Requisites : General

SN. Course Code Course Name

Course Contents / Syllabus :

SN. Module Descriptors / Topics Weightage

Combinational Logic Modules and their applications, Decoders, encoders, multiplexers, de multiplexers and their
Digital applications; Parity circuits and comparators; Arithmetic modules- adders, subtractors and ALU, Register
1 25.00
electronics Transfer, Bus and Memory Transfers, Arithmetic Micro-operations, Logic Micro-operations, Shift Micro-operations,
Arithmetic Logic shift Unit
Basic
Instruction Codes, Computer Registers, Computer Instructions, Timing and Control, Instruction Cycle,
Computer
2 MemoryReference Instructions, Input-Output and Interrupt, Design of Accumulator Logic. Hardwired and 20.00
Organizations
Microprogrammed control: Control Memory, Address Sequencing, Design of Control Unit
and Design
Introduction, General Register Organization, Stack Organization, Instruction representation, Instruction Formats,
Central Instruction type, Addressing Modes, Data Transfer and Manipulation, Program Control, Reduced Instruction Set
3 20.00
Processing Unit Computer RISC and CISC Computer Arithmetic: Introduction, Multiplication Algorithms, Division Algorithms,
Floating-Point Arithmetic Operations
Memory Hierarchy, Main Memory: RAM and ROM Chips, Address Map, Memory Connection to CPU. Auxiliary
Memory: Disks and Tapes. Associative Memory: Hardware Organization, Match Logic, Read. Operation and Write
Memory Operation. Cache Memory: Associative Mapping, Direct. Mapping, Set-Associative Mapping, Writing into Cache
4 20.00
Organization Initialization. Virtual Memory: Address and Memory Space, Address Mapping, Page Replacement. Intersystem
communication and I/O : Peripheral Devices, Input-Output Bus concept, Bus cycle, Synchronous and
asynchronous transfer, Interrupt handling in PC.
Pipelining,
Parallel Processing, Pipelining, Arithmetic Pipeline, Instruction Pipeline, RISC Pipeline, Vector Processing, Array
Vector
5 Processors. Multiprocessors: Characteristics of Multiprocessors, Interconnection Structures, Interprocessor 15.00
Processing and
Arbitration, Interprocessor Communication and Synchronization.
Multiprocessors

Course Learning Outcomes :

SN. Course Learning Outcomes

1 Upon completion of the course students will be able to : Demonstrate how gate functions are achieved;
2 Use Boolean algebra to define different logic operations;
3 Explain how counting, decoding, multiplexing and clocks are accomplishes with logic devices;
4 Explain how arithmetic operations are achieved with digital circuitry
5 Course will deliver in depth study of pipelining and Multiprocessors
6 Course will the in depth study of memory organization and Intersystem communication
7 Design, implement and evaluate a computer based process, component or programto meet desired needs

Pedagogy for Course Delivery :

SN. Pedagogy Methods

1 Assignments and Tutorials for continuous assessment.
2 Virtual classroom teaching using videos and power point presentations
3 Virtual lab/ orcad for lab

Theory /VAC / Architecture Assessment (L,T & Self Work): 80.00 Max : 100

Attendance+CE+EE : 5+35+60

SN. Type Component Name Marks

1 Attendance 5.00
2 End Term Examination (OMR) 60.00
3 Internal CLASS TEST 15.00
4 Internal Assignment 5.00
5 Internal Viva 5.00
6 Internal CASE STUDY 3.00
7 Internal CLASS QUIZ 3.00
8 Internal Minor Project 4.00

Lab/ Practical/ Studio/Arch. Studio/ Field Work Assessment : 20.00 Max : 100

Attendance+CE+EE : 5+35+60

SN. Type Component Name Marks

1 Attendance 5.00
2 External PRACTICAL 30.00
3 External VIVA VOCE 30.00
4 Internal PERFORMANCE 15.00
5 Internal VIVA VOCE 10.00
6 Internal PRACTICAL / LAB RECORDS 10.00

Lab/ Practical details, if applicable :

SN
Lab / Practical Details
.
1 Simulation using ORCAD
2 To simulate Half Adder circuit
3 To simulate Full Adder Circuit
4 To simulate the logical part of a simple Arithmetic logical Unit
5 To simulate a 4-bit binary adder-subtractor circuit
6 Simulation of one digit BCD Adder.
7 To simulate and study the tristate buffer
8 To simulate the common bus using tri-state buffers and decoder
9 To simulate the common bus using multiplexers.
10 Study of 8085 Microprocessor
11 Study of instruction set of 8085 microprocessor
12 Open Ended program: Designing of various type parser
Project Based Learning Activities:•• Digital Clock Design: Creating a Traffic Light Controller: Designing a 4-bit or 8-bit Microprocessor: Memory
Design and Simulation: Flip-Flop Design and Applications: Creating a Simple ALU (Arithmetic Logic Unit) Designing Logic Gates and Circuits:• Binary
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to BCD Converter• Simple CPU Design:• Pipeline Processor Simulation:• Designing a Digital Calculator:• Building a Simple Computer from Scratch:•
Finite State Machine (FSM) Design• Digital Signal Processing

List of Professional skill development activities :

No.of PSDA : 3
SN. PSDA Point
1 Minor Project
2 CLASS QUIZ
3 Case Study

Text & References :

SN. Type Title/Name Description ISBN/ URL

Morris Mano, Computer System
1 Book Architecture, 3rd Edition – 1999, Prentice-
Hall of India Private Limite
Harry & Jordan, Computer Systems Design
2 Book & Architecture, Edition 2000, Addison
Wesley, Delhi
WIliam Stallings, Computer Organization
3 Book and Architecture, 4th Edition-2000,
Prentice-Hall of India P
Kai Hwang-McGraw-Hill, Advanced
4 Book
Computer Architecture.