22CS206 – DIGITAL COMPUTER

ELECTRONICS

UNIT 4 & LP 13 – Arithmetic Instructions

1. Arithmetic Instructions: Introduction

Arithmetic Instructions in 8085 Microprocessor includes the instructions, which
performs the addition, subtraction, increment or decrement operations. The flag conditions
are altered after execution of an instruction in this group.

Explanation
Opcode Operand of Description
Instruction

The contents of the operand (register

or memory) are added to the
contents of the accumulator and the
Add register result is stored in the accumulator. If
R or memory, the operand is a memory location, its
ADD location is specified by the contents
M to
accumulator of the HL registers. All flags are
modified to reflect the result of the
addition.
Example: ADD B or ADD M

The contents of the operand (register

or memory) and M the Carry flag are
Add register added to the contents of the
R to accumulator and the result is stored
ADC
M accumulator in the accumulator. If the operand is
with carry a memory location, its location is
specified by the contents of the HL
registers. All flags are modified to

1
 reflect the result of the addition.
Example: ADC B or ADC M

The 8-bit data (operand) is added to

Add the contents of the accumulator and
8-bit immediate the result is stored in the
ADI accumulator. All flags are modified
data to
accumulator to reflect the result of the addition.
Example: ADI 45H

The 8-bit data (operand) and the

Add Carry flag are added to the contents
immediate of the accumulator and the result is
8-bit stored in the accumulator. All flags
ACI to
data are modified to reflect the result of
accumulator
with carry the addition.
Example: ACI 45H

The instruction loads 16-bit data in

Reg. Load the register pair designated in the
LXI pair, 16- register pair operand.
bit data immediate Example: LXI H, 2034H or LXI
H, XYZ

The 16-bit contents of the specified

register pair are added to the
contents of the HL register and the
Add register
sum is stored in the HL register. The
Reg. pair to H
DAD contents of the source register pair
pair and L
are not altered. If the result is larger
registers
than 16 bits, the CY flag is set. No
other flags are affected. Example:
DAD H

The contents of the operand (register

or memory ) are subtracted from the
Subtract contents of the accumulator, and the
R register or result is stored in the accumulator. If
SUB memory the operand is a memory location, its
M from location is specified by the contents
accumulator of the HL registers. All flags are
modified to reflect the result of the
subtraction.

2
 Example: SUB B or SUB M

The contents of the operand (register

or memory ) and M the Borrow flag
are subtracted from the contents of
the accumulator and the result is
Subtract placed in the accumulator. If the
R source and
SBB operand is a memory location, its
M borrow from location is specified by the contents
accumulator of the HL registers. All flags are
modified to reflect the result of the
subtraction.
Example: SBB B or SBB M

The 8-bit data (operand) is

subtracted from the contents of the
Subtract accumulator and the result is stored
8-bit immediate in the accumulator. All flags are
SUI
data from modified to reflect the result of the
accumulator subtraction.
Example: SUI 45H

The contents of register H are

Subtract exchanged with the contents of
immediate register D, and the contents of
8-bit
SBI from register L are exchanged with the
data
accumulator contents of register E.
with borrow
Example: XCHG

The contents of the designated

register or memory) are incremented
Increment by 1 and the result is stored in the
R register or same place. If the operand is a
INR memory location, its location is
M memory by
1 specified by the contents of the HL
registers.
Example: INR B or INR M

The contents of the designated

Increment
register pair are incremented by 1
INX R register pair
and the result is stored in the same
by 1
place.

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 Example: INX H

The contents of the designated

register or memory are M
Decrement decremented by 1 and the result is
R register or stored in the same place. If the
DCR operand is a memory location, its
M memory by
1 location is specified by the contents
of the HL registers.
Example: DCR B or DCR M

The contents of the designated

Decrement register pair are decremented by 1
DCX R register pair and the result is stored in the same
by 1 place.
Example: DCX H

The contents of the accumulator are

changed from a binary value to two
4-bit binary coded decimal (BCD)
digits. This is the only instruction
that uses the auxiliary flag to
perform the binary to BCD
conversion, and the conversion
procedure is described below. S, Z,
AC, P, CY flags are altered to reflect
Decimal the results of the operation.
DAA none adjust If the value of the low-order 4-bits in
accumulator the accumulator is greater than 9 or
if AC flag is set, the instruction adds
6 to the low-order four bits.
If the value of the high-order 4-bits
in the accumulator is greater than 9
or if the Carry flag is set, the
instruction adds 6 to the high-order
four bits.
Example: DAA