Isa
Isa
ARCHITECTURE
ISA
An Instruction Set Architecture (ISA) defines the interface between software and
hardware. Software is converted to machine instructions using software
(compiler/interpreter). Then the instructions are executed using hardware.
ISA
ISA (instruction set architecture)
•A well-defined hardware/software interface
•The “contract” between software and hardware
•Functional definition of operations, modes, and storage locations supported
by hardware
•Precise description of how to invoke, and access them
•No guarantees regarding
•How operations are implemented
•Which operations are fast and which are slow and when
•Which operations take more power and which take less
Elements of Instruction
• What are the elements of an instruction?
• On what operands?
Instruction Set
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• One-Address Instructions
ADD M
• Zero-Address Instructions AC ← [AC] + M[AR]
• ADD
• Instruction format example TOS ← [TOS[ + [TOS – 1]
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Zero Operand Instructions Example
• A set of data types (e.g. integers, long integers, doubles, character strings etc.).
• A set of instruction formats. Includes issues like the number of addresses, instruction
length etc.
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Instruction Set
Category
• Data processing instructions : Arithmetic and logic (ALU)
instructions. Changes the form of One or more operands to
produce a result stored in another location
Data manipulation Instructions are 3 types
RIGHT are the same as LOGICAL SHIFT LEFT and LOGICAL SHIFT
RIGHT except that the sign bit it remains unchanged.
• On an arithmetic shift right, the sign bit is replicated into the bit position to its
right. On an arithmetic shift left, a logical shift left is performed on all bits but
the sign bit, which is retained.
3. Circular shifts ROTATE LEFT and ROTATE RIGHT. Bits shifted out at
one end of the word are not lost as in a logical shift but are circulated back into
the other end.
Instruction Set
Category
• Control Instructions : Any instruction that alters the normal
flow of control from executing the next instruction in sequence.
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Sample Instruction
• The opcode size is 6 bits. So, in general, it will have 2^6 = 32 operations.
• There are two bits for addressing modes. Therefore, there are 2^2 = 4 different addressing
modes possible for this machine.
• The last field (8-31 bits = 24 bits) here is the operand or the address of operand field.
• In case of immediate operand the maximum size of the unsigned operand would be 2^24.
• In case it is an address of operand in memory, then the maximum physical memory size
supported by this machine is 2^24 = 16 MB.
The addressing mode is implemented in the instruction in two ways:
1.Implicit: The opcode itself specifies the addressing mode used.
2.Explicit: The mode field is used in the instruction format to specify the type of
addressing mode used.
ADD Adds two registers and stores the result in a register.
ADD r1 r2 ,r3
ADDI is an I-type instruction. This instruction allows you to add the contents of a register to an
immediate value (a constant) and store the result in a register.
ADDI r1 r2 ,I //here I is immediate value
EA = Displacement + CPU Register
An index register in a computer's CPU is a processor register used for modifying operand
addresses during the run of a program, typically for doing vector/array operations
Instruction set design format issues
Some of the basic issues of concern for instruction set design are:
1. Completeness:
• For an initial design, the primary concern is that the instruction set should be
complete which means there is no missing functionality.
• It should include instructions for the basic operations that can be used for
creating any possible execution and control operation.
2. Orthogonal:
• Instructions be orthogonal, that is, not unnecessarily redundant.
An instruction format is used to define the layout of the bits allocated to these
elements of instructions
Design Point
A set of design considerations and their importance
❑leads to tradeoffs in both ISA
Considerations
❑Cost
❑Performance
❑Maximum power consumption and Energy consumption (battery life)
❑Availability
❑Reliability and Correctness
❑Time to Market
◼Design point determined by the “Problem”space (application space), the intended users/market
Design issues
1. Instruction length
Significance: It is the basic issue of the format design. It determines the richness and flexibility of a
machine
Tradeoff: Smaller instruction (less space) Versus desire for a more powerful instruction set
Programmer desire:
• More addressing modes: for greater flexibility in implementing functions like table
manipulations, multiple branching
✓Memory transfer length: instruction length should normally be equal to the data bus length
or multiple of it.
✓Memory transfer: the data transfer rate from the memory ideally should be equivalent to the
processor speed.
• It can become a bottleneck if the processor executes instructions faster than the rate of fetching
the instructions.
Solution: to use cache memory or another solution can be to keep instruction
short.
• Normally an instruction length is kept as a multiple of the length of a character (that is 8 bits), and equal to the length
of fixed-point number (i.e. word). The word size of 16 bit, 32 bit, 64 bit are to be coming very common and hence
the similar length of instructions are normally being used.
2. Allocation of Bits Among Opcode and Operand
• The tradeoff here is between the number of bits of opcode versus the addressing
capabilities.
• Number of addressing modes: Explicit addressing mode requires more bits for mode selection than
implicit mode
• Number of operands: Fewer number of operand references in an instruction although require less bits
yet result in longer programs.
• Register addressing versus memory addresses: The register references require fewer bits in
comparison to the memory addresses
• Granularity of address: As far as memory references are concerned, granularity implies whether an
address is referencing a byte or a word at a time.
• 3. Variable length of instruction
Idea of having a variety of instruction formats of different length
Advantages
• Large number of operations can be provided which have different lengths of instructions.
each instruction fetch is made equal to the size of the longest instruction. Thu some time single fetch multiple
instructions can be used
Example of Instruction format
MIPS 2000
Let's consider the instruction format of a MIPS computer.
MIPS - Microprocessor without Interlocked Pipeline Stages.
• The MIPS CPU has a five-stage CPU pipeline to execute multiple instructions at the same
time: It defines the 5 steps of execution of instructions that may be performed in an
overlapped fashion.
• The compiler has a large and, these days, increasing impact on the performance of
computer systems.
• An optimizing compiler puts a great deal of effort into improving the quality of the
generated machine code.
1. Front end. The front end reads in the source code written by the programmer. It
performs lexical analysis and parsing to get the code into an intermediate form that can be
easily worked with in the rest of the compiler.
5. Assembly. The assembler transforms the assembly language program into machine
instructions ready to be loaded.
Effect of Compiler on the Architecture
• The computer architect must be aware of compiler technology.
• These days, architecture people and compiler people must cooperate to achieve
improved performance.
some examples of problems that might occur when there isn't enough communication
between the hardware and software people: