EEE/ECE 365

Microprocessor & Interfacing

Lecture 17
Serial Communication

Md Rakibul Hasan
Lecturer, Dept. of EEE, BRAC University

Slide Courtesy of Imtiaz Ahmed, Lecturer, Dept. of EEE, BRAC University

Need for Serial Communication
❑ Computer transfers data in two ways: Parallel & Serial
❑ In parallel data transfer, eight or more lines (wire
conductors) are used to transfer data to a device.
❑ Devices that uses parallel data transfer include printers,
Hard disk, etc.
❑ A lot of data can be transferred in a short amount of time,
by using many wires in parallel.
❑ To transfer many meters away, parallel method is costly, so
serial method is used.
Methods of Serial Communication
❑ Serial Communication uses two methods, Synchronous and
Asynchronous.
❑ Synchronous: transfers a block of data (character) at a time. Between
sender and receiver, a synchronization is compulsory. There is no gap
present between data. Fast but costly.
❑ Asynchronous: transfers a single byte at a time. It does not require
synchronization. There’s gap between data. Need start and stop bit.
Economical but slow.
❑ It is possible to write software to use either of the methods, the
program can be tedious and long.
❑ That is why, special IC chips is made by many manufacturers for serial
data communication.
❑ These chips are commonly referred to as Universal Asynchronous
Receiver/Transmitter (UART) or Universal Synchronous-Asynchronous
Receiver/Transmitter (USART)
❑ AVR has built-in USART.
Synchronous vs Asynchronous: https://www.geeksforgeeks.org/difference-between-synchronous-and-
asynchronous-transmission/
Rx and Tx Pins in ATmega32 uC
❑ The ATmega32 has 2 pins that are used specially for
transferring and receiving data.
❑ These pins are called Rx and Tx pins and part of group
port D (PD0 and PD1) of the 40-pin package.
❑ Pin 15 is assigned to Tx and Pin 14 as Rx.
❑ These Pins are TTL compatible that is why they require a
line driver to make them RS232 compatible.
❑ Voltage level of RS232: +/-13V, whereas TTL: 0 to 3.3V/5V
Rx and Tx pins
Protocol
❑ The data coming in at the receiving end of the data line
in a serial data transfer is all 1s and 0s.
❑ So, it is difficult to make sense of the data unless the
sender and the receiver agree on a set of rules, called
Protocol, on
❑ how the data is packed,

❑ how many bits constitute a character, and

❑ how the data begins and ends.

Asynchronous Communication and
Data Framing
❑ When there is no transfer the signal is high
❑ Transmission begins with a start (low) bit
❑ LSB first
❑ Finally 1 stop bit (high)
❑ Data transfer rate (baud rate) is stated in bps
Data Frame
❑ In Asynchronous serial communication, peripheral chips
or modem can be programmed for data that is 7 bit or
8 bit wide.
❑ This is in addition of stop bits, 1 or 2.
❑ In present days, 10 bits for each character is
transmitted: 8 bits for each ASCII code, and 1 bit for
each start and stop bits.
❑ Therefore each 8 bit requires 2 extra bits, which gives
25% overhead.
Parity Bit
❑ In some systems, the parity bit of the data byte is
included in the data frame in order to maintain data
integrity.
❑ This parity bit is odd or even.
❑ In the case of odd parity number of 1s in the data byte
including the parity bit is odd.
❑ Similarly for even parity, number of 1s in the data byte
including the parity bit is even.
❑ UART/USART chips can be programmed for odd, even
or no-parity options.
Data Transfer Rate
❑ The rate of data transfer in serial communication is
called bits per second (bps).
❑ Another widely used terminology is called baud rate.
❑ Baud rate is defined as the number of signal units (Baud)
per second. Each signal unit consists of multiple bits.
❑ As far as conductor wire is concerned, the baud rate and
bps are the same and for this reason we shall use them
interchangeably.
USART modes in AVR
❑ In four mode:
❑ Normal asynchronous

❑ Double-speed asynchronous

❑ Master synchronous

❑ Slave synchronous
Registers used for Serial
Communication
❑ UDR (USART Data Register)
❑ UCSRx (USART Control and Status Register);
[x=A, B or C]
❑ UBRR (USART Baud Rate Register)
 UBRR Register and Baud Rate in
AVR
❑ Some of the baud rates supported by PC are 1200, 2400,
4800, 9600, 19200, 38400, 57600, and 115200
❑ AVR transfers and receives data in different baud rate
and its baud rate is programmable.
❑ This is done by USART Baud Rate Register (UBRR).
❑ For a given crystal frequency, the value of UBRR decides
the baud rate.
 The Relationship Between Baud Rate
and the Value in UBRR register
❑ The relationship between the baud rate and the UBRR
register value is given by:

Fosc
Desired Baud Rate =
16 ( X + 1)
Where, X=Value in UBRR Register

❑ In order to get the values of ‘X’ for different baud rate we

can solve the above equation, it gives,

Fosc
X = −1
16 ( Desired Baud Rate)
UBRR Values corresponding to Baud
Rate (Fosc=16MHz)

Baud Rate UBRR (Decimal UBRR (Hex

Value) Value)
38000 25 19
19200 51 33
9600 103 67
4800 207 CF
2400 415 19F
1200 831 33F
 UBRR Register
f osc f osc
BR = X = −1
16 ( X + 1) 16 ( BR)
U2X
f osc
UBRR (X)
( X + 1)

Prescaling
f osc /2 /4 /2 0
Down Counter
1

With the selection of U2X bit (of UCSRA register -

will be discussed later) the last block can be
bypassed.That means the baud rate can be doubled.
UBRR Register

URSEL UBRR UBRR UBRR UBRR

-- -- --
11 10 9 8

UBRR UBRR UBRR UBRR UBRR UBRR UBRR UBR0

7 6 5 4 3 2 1 0

❑ UBRR is a 16-bit register but only 12 bits are used to set

baud rate of USART of AVR
❑ Bit 15 is URSEL used for selection between UBRRH and
UCSRC; 0-UBRRH & 1-UCSRC
UCSRx Registers
❑ UCSRx are 8-bit Control registers used for controlling
serial communication in the AVR.
❑ There are three USART Control registers in the AVR.
❑ They are UCSRA, UCSRB and UCSRC.

UCSRA
RXC TXC UDRE FE DOR PE U2X MPCM
UCSRA Register
UCSRA Register

RXC TXC UDRE FE DOR PE U2X MPCM

❑ RXC – USART receive complete

❑ TXC – USART transfer complete
❑ UDRE – USART data register is empty.
❑ FE – Frame Error
❑ DOR – Data Overrun
❑ PE – Parity Error
❑ U2X – Double the USART transmission speed
❑ MPCM – Multi- Processor Communication Mode
RXC and TXC bits in UCSRA
register
❑ RXC – USART Receive Complete
❑ This flag is set when there are new data in the receive
buffer that are not read yet.
❑ It is cleared when the receive buffer is empty.

❑ TXC – USART Transmit Complete

❑ This flag is set when entire frame in the transmit shift
register has been transmitted and there are no new data
available in the transmit data buffer register.
UDRE and FE bits in UCSRA register
❑ UDRE – USART Data register empty
❑ This flag is set when the transmit data buffer is empty
and it is ready to receive new data.
❑ This flag can generate a data register empty interrupt.

❑ FE – Frame Error
❑ This bit is set if a frame error has occurred in receiving
next character in the receive buffer.
❑ A frame error is detected when the first stop bit of
the character in the receive buffer is zero.
DOR and PE bits of UCSRA register
❑ DOR – Data Overrun
❑ This bit is set if data overrun is detected.

❑ A data overrun occurs when the receive data buffer

and receive shift register are full and a new start bit is
detected.
❑ PE – Parity Error
❑ This bit sets if the parity checking was enabled
(UPM1=1 in UCSRC register) and the character in
the receive buffer had a parity error when received
U2X and MPCM bits in UCSRA
register
❑ U2X – Double the USART transmission speed
❑ Setting this bit will double the transfer rate in
asynchronous communication.
❑ MPCM – Multi-processor Communication
mode
❑ This bit enables the multi-processor communication
mode.
❑ To understand this feature you may consult the data
sheet.
UCSRB Register
UCSRB Register

RXCIE TXCIE UDRIE RXEN TXEN UCSZ2 RXB8 TXB8

❑ RXCIE – Receive Complete Interrupt Enable

❑ TXCIE – Transfer Complete Interrupt Enable
❑ UDRIE – USART Data Register Empty Interrupt Enable
❑ RXEN – Receive Enable
❑ TXEN – Transfer Enable
❑ UCSZ2 – Character Size
❑ RXB8 – Receive Data bit 8
❑ TXB8 – Transmit Data bit 8
RXCIE and TXCIE bits of UCSRB
Register
❑ RXCIE – Receive Complete Interrupt Enable
❑ To enable the interrupt on the RXC flag in UCSRA
register you should set this bit to one.
❑ TXCIE – Transmit complete Interrupt Enable
❑ To enable the interrupt on the TXC flag in UCSRA
register you should set this bit to one.
UDRIE, REN and TEN bits in UCSRB
Register
❑ UDRIE – USART Data Register Empty Interrupt
Enable
❑ To enable the interrupt on UDRE flag in UCSRA
register you should set bit to one.
❑ RXEN – Receive Enable
❑ To enable USART Receiver enable you should set this
bit to one.
❑ TXEN – Transmit Enable
❑ To enable USART transmitter enable you should set
this bit to one.
UCSZ2, RXB8 and TXB8 bits in
UCSRB Register
❑ UCSZ2 – Character Size
❑ This bit combined with UCSZ0:1 bits in UCSRC register
sets the number of data bits (character size) in a frame.
❑ RXB8 – Receive data bit 8
❑ This is the 9th bit of received character when using serial
frame with 9 data bits. This case will not be discussed in
our course.
❑ TXB8 – Transmit data bit 8
❑ This is the 9th bit of the transmitted character when
using serial frame with 9 data bits. This case will not be
discussed in our course.
UCSRC Register
UCSRC Register
URSEL UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL

❑ URSEL – Register Select

❑ UMSEL – USART mode Select

❑ UPM1:0 – Parity Mode

❑ USBS – Stop bit select

❑ UCSZ1:0– Character Size

❑ UCPOL – Clock Polarity

URSEL and UMSEL bits of
UCSRC Register
❑ URSEL – Register Select
❑ This bit used to access either the UCSRC register or
UBRRH register.
❑ UMSEL – USART Mode Select
❑ This bit selects either to operate in Asynchronous or
in Synchronous mode.
❑ 0 = Asynchronous and

❑ 1 = Synchronous
UPM1:0 and USBS bits in UCSRC
Register
❑ UPM 1:0 – Parity Mode
00 = Disabled
01 = Reserved
10 = Even parity
11 = Odd parity
❑ USBS – Stop bit select
0 = 1 bit
1 = 2 bits
UCSZ1:0 and UCPOL bits in UCSRC
Register
❑ UCSZ1:0 – Character Size
❑ These two bits along with UCSZ2 in USCRB register are
used for setting the character size.

UCSZ2 UCSZ1 UCSZ0 SIZE

0 0 0 5
0 0 1 6
0 1 0 7
0 1 1 8
1 1 1 9

❑ UCPOL – Clock Polarity

❑ This is for Synchronous mode only, will not be covered.
 Summary of the Registers
Data

UDR7 UDR6 UDR5 UDR4 UDR3 UDR2 UDR1 UDR0

UBRR11 UBRR10 UBRR9 UBRR8

Baud Rate

URSEL -- -- --

UBRR7 UBRR6 UBRR5 UBRR4 UBRR3 UBRR2 UBRR1 UBR08

UCSRA Register
RXC TXC UDRE FE DOR PE U2X MPCM
Control

UCSRB Register
RXCIE TXCIE UDRIE RXEN TXEN UCSZ2 RXB8 TXB8
UCSRC Register
URSEL UMSEL UPM1 UPM0 USBS UCSZ1UCSZ0 UCPOL
An Example Program for Receiving
and Transmitting data (using USART’s
Transmit/Receive)
Write a C program for the AVR to receive data at baud rate of
9600 baud continuously and transmit back the data three
times. Use 8-bit data, 1 stop bit and no parity. Assume
XTAL=16 MHz.
 8-bit data. So, UCSZ2:0=011
 1 stop bit. So, USBS=0
 No parity. So, UPM1:0=00;
 Baud rate=9600. So, for fosc=16MHz, X=0x0067; So,
UBRRH=0x00 and UBRRL=0x67
 We have to enable Receive. So, RXEN=1
 We have to enable Transmit. So TXEN=1
Interfacing Circuit
Settings in the Proteus Virtual
Terminal
 #include <mega32.h> void main()
{
unsigned char data; // to set the Baud rate to 9600
UBRRH=0x00;
//function to receive data UBRRL=0x67;
unsigned char uart_receive () UCSRB= (1<<RXEN) |
{ (1<<TXEN);
while(!(UCSRA&(1<<RXC))); UCSRC=(1<<URSEL) |
// wait until 8-bit of a character is (1<<UCSZ1) | (1<<UCSZ0) ;
The Code

received while(1){
return UDR; data=uart_receive();
} // uC will wait infinitely to
get a 8-bit character
//function to transmit data // the functions below will
void uart_transmit (unsigned char data) print every character three
{ times
while (!( UCSRA & (1<<UDRE))); uart_transmit(data);
// wait for the UDR to be empty uart_transmit(data);
UDR = data; uart_transmit(data);
} }
}
Thanks

12 December 2022 37