Signal Conditioning and Data Acquisition Circuits -Dr.

H N Suresh

B.E. Electronics and Instrumentation Engineering (EI)

Choice Based Credit System (CBCS)
Semester – IV
Signal Conditioning and Data Acquisition Circuits
(Common to EI, BM & ML)

Subject Code : 18 EI/BM/ML42

Bangalore Institute of Technology

Dept.of Electronics and Instrumentation Engineering
V V PURAM,BENGALURU-04

Affiliated to

Prepared by
Dr.H N Suresh
Professor and Research coordinator
Module -5
Data Acquisition Systems: Types of instrumentation systems, Components of analog data
acquisition system, Digital data acquisition system. Data Converters: Digital to Analog
Converters: Basic DAC techniques, Weighted Resistor,DAC, R – 2R Ladder DAC, DAC
0800 (Data sheet: Features and description only).
Analog to Digital Converters: Functional diagram of ADC, Flash ADC, Counter type ADC,
Successive approximation ADC, Dual slope ADC. ADC 0809 (Data sheet: Features,
specifications and description only), DAC/ADC specifications.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

Data Acquisition Systems

The systems, used for data acquisition are known as data acquisition systems. These data
acquisition systems will perform the tasks such as conversion of data, storage of data,
transmission of data and processing of data.

Data acquisition systems consider the following analog signals.

• Analog signals, which are obtained from the direct measurement of electrical quantities
such as DC & AC voltages, DC & AC currents, resistance and etc.

• Analog signals, which are obtained from transducers such as LVDT, Thermocouple &
etc.

Types of Data Acquisition Systems

Data acquisition systems can be classified into the following two types.

• Analog Data Acquisition Systems

• Digital Data Acquisition Systems

Now, let us discuss about these two types of data acquisition systems one by one.

Analog Data Acquisition Systems

The data acquisition systems, which can be operated with analog signals are known as analog
data acquisition systems.

Transducer − It converts physical quantities into electrical signals.

• Signal conditioner − It performs the functions like amplification and selection of

desired portion of the signal.

• Display device − It displays the input signals for monitoring purpose.

• Graphic recording instruments − These can be used to make the record of input data
permanently.

• Magnetic tape instrumentation − It is used for acquiring, storing & reproducing of

input data.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

Digital Data Acquisition Systems

The data acquisition systems, which can be operated with digital signals are known as digital
data acquisition systems. So, they use digital components for storing or displaying the
information.

Mainly, the following operations take place in digital data acquisition.

• Acquisition of analog signals

• Conversion of analog signals into digital signals or digital data

• Processing of digital signals or digital data

• Transducer − It converts physical quantities into electrical signals.

• Signal conditioner − It performs the functions like amplification and selection of

desired portion of the signal.

• Multiplexer − connects one of the multiple inputs to output. So, it acts as parallel to
serial converter.

• Analog to Digital Converter − It converts the analog input into its equivalent digital
output.

• Display device − It displays the data in digital format.

• Digital Recorder − It is used to record the data in digital format.

Data acquisition systems are being used in various applications such as biomedical and
aerospace. So, we can choose either analog data acquisition systems or digital data acquisition
systems based on the requirement.

Types of instrumentation systems

The instruments, which are used to measure any quantity are known as measuring instruments.
This tutorial covers mainly the electronic instruments, which are useful for measuring either
electrical quantities or parameters.

Digital to Analog Converters:

Basic DAC techniques: Weighted Resistor DAC

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

The following figure shows the circuit diagram of weighted resistor DAC. This DAC circuit
uses weighted values of resistor like 2R, 4R, 6R, 8R and so on depending on the digital inputs
available therefore such type of network is known as weighted resistor DAC.

This circuit consists of a transistor switch (shown by the upward arrow) which turns on the
switch when the digital input is ‘1’ and if digital input becomes ‘0’ it will open the switch.
When transistor switch gets closed, current flows through the weighted resistor due to the
reference voltage as shown in circuit diagram.

When all such currents from different weighted resistors get added at summing point (which is
also known as a virtual ground) of the operational amplifier it will produce a proportional
voltage as its output.

For a 4 bit DAC, the output V0 is given as follows

Where S3, S2, S1 and S0 represents the status of the switches i.e. on or off (1 or 0). If resistors
are in binary weights i.e. R3=2Rf, R2=4Rf, R1=8Rf and R0=16Rf, the above equation can be
written as,

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

From the above discussion, we can say that for a 4 bit DAC 4 switches produces 16 different
combinations of output and hence produces 16 different output voltage.in general n-bit DAC
produces 2^n different discrete analog voltages.

R – 2R Ladder DAC:

It works by the principle of superposition where switching on binary inputs adds more voltage
at the output.

Here is a diagram of one showing binary inputs and analogue output.

The above ladder is just 4 bits long but you can extend it to any length (the limiting factor is
the accuracy of the resistors).Using a ladder network is a common way of creating an 8 bit
DAC (Digital to Analogue Converter) as each control bit contributes to a binary weighted
output voltage. However, for a highly accurate DAC, the resistors will be laser trimmed and
located inside a chip. The ladder is still a useful construct to use as you can create a very cheap
8 bit DAC if you are not too worried about accuracy ( using 1% resistors will allow fairly good
output).

R-2R ladder analysis: It uses Kirchhoff’s current law which states that the sum of
currents entering a node must be equal to the sum of the currents leaving a node. In the ladder,
at each node, the current is split in half. By switching the currents into each node the total
current flowing is binary weighted. Using the principle of superposition when you add more
current into a resistance the total voltage appearing is the sum of the voltages caused by all the
individual currents i.e. as each bit is activated so the voltage increases at the output. Another
clever thing about the R-2R ladder, and the reason that it works is that if you look to the left
you always see the same impedance:

Thevenin equivalent circuit: It uses Kirchhoff’s current law which states that the sum
of currents entering a node must be equal to the sum of the currents leaving a node. In the

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

ladder, at each node, the current is split in half. By switching the currents into each node the
total current flowing is binary weighted.

Using the principle of superposition when you add more current into a resistance the total
voltage appearing is the sum of the voltages caused by all the individual currents i.e. as each
bit is activated so the voltage increases at the output. Another clever thing about the R-2R
ladder, and the reason that it works is that if you look to the left you always see the same
impedance:

Using Thevenin’s theorem you can work out the voltage contribution of each bit. A
Thevenin circuit is the equivalent of a network of resistances and voltage sources (and current
sources). You can replace the network with a Thevenin equivalent circuit and it will work in
exactly the same way as the original network .To use the Thevenin theorem replace all
voltage sources with short circuits and all current sources with open circuits - calculate the
resistance looking into the port for the Thevenin resistance Rth. For the Thevenin voltage
calculate the no load output voltage.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

Contribution if bit 3 is active (the MSB):

Contribution if bit 2 is active (the MSB):

Contribution if bit 1 is active (the MSB):

When each bit is active it contributes a binary weighted voltage to the output Vo.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

DAC 0800 (Data sheet: Features and description only):

Analogto Digital Converters: Functional diagram of ADC;

The analog signal is first applied to the ‘sample‘ block where it is sampled at a specific

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

sampling frequency. The sample amplitude value is maintained and held in the ‘hold‘ block. It
is an analog value. The hold sample is quantized into discrete value by the ‘quantize‘ block.
At last, the ‘encoder‘ converts the discrete amplitude into a binary number.

Analog To Digital Conversion Steps

The conversion from analog signal to a digital signal in an analog to digital converter is
explained below using the block diagram given above.
Sample: The sample block function is to sample the input analog signal at a specific time
interval. The samples are taken in continuous amplitude & possess real value but they
are discrete with respect to time. The sampling frequency plays important role in the
conversion. So it is maintained at a specific rate. The sampling rate is set according to the
requirement of the system.
Hold: The second block used in ADC is the ‘Hold’ block. It has no function. It only holds the
sample amplitude until the next sample is taken. The hold value remains unchanged till the
next sample.
Quantize: This block is used for quantization. It converts the analog or continuous amplitude
into discrete amplitude. The on hold continuous amplitude value in hold block goes through
‘quantize’ block & becomes discrete in amplitude. The signal is now in digital form as it
has discrete time & discrete amplitude.
Encoder: The encoder block converts the digital signal into binary form i.e. into bits.
As we know that the digital devices operate on binary signals so it is necessary to convert the
digital signal into the binary form using the Encoder.
This is the whole process of converting an Analog signal into digital form using an Analog to
Digital Converter. This whole conversion occurs in a microsecond.
Factors Of ADC:
1.Resolution:
Resolution of an ADC is the number of bits that represents the digital signal’s amplitude. The
analog signal has continuous amplitude. It can have infinite values i.e. real, floating basically
any value one can imagine. On the other hand, the digital signal has a discrete and finite number
of values. These discrete values are represented using binary numbers (bits).
2.Width Of The Step: The voltage difference between two adjacent steps is known as
the width of the step. It is denoted by Δv.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

3.Sampling Rate:The number of samples taken during a single second is known as sampling
rate or sampling frequency. The sampling rate should be set according to the input signal. It
should not be very low or very high.
4.Aliasing: If the sampling rate is very low then the resultant signal will not look anything like
the original signal. In fact, it will become a different signal after reconstruction. This problem
is known as aliasing. To avoid this problem, the sampling rate should be
kept higher than twice the frequency of the input signal. Anti-aliasing filters are also used
for removing the frequency components higher than one half of the sampling rate. it blocks the
aliasing components from being sampled.
5.Nyquist Criteria: Nyquist criteria suggest the minimum possible sampling rate for an
analog signal which can be reconstructed successfully. If the highest frequency of the analog
signal is f, the signal can be reconstructed successfully from its samples, if the samples are
taken at a sampling frequency greater than 2f.
6.Offset: The offset in ADC is the shift in the digital output. For example, for input vin = 0,
the output might not necessarily be digital 0. It can be digital 5, which will be the offset of
the ADC.
7. Quantization Error: The ADC updates its value if the increase or decrease in its input
voltage is greater than Δv/2. Any change less than Δv/2 will not be registered. This is known
as Quantization Error.

Flash ADC:
Flash ADC or Parallel ADC and its Working Principle

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 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

Another type of ADC is parallel ADC. Parallel ADC is called as Flash ADC. Its response is
very fast. it converts analog signal into digital signal using parallel set of comparators. As its
conversion time is very fast it is called as flash ADC Following figure shows circuit diagram
of parallel ADC or flash ADC. n-bit Flash ADC consist of parallel combination of 2^n-1
comparators. Outputs of all comparators are connected to an encoder.

Working Principle of flash ADC

Analog voltage is applied to non inverting terminals of all comparators using a single line.
Reference voltage is applied to inverting terminals of comparators using divider circuit. Each
comparator produces digital output in the form of 1 or 0. If unknown analog voltage is greater
than reference voltage comparator produces high logic. If analog voltage is less than reference
voltage then comparator produces low logic i.e. 0. Thus all parallel comparator produces digital
representation of analog voltage in the form of zero and one. These outputs of comparator are
then applied to the fast encoder. Encoder converts those zeros and once into binary number and
produces digital binary output.For example, see below table. When unknown voltage is 5 i.e.
lies between 4.375 &5.625 is applied to the flash ADC, first four encoders produces output ‘1’
and last three encoders produces output ‘0’. Encoder converts this ‘1111000’ comparator
output into ‘100’ binary number as digital output.Table shows the outputs of comparators and
encoder for a 3 bit flash ADC. The range of operation is given as 0-10V.

Analog Comparator Output Encoder Output

input

(V) C1 C2 C3 C4 C5 C6 C7 D2 D1 D0

0.000-0.625 0 0 0 0 0 0 0 0 0 0

0.625-1.875 1 0 0 0 0 0 0 0 0 1

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

1.875-3.125 1 1 0 0 0 0 0 0 1 0

3.125-4.375 1 1 1 0 0 0 0 0 1 1

4.375-5.625 1 1 1 1 0 0 0 1 0 0

5.625-6.875 1 1 1 1 1 0 0 1 0 1

6.875-8.125 1 1 1 1 1 1 0 1 1 0

8.125-
10.000 1 1 1 1 1 1 1 1 1 1

As the number of bits of ADC increases its resolution increases. But such high bit converter
is bulky and expensive.

Counter type ADC:

The Counter type ADC can be defined as, it is the basic type of ADC, which is also known as
staircase approximation ADC, or a ramp type ADC. The circuit diagram of counter type ADC
is shown below. The circuit diagram of Counter Type ADC can be built with N-bit counter,
digital to analog converter, and op-amp comparator. The N-bit counter produces an n-bit digital
o/p which is given as an i/p to the digital to analog circuit (DAC). The analog output equivalent
to the digital i/p from DAC is contrasted with the i/p analog voltage with the help of an op-amp
comparator. This Integrated Circuit evaluates the two voltages and if the produced DAC
voltage is low, it gives a high pulse to the N-bit counter as a CLK pulse to raise the counter

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

The similar procedure will be continued until the output of the DAC equals to the i/p analog
voltage then it produces a low CLK pulse and also gives a clear signal to the counter as well as
a load signal to the storage resistor. Here storage resistor is used to store the corresponding
digital bits. These digital values are strongly matched with the analog input values with a small
error. For each sampling interval, the output of DAC tracks a rampway so that it is named as a
Digital ramp kind ADC. And this ramp seems like staircases for each sampling moment, so
that it is also named The Counter type ADC conversion can be done by this formula, that is =
(2N-1) T as a staircase approximation kind ADC.

Counter type ADC Advantages

• Counter type ADC is very simple to understand and also to operate.
• Counter type ADC design is less complex, so the cost is also less
Counter type ADC Disadvantages
• Speed is less, since each time the counter has to begin from ZERO.
• There may be conflicts if the next i/p is sampled before completion of one process.
Successive Approximation ADC (Analog to Digital Converter):
Successive approximation ADC is the advanced version of Digital ramp type ADC which is
designed to reduce the conversion and to increase speed of operation. The major draw of digital
ramp ADC is the counter used to produce the digital output will be reset after every sampling
interval. The normal counter starts counting from 0 and increments by one LSB in each count,
this result in 2N clock pulses to reach its maximum value.In successive approximation ADC
the normal counter is replaced with successive approximation register as shown in below
figure.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

Successive Approximation ADC

The successive approximation register counts by changing the bits from MSB to LSB
according to input. The detailed operation is shown below.

Operation of 3 bit Successive Approximation ADC

The output of SAR is converted to analog out by the DAC and this analog output is compared
with the input analog sampled value in the Op amp comparator. This Op amp provides an high
or low clock pulse based on the difference through the logic circuit. In very first case the 3 bit
SAR enables its MSB bit as high i.e. ‘1’ and the result will be “100”. This digital output is
converted to analog value and compared with input sampled voltage (Vin). If the deference is
positive i.e. if the sampled input is high then the SAR enables the next bit from MSB and result
will be “110”. Now if the output is negative i.e. if the input sampled voltage is less than the
SAR resets the last set bit and sets the next bit and resultant output in this case will be “101”
which will definitely approximately equal to the input analog value. The counting sequence is
explained by the following counter flow chat as shown in below.

Successive Approximation ADC Counter Flow chart , SAR ADC input output flow voltage graph
Conversion time of Successive Approximation ADC
By observing above 3 bit example it is illustrated for a 3 bit ADC the conversion time will be
3 clock pulses. Then;N bit Successive Approximation ADC conversion time = 3T (T- clock

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 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

pulse). So to avoid aliasing effect the next sample of input signal should be taken after 3 clock
pulses.
Important note on Successive Approximation ADC

In Counter type or digital ramp type ADC the time taken for conversion depends on the
magnitude of the input, but in SAR the conversion time is independent of the magnitude of the
input sampled value.
Advantages of Successive Approximation ADC
▪ Speed is high compared to counter type ADC.
▪ Good ratio of speed to power.
▪ Compact design compared to Flash Type and it is inexpensive.
Disadvantages of Successive Approximation ADC
▪ Cost is high because of SAR
▪ Complexity in design.
Applications
The SAR ADC will used widely data acquisition techniques at the sampling rates higher than
10KHz.

Dual slope ADC

The dual-slope integration type of A/D conversion is a very popular method for digital
voltmeter applications. When compared to other types of ADC techniques, the dual-slope
method is slow but is quite adequate for a digital voltmeter used for laboratory measurements.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

When a dual-slope A/D converter is used for a DVM, the counters may be decade rather than
binary and the segment and digit drivers may be contained in the chip. When the converter is
to be interfaced to a microprocessor, and many high performance DVMs use microprocessors
for data manipulation, the counters employed are binary.
Working -
In the dual-slope technique, an integrator is used to integrate an accurate voltage reference for
a fixed period of time. The same integrator is then used to integrate with the reverse slope, the
input voltage, and the time required to return to the starting voltage is measured. The order of
integrations does not matter. Consider the integration circuit shown in the figure.
Where ‘t’ is the elapsed time from when the integration began. The above Equation also
assumes that the integrator capacitor started with no charge & thus the output of the integrator
started at zero volts.

If the integration were allowed to continue for a fixed period of time t1 the output voltage would
be V out=Vxt/RC V1=Vx/RC* T1 .Notice that the integrator output has gone in the opposite
polarity as the input. That is, a positive input voltage produces a negative integrator output. If
a reference voltage Vref were substituted for the input voltage Vx as shown in the figure below,
the integrator would begin to ramp toward zero at a rate of Vref/RC assuming that the Vref was
of the opposite polarity as the unknown input voltage.

The integrator for this situation does not start at zero but at an output voltage of V1, and the
output voltage Vout is Vout=V1+VRef /RCt

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

As the integrator responds to the average of the input, it is not necessary to provide a sample
and hold, as changes in the input voltage will not cause significant errors. Although the
integrator output will not be a linear ramp, the integration will represent the end value obtained
by a voltage equal to the average of the unknown input voltage. Therefore, the dual-slope
analog-to-digital conversion will produce a value equal to the average of the unknown input.

In the days when analog integrated circuits were cheaper and more familiar to designers than
digital circuits, the dual slope ADC was the choice for inexpensive multimeters, anything that
didn't require high speed, and especially any problem that looked at noisy signals. Now that
microcontrollers with high speed ADCs and facile signal averaging are available, the dual slope
system is becoming less common. Nevertheless, when considering measurement of noisy
signals, as long as conversion rates of no more than 10 times per second are adequate, this is
an approach that is well worth considering. To conclude, dual slop integration type ADCs do
not offer high speed conversion, but are highly reliable and effective when used with
applications that tend to give out noisy signals.
One significant enhancement made to the dual-slope converter is automatic zero correction. As
with any analog system, amplifier offset voltages, offset currents, and bias currents can cause
errors. In addition, in the dual-slope A/D converter, the leakage current of the capacitor can
cause errors in the integration and consequentially, an error. These effects, in the dual-slope
AID converter, will manifest themselves as a reading of the DVM when no input voltage is
present.

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

ADC 0809 (Data sheet: Features, specifications and description only):

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04

 Signal Conditioning and Data Acquisition Circuits -Dr.H N Suresh

DAC/ADC specifications

The basic DC tests for ADCs and DACs include offset error, gain error, differential
nonlinearity (DNL), and integral nonlinearity (INL). Depending on the type of converter,
the gain error may be replaced by two specifications that are typically called positive full-scale
error and negative full-scale error. For ADCs, an additional specification is "no missing
codes." For DACs, there is a similar specification called monotonicity. Both of these
specifications are directly related to the converter's DNL.

*For further studies refer Texas instruments code sheet

Dept. Electronics & Instrumentation Engg., BIT, Bengaluru-04