4 Transistor Biasing 1679818313849
4 Transistor Biasing 1679818313849
If the o/p signal must be a faithful reproduc on of the i/p signal, the transistor must be
operated in ac ve region. That means an opera ng point has to be established in this region . To
establish an opera ng point (proper values of collector current Ic and collector to emi er
voltage VCE) appropriate supply voltages and resistances must be suitably chosen in the ckt. This
process of selec ng proper supply voltages and resistance for obtaining desired opera ng point
or Q point is called as biasing and the ckt used for transistor biasing is called as biasing ckt.
There are four condi ons to be met by a transistor so that it acts as a faithful ampr:
1) Emi er base junc on must be forward biased (VBE=0.7Vfor Si, 0.2V for Ge) and collector
base junc on must be reverse biased for all levels of i/p signal.
2) Vce voltage should not fall below VCE (sat) (0.3V for Si, 0.1V for Ge) for any part of the i/p
signal. For VCE less than VCE (sat) the collector base junc on is not probably reverse biased.
3) The value of the signal Ic when no signal is applied should be at least equal to the max.
collector current t due to signal alone.
4) Max. ra ng of the transistor Ic(max), VCE (max) and PD(max) should not be exceeded at any
value of i/p signal.
Point C is too close to PD(max) curve of the transistor. Therefore the o/p voltage swing in the
posi ve direc on is limited.
Point B is located in the middle of ac ve region .It will allow both posi ve and nega ve half
cycles in the o/p signal. It also provides linear gain and larger possible o/p voltages and currents
PD(max)
Vce(sat)
g1
Referring to the biasing circuit of g 4.2a, the values of VCC and RC are xed and Ic and VCE
are dependent on RB.
The coordinates of B are obtained by subs tu ng Ic=0 in the above equa on. Then Vce =
Vcc. Therefore the coordinates of B are VCE =Vcc and Ic=0. Thus the dc load line AB can be drawn
if the values of Rc and Vcc are known.
As shown in the g4.2b, the op mum POINT IS LOCATED AT THE MID POINT OF THE
MIDWAY BETWEEN a AND b. In order to get faithful ampli ca on, the Q point must be well
within the ac ve region of the transistor.
Even though the Q point is xed properly, it is very important to ensure that the opera ng
point remains stable where it is originally xed. If the Q point shi s nearer to either A or B, the
output voltage and current get clipped, thereby o/p signal is distorted.
In prac ce, the Q-point tends to shi its posi on due to any or all of the following three
main factors.
1) Reverse satura on current, Ico, which doubles for every 10oC raise in temperature
If base current IB is kept constant since IB is approximately equal to Vcc/RB. If the transistor is
replaced by another one of the same type, one cannot ensure that the new transistor will have
iden cal parameters as that of the rst one. Parameters such as β vary over a range. This results
in the varia on of collector current Ic for a given IB. Hence , in the o/p characteris cs, the
spacing between the curves might increase or decrease which leads to the shi ing of the Q-
point to a loca on which might be completely unsa sfactory.
A er drawing the dc load line, the opera ng point Q is properly located at the center of
the dc load line. This opera ng point is chosen under zero input signal condi on of the circuit.
Hence the ac load line should also pas through the opera ng point Q. The e ec ve ac load
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resistance Rac, is a combina on of RC parallel to RL i.e. || . So the slope of the ac load
line CQD will be . To draw the ac load line, two end points, I.e. VCE(max) and IC(max) when the
By joining points c and D, ac load line CD is constructed. As RC > Rac, The dc load line is less steep
than ac load line.
The rise of temperature results in increase in the value of transistor gain β and the
leakage current Ico. So, IC also increases which results in a shi in opera ng point. Therefore,
The biasing network should be provided with thermal stability. Maintenance of the opera ng
point is speci ed by S, which indicates the degree of change in opera ng point due to change in
temperature.
S’ is de ned as the rate of change of IC with VBE, keeping IC and VBE constant.
S’’ is de ned as the rate of change of IC with β, keeping ICO and VBE constant.
This form of biasing is also called base bias. In the fig 4.3 shown, the single power
source (for example, a battery) is used for both collector and base of a transistor, although
separate batteries can also be used.
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In the given circuit,
Vcc = IBRB + Vbe
S=1+β
Since β is a large quan ty, this is very poor biasing circuit. Therefore in prac ce the
circuit is not used for biasing.
For a given transistor, Vbe does not vary signi cantly during use. As Vcc is of xed value,
on selec on of RB, the base current IB is xed. Therefore this type is called xed bias type of
circuit.
Also for given circuit, Vcc = ICRC + Vce
Therefore, Vce = Vcc - ICRC
Merits:
• It is simple to shi the opera ng point anywhere in the ac ve region by merely
changing the base resistor (RB).
• A very small number of components are required.
Demerits:
• The collector current does not remain constant with varia on in temperature or
power supply voltage. Therefore the opera ng point is unstable.
• Changes in Vbe will change IB and thus cause RE to change. This in turn will alter
the gain of the stage.
• When the transistor is replaced with another one, considerable change in the
value of β can be expected. Due to this change the opera ng point will shi .
2) EMITTER-FEEDBACK BIAS:
The emi er feedback bias circuit is shown in the g 4.4. The xed bias circuit is modi ed
by a aching an external resistor to the emi er. This resistor introduces nega ve feedback that
stabilizes the Q-point. From Kirchho 's voltage law, the voltage across the base resistor is
VRb = VCC - IeRe - Vbe.
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From Ohm's law, the base current is
Ib = VRb / Rb.
The way feedback controls the bias point is as follows. If Vbe is held constant and
temperature increases, emi er current increases. However, a larger Ie increases the emi er
voltage Ve = IeRe, which in turn reduces the voltage VRb across the base resistor. A lower base-
resistor voltage drop reduces the base current, which results in less collector current because Ic
= ß IB. Collector current and emi er current are related by Ic = α Ie with α ≈ 1, so increase in
emi er current with temperature is opposed, and opera ng point is kept stable.
Similarly, if the transistor is replaced by another, there may be a change in IC
(corresponding to change in β-value, for example). By similar process as above, the change is
negated and opera ng point kept stable.
For the given circuit,
IB = (VCC - Vbe)/(RB + (β+1)RE).
Merits:
The circuit has the tendency to stabilize opera ng point against changes in temperature
and β-value.
Demerits:
• In this circuit, to keep IC independent of β the following condi on must be met:
This con gura on shown in g 4.5 employs nega ve feedback to prevent thermal
runaway and stabilize the opera ng point. In this form of biasing, the base resistor RB is
connected to the collector instead of connec ng it to the DC source Vcc. So any thermal
runaway will induce a voltage drop across the RC resistor that will thro le the transistor's base
current.
From Kirchho 's voltage law, the voltage across the base resistor Rb is
If Vbe is held constant and temperature increases, then the collector current Ic increases.
However, a larger Ic causes the voltage drop across resistor Rc to increase, which in turn reduces
the voltage across the base resistor Rb. A lower base-resistor voltage drop reduces the base
current Ib, which results in less collector current Ic. Because an increase in collector current with
temperature is opposed, the opera ng point is kept stable.
Merits:
• Circuit stabilizes the opera ng point against varia ons in temperature and β (i.e.
replacement of transistor)
Demerits:
• In this circuit, to keep Ic independent of β, the following condi on must be met:
• As β-value is xed (and generally unknown) for a given transistor, this rela on
can be sa s ed either by keeping Rc fairly large or making Rb very low.
• If Rc is large, a high Vcc is necessary, which increases cost as well as precau ons
necessary while handling.
• If Rb is low, the reverse bias of the collector–base region is small, which limits the
range of collector voltage swing that leaves the transistor in ac ve mode.
• The resistor Rb causes an AC feedback, reducing the voltage gain of the ampli er.
This undesirable e ect is a trade-o for greater Q-point stability.
Usage: The feedback also decreases the input impedance of the ampli er as seen from
the base, which can be advantageous. Due to the gain reduc on from feedback, this biasing
form is used only when the trade-o for stability is warranted.
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4) COLLECTOR –EMITTER FEEDBACK BIAS:
The above g4.6 shows the collector –emi er feedback bias circuit that can be obtained
by applying both the collector feedback and emi er feedback. Here the collector feedback is
provided by connec ng a resistance RB from the collector to the base and emi er feedback is
provided by connec ng an emi er Re from emi er to ground. Both feed backs are used to
control collector current and base current IB in the opposite direc on to increase the stability
as compared to the previous biasing circuits.
5) VOLTAGE DIVIDER BIAS OR SELF BIAS OR EMITTER BIAS:
The voltage divider as shown in the g 4.7 is formed using external resistors R1 and R2.
The voltage across R2 forward biases the emi er junc on. By proper selec on of resistors R1 and
R2, the opera ng point of the transistor can be made independent of β. In this circuit, the
voltage divider holds the base voltage xed independent of base current provided the divider
current is large compared to the base current. However, even with a xed base voltage,
collector current varies with temperature (for example) so an emi er resistor is added to
stabilize the Q-point, similar to the above circuits with emi er resistor.
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In this circuit the base voltage is given by:
voltage across
provided .
Also
For the given circuit,
Let the current in resistor R1 is I1 and this is divided into two parts – current through
base and resistor R2. Since the base current is very small so for all prac cal purpose it is
assumed that I1 also ows through R2, so we have
The resistor RE provides stability to the circuit. If the current through the collector rises,
the voltage across the resistor RE also rises. This will cause VCE to increase as the voltage V2 is
independent of collector current. This decreases the base current, thus collector current
increases to its former value.
Stability factor for such circuit arrangement is given by
If Req/RE is very small compared to 1, it can be ignored in the above expression thus we
have
Which is excellent since it is the smallest possible value for the stability. In actual
prac ce the value of stability factor is around 8-10, since Req/RE cannot be ignored as
compared to 1.
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Merits:
• Unlike above circuits, only one dc supply is necessary.
• Opera ng point is almost independent of β varia on.
• Opera ng point stabilized against shi in temperature.
Demerits:
• In this circuit, to keep IC independent of β the following condi on must be met:
DIODE COMPENSATION:
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The following g4.8 shows a transistor ampli er with a diode D connected across the
base-emi er junc on for compensa on of change in collector satura on current ICO. The diode
is of the same material as the transistor and it is reverse biased by e the emi er-base junc on
voltage VBE, allowing the diode reverse satura on current IO to ow through diode D. The base
current IB=I-IO.
As long as temperature is constant, diode D operates as a resistor. As the temperature
increases, ICO of the transistor increases. Hence, to compensate for this, the base current IB
should be decreased.
The increase in temperature will also cause the leakage current IO through D to increase
and thereby decrease the base current IB. This is the required ac on to keep Ic constant.
This type of bias compensa on does not need a change in Ic to e ect the change in IC, as
both IO and ICO can track almost equally according to the change in temperature.
THERMISTOR COMPENSATION:
The following g4.9 a thermistor RT, having a nega ve temperature coe cient is
connected in parallel with R2. The resistance of thermistor decreases exponen ally with
increase of temperature. An increase of temperature will decrease the base voltage VBE,
reducing IB and IC.
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SENSISTOR COMPENSATION:
In the following g4.10 shown a sensistor Rs having a posi ve temperature coe cient is
connected across R1 or RE. Rs increases with temperature. As the temperature increases, the
equivalent resistance of the parallel combina on of R1 and Rs also increases and hence VBE
decreases, reducing IB and Ic. This reduced Ic compensates for increased Ic caused by the
increase in VBE, ICO and β due to temperature.
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4.7 THERMAL RUNAWAY AND THERMAL STABILITY:
THERMAL RUNAWAY:
variables in the equa on, β, , and increases with rise in temperature. In par cular, the
reverse satura on current or leakage current changes greatly with temperature. Speci cally
it doubles for every 10oC rise in temperature. The collector current causes the collector base
junc on temperature to rise which in turn, increase , as a result will increase s ll further,
which will further rise the temperature at the collector base junc on. This process will become
cumula ve leading at the collector base junc on. This process will become cumula ve leading
to “thermal runaway”. Consequently, the ra ngs of the transistor are exceeded which may
destroy the transistor itself.
The collector is made larger in size than the emi er in order to help the heat developed
at the collector junc on. However if the circuit is designed such that the base current is made
to decrease automa cally with rise in temperature, then the decrease in will compensate
THERMAL RESISTANCE
Consider transistor used in a circuit where the ambient temperature of the air around
the transistor is TAoC and the temperature of the collector-base junc on of the transistor is TJoC.
Due to hea ng within the transistor TJ is higher than TA. As the temperature di erence TJ- TA is
greater, the power dissipated in the transistor, PD will be greater, i.e, TJ- TA PD
The equa on can be wri en as TJ- TA PD. , where is the constant of propor onality
and is called the Thermal resistance. Rearranging the above equa on = TJ- TA /PD. Hence is
measured in oC/W which may be as small as 0.2 oC/W for a high power transistor that has an
e cient heat sink or up to 1000oC/W for small signal, low power transistor which have no
cooling provision.
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As Θ represents total thermal resistance from a transistor junc on to the ambient
temperature, it is referred to as ΘJ-A. However, for power transistors, thermal resistance is given
form junc on to case, ΘJ-C.
Which indicates the heat dissipated in the junc on must make its way to the surrounding air
through two series paths from junc on to case and from case to air. Hence the power
dissipated.
PD = (TJ- TA Θ J-A
ΘJ-C is determined by the type of manufacture of the transistor and how it is located I the case,
but ΘC-A is determined by the surface area of the case or ange and its contact with air. If the
e ec ve surface area of the transistor case could be increased, the resistance to heat ows, or
could be increased ΘC-A, could be decreased. This can be achieved by the use of a heat sink.
The heat sink is a rela vely large, nned, usually black metallic heat conduc ng device in
close contact with transistor case or ange. Many versions of heat sink exist depending upon
the shape and size of the transistor. Larger the heat sink smaller is the thermal resistance ΘHS-A.
This thermal resistance is not added to ΘC-A in series, but is instead in parallel with it and if
ΘHS-A is much less than ΘC-A, then ΘC-A will be reduced signi cantly, thereby improving the
dissipa on capability of the transistor. Thus
In the self biased circuit the transistor is biased in the ac ve region. The power generated at the
junc on without any signal is
Let us assume that the quiescent collector and the emi er currents are equal. Then
………………….(1)
As Θ and are posi ve, should be nega ve in order to sa sfy the above condi on.
SinceVCE=VCC-IC(RE+RC) then eq(4) implies that VCE<VCC/2. IF the inequality of eq(4) is not
sa s ed and VCE<VCC/2, then from eq(3), is posi ve., and the corresponding eq(2) should