Electronic Circuit Analysis and Design 2

.History:.
First Computer: ABACUS

First Mechanical Computer: PASCALINE

First Digital Computer:

Atanasoff – Berry Computer

Electronic Numerical Integrator Abd Computer

Microelectronics
 the design, manufacture, and use of microchips and
microcircuits.

𝑽𝑽𝑪𝑪 Vacuum Tubes

𝑻𝑻 Transistors
𝑰𝑰 Integrated Circuits
𝑴𝑴 Microprocessors
𝑨𝑨 Ar�ficial Intelligence

VcTIMA
 Electronic Circuit Analysis and Design 2

Ge

Si

Moore - Noyce x86

 Electronic Circuit Analysis and Design 2
.Opera�onal – Amplifiers (Op – Amps).
 is an integrated circuit (IC) that amplifies the Differen�al Amplifier
voltage difference between two inputs.
 Early op – amps were used as a
Mathema�cal Opera�onal circuit
(add, subtract, mul�ply, Differen�al Equa�on).

DC bias
 Voltage – Series, (Voltage - Amplifier) – (VC – VS)
Recall:
𝑉𝑉𝐸𝐸𝐸𝐸 − 0.7
𝐼𝐼𝐸𝐸 =
𝑅𝑅𝐸𝐸
00𝐼𝐼𝐸𝐸
𝐼𝐼𝐼𝐼1 = 𝐼𝐼𝐼𝐼2 =
2

𝑉𝑉𝑉𝑉1 = 𝑉𝑉𝑉𝑉2 = 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝐼𝐼𝐶𝐶 𝑅𝑅𝐶𝐶

AC Opera�on mode

𝑉𝑉𝑑𝑑 = 𝑉𝑉+ − 𝑉𝑉−

26𝑚𝑚𝑚𝑚
𝑟𝑟𝑒𝑒 =
𝐼𝐼𝐸𝐸

𝑉𝑉𝑜𝑜 𝑉𝑉𝑜𝑜
Leter Prefixes 𝐴𝐴𝑣𝑣 = =
𝑉𝑉𝑖𝑖 𝑉𝑉𝑑𝑑

Input Mode Gain (BJT)

Single – Ended 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣 =
2𝑟𝑟𝑒𝑒
Double – Ended 𝑅𝑅𝐶𝐶
𝐴𝐴𝑣𝑣 =
𝑟𝑟𝑒𝑒
Common – Mode 𝛽𝛽𝑅𝑅𝐶𝐶
Parts of Op – Amps: 𝐴𝐴𝑣𝑣 =
𝛽𝛽𝑟𝑟𝑒𝑒 + 2(𝛽𝛽 + 1)𝑅𝑅𝐸𝐸

 A power amplifier that is used to supply high power to the load.

 It consists of two transistors in which one is NPN and another is
PNP.
 One transistor pushes the output on a posi�ve half – cycle and
the other pulls on a nega�ve half – cycle.
 Electronic Circuit Analysis and Design 2
Single – Ended Input Op – Amp Characteris�cs
741

Common Mode Rejec�on Ra�on (CMRR)

𝐴𝐴𝑑𝑑
𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶 =
𝐴𝐴𝐶𝐶
𝐴𝐴𝑑𝑑
𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝑑𝑑𝑑𝑑 = 20 log � �
𝐴𝐴𝐶𝐶
𝑉𝑉𝑜𝑜 = 𝐴𝐴𝑑𝑑 𝑉𝑉𝑑𝑑 + 𝐴𝐴𝐶𝐶 𝑉𝑉𝐶𝐶

𝑤𝑤ℎ𝑒𝑒𝑒𝑒𝑒𝑒: 𝑉𝑉𝑑𝑑 = 𝑉𝑉+ − 𝑉𝑉−

Double – Ended Input
𝑉𝑉+ + 𝑉𝑉−
𝑉𝑉𝐶𝐶 =
2

INPUT Off – Set
𝑖𝑖𝑖𝑖: ±𝑉𝑉1 = ∓𝑉𝑉2 = 𝑉𝑉𝑖𝑖
𝐼𝐼𝐵𝐵1 + 𝐼𝐼𝐵𝐵2
𝑉𝑉𝑜𝑜 = 2𝑉𝑉𝑖𝑖 𝐼𝐼𝑖𝑖𝑖𝑖(𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏) = → 𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼 𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏 𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶
2
𝐼𝐼𝑖𝑖𝑖𝑖(𝑜𝑜𝑜𝑜𝑜𝑜)
𝐼𝐼𝐵𝐵1 = 𝐼𝐼𝑖𝑖𝑖𝑖 +
2
𝐼𝐼𝑖𝑖𝑖𝑖(𝑜𝑜𝑜𝑜𝑜𝑜)
Common – Mode 𝐼𝐼𝐵𝐵2 = 𝐼𝐼𝑖𝑖𝑖𝑖 −
2
𝐼𝐼𝑂𝑂𝑂𝑂 = �𝐼𝐼𝐵𝐵1 − 𝐼𝐼𝐵𝐵2 � → 𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼 𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂 𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶

𝑉𝑉𝑂𝑂𝑂𝑂 = 𝐼𝐼𝐵𝐵 �𝑅𝑅𝑖𝑖 ∥ 𝑅𝑅𝑓𝑓 � → 𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂 𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂 𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉

𝑉𝑉𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒
𝑉𝑉𝑖𝑖𝑖𝑖(𝑜𝑜𝑜𝑜𝑜𝑜) = → 𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼 𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂 𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉𝑉
𝐴𝐴𝑑𝑑
𝑉𝑉𝑖𝑖 = 𝑉𝑉+ = 𝑉𝑉−

𝑉𝑉𝑜𝑜 = 𝐴𝐴𝑑𝑑 𝑉𝑉𝑑𝑑 = 𝐴𝐴𝑑𝑑 �𝑉𝑉+ − 𝑉𝑉− � = 0 Maximum Peak – Peak Voltage

𝑀𝑀𝑀𝑀𝑀𝑀 = 2(𝑉𝑉𝐶𝐶𝐶𝐶 − 0.7) = 2(𝑉𝑉𝐸𝐸𝐸𝐸 − 0.7) → 𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅

𝑀𝑀𝑀𝑀𝑀𝑀 = 2𝑉𝑉𝐶𝐶𝐶𝐶 = 2𝑉𝑉𝐸𝐸𝐸𝐸 → 𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼
 Electronic Circuit Analysis and Design 2
Unity Gain Frequency
 AKA Unity Gain Bandwidth
 Is the frequency at which the voltage gain is 1 (𝑨𝑨𝒗𝒗 = 𝟏𝟏). Nega�ve – Feedback Amplifiers
𝐺𝐺𝐺𝐺𝐺𝐺 = 𝐴𝐴𝑂𝑂𝑂𝑂 ∙ 𝑓𝑓𝑐𝑐𝑐𝑐𝑐𝑐−𝑜𝑜𝑜𝑜𝑜𝑜

 Improves frequency response.

 Makes proper�es predictable – independent of temperature,
manufacturing differences or other proper�es of op – amp.
 Circuit proper�es only depend upon the external feedback
network and so can be easily controlled.

Recall:

Posi�ve Nega�ve
Feedback Feedback
AKA Regenera�ve Degenera�ve
Phase Shi� in phase 𝟏𝟏𝟏𝟏𝟏𝟏°
Gain High Low

= −6𝑑𝑑𝑑𝑑/𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜 Stability Unstable Stable

Linearity Non - Linear Linear
Noise More Less
Power Supply Rejec�on Ra�o (PSRR) Bandwidth Narrow Wider
 The ra�o of the change in Supply voltage to the equivalent Frequency High Low
(Differen�al) output voltage it produces.
𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼𝐼 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖 (𝑍𝑍𝑖𝑖 ) Low High
𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂𝑂 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖 (𝑍𝑍𝑜𝑜 ) High Low
∆𝑉𝑉𝐶𝐶𝐶𝐶
𝑃𝑃𝑃𝑃𝑃𝑃𝑃𝑃 = Applica�on Oscillators Amplifiers
∆𝑉𝑉𝑜𝑜

Slew Rate
Inver�ng Amplifier
 It is the maximum rate at which amplifier output can change in
𝑉𝑉𝑑𝑑 = 𝑉𝑉+ − 𝑉𝑉−
volts per microsecond. It is the ini�al slope of exponen�al
waveform. 𝑉𝑉𝑑𝑑 = 0 − 𝑉𝑉𝑖𝑖𝑖𝑖

𝑉𝑉𝑑𝑑 = −𝑉𝑉𝑖𝑖𝑖𝑖
∆𝑉𝑉𝑜𝑜 𝐴𝐴𝐶𝐶𝐶𝐶 𝑉𝑉𝑖𝑖𝑖𝑖
𝑆𝑆𝑆𝑆 = = = 2𝜋𝜋𝑓𝑓𝑚𝑚𝑚𝑚𝑚𝑚 𝑉𝑉𝑝𝑝 𝑉𝑉𝑜𝑜
∆𝑡𝑡 ∆𝑡𝑡 𝐴𝐴𝑑𝑑 =
𝑉𝑉𝑑𝑑

𝑉𝑉𝑜𝑜 = −𝑉𝑉𝑖𝑖𝑖𝑖 𝐴𝐴𝑑𝑑

𝑉𝑉𝑖𝑖𝑖𝑖 − 0 𝑉𝑉𝑜𝑜 − 0 𝑉𝑉𝑖𝑖𝑖𝑖 𝑉𝑉𝑜𝑜

+ =0= +
𝑅𝑅𝑎𝑎 𝑅𝑅𝑓𝑓 𝑅𝑅𝑎𝑎 𝑅𝑅𝑓𝑓

𝑅𝑅𝑓𝑓 𝑅𝑅𝑓𝑓
𝑉𝑉𝑜𝑜 = −𝑉𝑉𝑖𝑖𝑖𝑖 � � , 𝑉𝑉𝑜𝑜 = −𝑉𝑉𝑖𝑖𝑖𝑖 𝐴𝐴𝑑𝑑 ∴ 𝐴𝐴𝑑𝑑 =
𝑅𝑅𝑎𝑎 𝑅𝑅𝑎𝑎
 Electronic Circuit Analysis and Design 2
Non - Inver�ng Amplifier Differen�ator
𝑉𝑉𝑑𝑑 = 𝑉𝑉+ − 𝑉𝑉− 𝐼𝐼𝑐𝑐 + 𝐼𝐼𝑅𝑅 = 0

𝑉𝑉𝑑𝑑 = 𝑉𝑉𝑖𝑖𝑖𝑖 − 0 𝑑𝑑𝑉𝑉𝑖𝑖 𝑉𝑉𝑜𝑜

𝐶𝐶 + =0
𝑑𝑑𝑑𝑑 𝑅𝑅
𝑉𝑉𝑑𝑑 = 𝑉𝑉𝑖𝑖𝑖𝑖
𝑉𝑉𝑅𝑅𝑎𝑎 𝑉𝑉𝑜𝑜
𝐴𝐴𝑑𝑑 = 𝑑𝑑𝑉𝑉𝑖𝑖
𝑉𝑉𝑑𝑑
𝑉𝑉0 = −𝑅𝑅𝑅𝑅
𝑑𝑑𝑑𝑑
𝑉𝑉𝑜𝑜 = 𝑉𝑉𝑖𝑖𝑖𝑖 𝐴𝐴𝑑𝑑

𝑅𝑅𝑎𝑎
𝑉𝑉𝑅𝑅𝑎𝑎 = 𝑉𝑉𝑖𝑖𝑖𝑖 = 𝑉𝑉𝑜𝑜 ( ) 𝐃𝐃𝐃𝐃. 𝐈𝐈𝐈𝐈 → 𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹𝐹 𝐸𝐸𝐸𝐸𝐸𝐸𝐸𝐸𝐸𝐸𝐸𝐸𝐸𝐸
𝑅𝑅𝑎𝑎 + 𝑅𝑅𝑓𝑓
Integrator
𝐼𝐼𝑅𝑅 + 𝐼𝐼𝐶𝐶 = 0
𝑅𝑅𝑓𝑓 𝑅𝑅𝑓𝑓
𝑉𝑉𝑜𝑜 = 𝑉𝑉𝑖𝑖𝑖𝑖 �1 + � , 𝑉𝑉𝑜𝑜 = 𝑉𝑉𝑖𝑖𝑖𝑖 𝐴𝐴𝑑𝑑 ∴ 𝐴𝐴𝑑𝑑 = 1 + 𝑉𝑉𝑖𝑖 𝑑𝑑𝑉𝑉𝑜𝑜
𝑅𝑅𝑎𝑎 𝑅𝑅𝑎𝑎 𝑅𝑅
+ 𝐶𝐶
𝑑𝑑𝑑𝑑
=0

𝑑𝑑𝑉𝑉𝑜𝑜 𝑉𝑉𝑖𝑖
=−
𝑑𝑑𝑑𝑑 𝑅𝑅𝑅𝑅

1
Summing Amplifier 𝑉𝑉𝑜𝑜 = −
𝑅𝑅𝑅𝑅
� 𝑉𝑉𝑖𝑖 𝑑𝑑𝑑𝑑
𝐼𝐼𝑖𝑖𝑖𝑖 + 𝐼𝐼𝑅𝑅𝑓𝑓 = 0
𝑛𝑛
𝑉𝑉𝑖𝑖𝑖𝑖
𝐼𝐼𝑖𝑖𝑖𝑖 = � � �
𝑅𝑅𝑖𝑖𝑖𝑖
1

𝑉𝑉𝑜𝑜
𝐼𝐼𝑅𝑅𝑓𝑓 =
𝑅𝑅𝑓𝑓
𝑛𝑛
𝑉𝑉𝑖𝑖𝑖𝑖 𝑉𝑉𝑜𝑜
�� �+ =0
𝑅𝑅𝑖𝑖𝑖𝑖 𝑅𝑅𝑓𝑓
1

𝑛𝑛
𝑉𝑉𝑖𝑖𝑖𝑖 𝑉𝑉𝑎𝑎 𝑉𝑉𝑏𝑏 𝑉𝑉𝑐𝑐
𝑉𝑉𝑜𝑜 = −𝑅𝑅𝑓𝑓 � � � = −𝑅𝑅𝑓𝑓 � + + �
𝑅𝑅𝑖𝑖𝑖𝑖 𝑅𝑅𝑎𝑎 𝑅𝑅𝑏𝑏 𝑅𝑅𝑐𝑐
1

Differen�al Amplifier
Superposi�on!

𝑉𝑉𝑜𝑜 = 𝑉𝑉𝑜𝑜1 + 𝑉𝑉𝑜𝑜2

𝑅𝑅𝑔𝑔 𝑅𝑅𝑓𝑓 𝑅𝑅𝑓𝑓

𝑉𝑉𝑜𝑜 = 𝑉𝑉2 � � �1 + � − 𝑉𝑉1
𝑅𝑅𝑔𝑔 + 𝑅𝑅2 𝑅𝑅1 𝑅𝑅1

If 𝑅𝑅1 = 𝑅𝑅2 , 𝑅𝑅𝑓𝑓 = 𝑅𝑅𝑔𝑔 If 𝑅𝑅1 = 𝑅𝑅2 = 𝑅𝑅𝑓𝑓 = 𝑅𝑅𝑔𝑔

𝑅𝑅𝑓𝑓
𝑉𝑉𝑜𝑜 = (𝑉𝑉2 − 𝑉𝑉1 ) ∙ 𝑉𝑉𝑜𝑜 = 𝑉𝑉2 − 𝑉𝑉1
𝑅𝑅1