Chapter - 3
Chapter - 3
Computer Organization
Outline
Memory
CPU
Computer organization
The 80x86 family of CPUs
Interrupts
Registers
Interrupts
Outline
Interrupts
Purpose of Interrupts
Type of Interrupts
Interrupt vectors
Interrupt vector table
Interrupt
An Interrupt is either a Hardware
generated CALL (externally
derived from a hardware signal)
OR
A Software-generated CALL
(internally derived from the
execution of an instruction or by
some other internal event
An interrupt is used to cause a temporary halt in the
execution of program.
The meaning of ‘interrupts’ is to break the sequence
of operation.
While the Microprocessor is executing a program, an
‘interrupt’ breaks the normal sequence of execution
of instructions, diverts its execution to some other
program called Interrupt Service Routine (ISR).
After executing ISR, IRET returns the control back
again to the main program. Interrupt processing is an
alternative to polling.
Interrupts
The keyboard controller can hold only a single keystroke. Therefore, the keyboard
controller must be freed before the next keystroke arrives.
The keystroke is passed to the CPU by putting it in the keyboard buffer.
So, the keyboard controller keeps on passing the keystroke input to the CPU,
but how does the CPU attend to it? The CPU is not at the disposal of the keyboard
controller; it is usually busy doing several other operations.
So, we need some mechanism to indicate to the CPU that a keystroke has arrived.
How is this done? There are two approaches to making sure that the CPU pays
attention:
The CPU executes other program, as soon as a key is
pressed, the Keyboard generates an interrupt.
The CPU will response to the interrupt – read the data.
After that returns to the original program.
So by proper use of interrupt, the CPU can serve
many devices at the “same time”
The Purpose of Interrupts
Interrupts are useful when interfacing I/O devices at
relatively low data transfer rates, such as keyboard inputs.
Interrupt processing allows the processor to execute other
software while the keyboard operator is thinking about what
to type next. When a key is pressed, the keyboard encoder
debounces the switch and puts out one pulse that interrupts
the microprocessor.
• a time line shows typing on a keyboard, a printer
removing data from memory, and a program
executing
• the keyboard interrupt service procedure, called
by the keyboard interrupt, and the printer
interrupt service procedure each take little time to
execute
Types of interrupts
Types Of Interrupt
SOFTWARE INTERRUPTS: There are instructions in 8086 which
cause an interrupt.
INT instructions with type number specified.
INT 3, Break Point Interrupt instruction.
INTO, Interrupt on overflow instruction.
HARDWARE INTERRUPTS: The primary sources of interrupts,
however, are the PCs timer chip, keyboard, serial ports, parallel
ports, disk drives, CMOS real time clock, mouse, sound cards, and
other peripheral devices.
Interrupt Vectors
The interrupt vector table contains 256 four byte entries, containing
the CS:IP
Interrupt vectors for each of the 256 possible interrupts.
The table is used to locate the interrupt service routine addresses for
each of those interrupts. The Interrupt vector table is located in the
first 1024 bytes of memory at addresses 000000H-0003FFH.It
contains the address(segment and offset)of the interrupt service
provider
The interrupt vector table for the microprocessor and (b) the contents of an interrupt vector.
violations follows
Cont…
PROTECTION VIOLATIONS Type 14
(a) Descriptor table limit exceeded
Chapter four
Outline
Introduction to Assembly Language
Basic Elements of Assembly Language
Assembly, Machine, and High-Level Languages
Defining Data Types
Assembly Directives
Assembly Language Programming Tools
Introduction
Levels of Programming Languages
1) Machine Language
Consists of individual instructions that will be executed by the CPU one at a time
2) Assembly Language (Low Level Language)
Designed for a specific family of processors (different processor groups/family has different
Assembly Language)
Consists of symbolic instructions directly related to machine language instructions one-for-one
and are assembled into machine language.
3) High Level Languages
e.g. : C, C++ and Vbasic
45
Integer Constants
Optional leading + or – sign
binary, decimal, hexadecimal, or octal digits
Common radix characters:
h – hexadecimal
d – decimal
b – binary
r – encoded real
Examples: 30d, 6Ah, 42, 1101b
Hexadecimal beginning with
46 letter: 0A5h
Integer Expressions
Operators and precedence levels:
Examples:
47
Character and String Constants
Enclose character in single or double quotes
'A', "x"
ASCII character = 1 byte
Enclose strings in single or double quotes
"ABC"
'xyz'
Each character occupies a single byte
Embedded quotes:
'Say "Goodnight," Gracie'
48
Reserved Words and Identifiers
Reserved words cannot be used as identifiers
Instruction mnemonics(such as MOV, ADD, and MUL),
directives, type attributes, operators, predefined symbols
Identifiers
1-247 characters, including digits
49
Directives
Commands that are recognized and acted upon by the
assembler
Not part of the Intel instruction set
Used to declare code, data areas, select memory model,
declare procedures, etc.
E.g. myVar DWORD 26 ; DWORD directive
move ax, myVar ; MOV instruction
Different assemblers have different directives
NASM != MASM, for example
50
Directives
In MASM, directives are case insensitive.
different types directives
Defining Segments: One important function of assembler directives is to define
program section, or segments.
.DATA directive identifies the area of a program containing variables:
.data
.model
directive instructs the assembler to generate
code for a protected mode program, and
STDCALL enables the calling of MS-
Windows functions.
Flat, small
Instructions
An instruction is a statement that becomes executable We use the Intel IA-32 instruction set
when a program is assembled.
Syntax:
Instructions are translated by the assembler into
machine language bytes, which are loaded and [label] mnemonic(opcode) operand(s) [;comment]
executed by the CPU at run time. label optional
The major two fields are: instruction mnemonic required: such as MOV, ADD,
SUB, MUL
Opcode field which stands for operation code
operands usually required
and it specifies the particular operation that is to
comment optional
be performed.
An instruction contains:
Each operation has its unique opcode.
Operands fields which specify where to get the Label
source and destination operands for the Mnemonic
operation specified by the opcode. Operand
The source/destination of operands can be a constant, Comment
the memory or one of the general-purpose registers. 53
Labels
Act as place markers Code label
marks the address (offset) of target of jump and loop
code and data instructions
Follow identifier rules example: L1:
MOV ax, bx …
Data label JMP L1
must be unique (followed by colon)
example:
count DWORD 100
(not followed by colon)
54
Mnemonics and Operands
Instruction Mnemonics
"reminder"
examples: MOV, ADD, SUB, MUL, INC, DEC
Operands
constant (immediate value i.e. 4 or 0-9)
constant expression(2*4)
Register(eax, ax)
memory (data label)
55
Comments
Comments are good! Multi-line comments
explain the program's purpose begin with COMMENT directive and
a programmer-chosen character
when it was written, and by end with the same programmer-
whom chosen character
revision information Example:
tricky coding techniques
application-specific COMMENT ! This is a comment.
explanations This line is also a comment. !
Single-line comments
begin with semicolon (;)
Instruction Format Examples
No operands
stc ; set Carry flag
One operand
inc eax ; register
inc myByte ; memory
Two operands
add ebx,ecx ; register, register
sub myByte,25 ; memory, constant
add eax,36 * 25 ; register, constant-expression
Suggested Coding Standards
Some approaches to capitalization
capitalize nothing
capitalize everything
capitalize all reserved words, including instruction mnemonics and
register names
capitalize only directives and operators
Other suggestions
descriptive identifier names
spaces surrounding arithmetic operators
blank lines between procedures
Suggested Coding Standards
Indentation and spacing
code and data labels – no indentation
executable instructions – indent 4-5 spaces
comments: begin at column 40-45, aligned vertically
1-3 spaces between instruction and its operands
ex: mov ax,bx
1-2 blank lines between procedures
Program Template
TITLE Program Template (Template.asm)
; Program Description:
; Author:
; Creation Date:
; Revisions:
; Date: Modified by:
INCLUDE Irvine32.inc
.data; (insert variables here)
.code
main PROC ; (insert executable instructions here)
exit ;exit to operating system
main ENDP; (insert additional procedures here)
END main
Example: Adding and Subtracting Integers
TITLE Add and Subtract (AddSub.asm)
; This program adds and subtracts 32-bit integers.
INCLUDE Irvine32.inc
.code
main PROC
mov eax,10000h ; EAX = 10000h
add eax,40000h ; EAX = 50000h
sub eax,20000h ; EAX = 30000h
call DumpRegs ; display registers//EAX=00030000
exit
main ENDP
END main
Assembly Language Programming Tools
Software tools are needed for editing, assembling, linking, and
debugging assembly language programs
An assembler is a program that converts source-code
programs written in assembly language into object files in
machine language
Popular assemblers includes …
TASM (Turbo Assembler from Borland)
NASM (Netwide Assembler for both Windows and Linux), and
GNU assembler distributed by the free software foundation
MASM- Microsoft Macro Assembler
Linker and Link Libraries
You need a linker program to produce executable files
Symbolic Constants
Associate and identifier (a Equal-Sign Directive
Syntax: name = expression
symbol) with an integer
expression is a 32-bit integer (expression or
expression or some text constant)
may be redefined
Symbols do not reserve name is called a symbolic constant
Chapter Five
Outline
Branch instruction
Conditional loop instruction
Comparisons
Conditional control Instructions
Decision Directive
JMP and LOOP Instruction
A transfer of control, or branch, is a way of altering the order in which
statements are executed. There are two basic types of transfers:
Unconditional Transfer: Control is transferred to a new location in all cases; a new address
is loaded into the instruction pointer, causing execution to continue at the new address. The
JMP instruction does this.
Conditional Transfer: The program branches if a certain condition is true. A wide variety
of conditional transfer instructions can be combined to create conditional logic structures.
The CPU interprets true/false conditions based on the contents of the ECX and Flags
registers.
Unconditional Transfer
CALL : Unconditional Call
This instruction is used to call a Subroutine (Procedure) from
a main program. Address of procedure may be specified
directly or indirectly.
There are two types of procedure depending upon whether it
is available in the same segment or in another segment.
i. Near CALL i.e., ±32K displacement.
ii. For CALL i.e., anywhere outside the segment.
Cont…
On execution this instruction stores the incremented IP & CS onto
the stack and loads the CS & IP registers with segment and offset
addresses of the procedure to be called.
RET: Return from the Procedure.
At the end of the procedure, the RET instruction must be executed. When it
is executed, the previously stored content of IP and CS along with Flags are
retrieved into the CS, IP and Flag registers from the stack and execution of
the main program continues further.
Cont…
INT N: Interrupt Type N.
In the interrupt structure of 8086, 256 interrupts are defined corresponding to
the types from 00H to FFH. When INT N instruction is executed, the type
byte N is multiplied by 4 and the contents of IP and CS of the interrupt
service routine will be taken from memory block in 0000 segment.
INTO: Interrupt on Overflow
This instruction is executed, when the overflow flag OF is set. This is
equivalent to a Type 4 Interrupt instruction.
JMP: Unconditional Jump
JMP Instruction The JMP instruction causes an unconditional transfer to a
destination, identified by a code label that is translated by the assembler into an
offset. The syntax is
JMP destination
The loop destination must be within -128 to +127 bytes of the current location counter. The
execution of the LOOP instruction involves two steps:
First, it subtracts 1 from ECX.
Next, it compares ECX to zero.
If ECX is not equal to zero, a jump is taken to the label identified by destination.
Otherwise, if ECX equals zero, no jump takes place, and control passes to the instruction following the loop.
In the following example, we add 1 to AX each time the loop repeats. When the loop ends, AX
= 5 and ECX = 0:
Nested Loops When creating a loop inside another loop, special
consideration must be given to the outer loop counter in ECX. You can
save it in a variable:
Logic:
ECX ←ECX –1;
if ECX > 0 and ZF=0, jump to destination
Useful when scanning an array for the first element that matches a given value.
LOOPNZ
The following code finds the first positive value in an array:
Conditional jumps
Conditional Structures
There are no explicit high-level logic structures in the x86 instruction set, but you can
implement them using a combination of comparisons and jumps. Two steps are involved in
executing a conditional statement: First, an operation such as CMP, AND, or SUB modifies
the CPU status flags. Second, a conditional jump instruction tests the flags and causes a
branch to a new address. Let’s look at a couple of examples.
Example 1 The CMP instruction in the following example compares EAX to Zero. The JZ
(jump if Zero) instruction jumps to label L1 if the Zero flag was set by the CMP instruction:
Example 2 The AND instruction in the following example performs a bitwise AND on the DL register,
affecting the Zero flag. The JNZ (jump if not Zero) instruction jumps if the Zero flag is clear:
unsigned operands
Jumps based on comparisons of signed
operands
Equality Comparisons
The table lists jump instructions based on
evaluating equality. In some cases, two operands
are compared; in other cases, a jump is taken Following are code examples that use the JE, JNE,
JCXZ, and JECXZ instructions. Examine the
based on the value of CX or ECX. In the table, the comments carefully to be sure that you understand
notations left Op and right Op refer to the left why the conditional jumps were (or were not) taken.
(destination) and right (source) operands in a CMP
instruction:
CMP left Op, right Op
The operand names reflect the ordering of
operands for relational operators in algebra. For
example, in the expression X < Y, X is called left
Op and Y is called right Op.
Unsigned Comparisons
Signed Comparisons Table below displays a list
Jumps based on comparisons of unsigned numbers are
of jumps based on signed comparisons. The
shown in Table below. The operand names reflect the
following instruction sequence demonstrates the
order of operands, as in the expression (leftOp < rightOp).
comparison of two signed values:
The jumps in Table are only meaningful when comparing
unsigned values. Signed operands use a different set of
jumps.
Cont…
In the following code examples, examine the comments to be sure you understand why the
jumps were (or were not) taken.
Conditional structures
In assembly, it is possible to use different control structures
like high-level languages.
Let’s start with the most common high-level control structure:
if-then-else in C or C++
In the following C++ code, two assignment statements are
executed if op1 is equal to op2:
if( op1 == op2 ) then
{ We translate this IF statement into assembly language
with a CMP instruction followed by conditional jumps.
X = 1; Y = 2;
}
Cont..
The following code implements the IF statement as efficiently as possible by allowing
the code to “fall through” to the two MOV instructions that we want to execute when the
Boolean condition is true:
mov ax,op1
if( op1 == op2 ) then cmp ax,op2 ;op1 == op2?
{ jne L1 ; no: skip next
mov X,1 ; yes: assign X and Y
X = 1; Y = 2; mov Y,2
} L1:
If we implemented the ==operator using JE, the resulting code would be slightly less compact (six instructions rather
than five):
mov ax,op1
cmp ax,op2 ;op1 == op2?
je L1 ; yes: jump to L1
jmp L2 ; no: skip assignments
L1: mov X,1 ; assign X and Y
mov Y,2
L2:
Cont…
Nested IF statement
if op1 == op2 then
if X > Y then
call Routine1
else
call Routine2
end if
else
call Routine3
end if
In the following implementation, the code branches to L1 if the first expression is true; otherwise, it falls
through to the second CMP instruction. The second expression reverses the > operator and uses JBE
instead:
For a given compound expression there are multiple way of implementing in assembly langauge.
WHILE Loops
A WHILE loop tests a condition first before performing a block of statements. As long as the
loop condition remains true, the statements are repeated.
The following loop is written in C++:
When implementing this structure in assembly language, it is convenient to
reverse the loop condition and jump to endwhile if a condition becomes true.
Assuming that val1 and val2 are variables, we must copy one of them to a
register at the beginning and restore the variable’s value at the end:
MASM generates "hidden" code for you, consisting of code labels, CMP and conditional jump
instructions.
Relational and Logical Operators
MASM-Generated Code
. . . unless you prefix one of the register operands with the SDWORD PTR operator.
Then a signed jump is generated.
.REPEAT Directive
Executes the loop body before testing the loop
condition associated with the .UNTIL directive.
Example
.WHILE Directive
Tests the loop condition before executing the loop
body The .ENDW directive marks the end of the loop.
Example: