Experiment No: 02
Experiment Name: To Verify De Morgan’s law.
Objectives:
To prove De Morgan’s Laws using logic gates.
To verify the equivalence of the two forms of De Morgan’s Laws:
1. A . B = A + B 2. A+B = A . B
For understanding the application of De Morgan’s Laws in simplifying
digital circuits.
Description:
De Morgan’s Theorems establish relationships between fundamental logic
operations (AND, OR, and NOT) using complementation. These theorems are
useful in simplifying Boolean functions and enhancing the efficiency of digital
circuits.
Explanation of Theorems:
First Theorem: The negation of an AND operation is equal to the OR of the negated
variables. Mathematical Representation: (A . B)’ = A’ + B’
Second Theorem: The negation of an OR operation is equal to the AND of the negated
variables. Mathematical Representation: (A + B)’ = A’ . B’
Experimental Setup:
1. Digital trainer kit
2. Logic gate ICs (7408 - AND, 7432 - OR, 7404 - NOT, 7400 - NAND, 7402 - NOR)
3. Connecting wires
4. LED indicators
5. 5V DC power supply
Procedure:
To verify the first theorem, a circuit was built using an AND gate, and its output was taken. The
output was then passed through a NOT gate to obtain the complement. In another setup, both
inputs were first inverted using NOT gates before being fed into an OR gate. The outputs of both
circuits were compared to confirm their equivalence. Similarly, for the second theorem, a circuit
was created using an OR gate, and its output was recorded. This output was then complemented
using a NOT gate. In another arrangement, both inputs were individually negated using NOT
gates and then passed through an AND gate. The outputs of both setups were examined to verify
their similarity.
Figure:
Figure 1: DE Morgan's 1st law.
Figure 2 : DE Morgan's 2nd
law.
A B A.B (A.B) A B A+B A+B A+B A.B
0 0 0 1 1 1 1 0 1 1
0 1 0 1 1 0 1 1 0 0
1 0 0 1 0 1 1 1 0 0
1 1 1 0 0 0 0 1 0 0
Figure 3: Truth Table of De Morgan’s law
Conclusion:
The experiment successfully confirmed the validity of De Morgan’s Laws
through logic gate implementations. The circuits demonstrated that the
output for (A . B)’ matched A’ + B’ for all input combinations, affirming the
first theorem. Similarly, the output for (A + B)’ equaled A’ . B’, validating the
second theorem.
Minor deviations in expected outputs were noted due to wiring issues or
loose connections, which were rectified during testing. This experiment
emphasized the real-world significance of De Morgan’s Laws in simplifying
logic circuits and Boolean expressions
