Support of IRIG 106-05, Chapter 4 Pulse Code Modulation Standards
White Paper
Version 1.0
April 2007
IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
PCM Telemetry Standards IRIG 106-05, Chapter 4
The flight telemetry community relies on standards to support its rigorous testing and operational objectives. Over time, the industry has grown to expect and demand compliance with IRIG 106-05 Chapter 4 as a standard feature of any top-tier telemetry ground station handling pulse code modulated (PCM) data. The IRIG 106 Telemetry Standards documents, published by the Telemetry Group (TG) of the Range Commanders Council (RCC), are intended to foster the compatibility of telemetry transmitting, receiving, and signal processing equipment at the member ranges under the cognizance of the RCC. The Range Commanders highly recommend that telemetry equipment operated by the ranges and telemetry equipment used in programs that require range support conform to these standards. 1 IRIG 106-05 Chapter 4, entitled Pulse Code Modulation Standards, is comprised of two (2) types, Class I and Class II. Every vehicle that telemeters PCM data and operates at a U.S. Military Range completely inside its boundaries is required to meet the characteristics of Class I. The IRIG 106 specification is continuously evolving and the addition of more advanced PCM telemetry stream characteristics have more recently been added as Class II characteristics. Class II requirements are highly encouraged but are not mandatory, and they require concurrence of the U.S. Military Range hosting the telemetry application under test.
Class I and Class II Compliance and L-3 Vista VME Systems
As Class II characteristics have become more widespread over the past several years, these characteristics have become incorporated as standard product offerings by ground station vendors serving the telemetry range community. In response to changing requirements of the IRIG 106 standards, L-3 Communications Telemetry & RF Products has designed a combination of digital hardware modules and real-time software processing solutions that achieve compliance with the mandatory Class I standards as well as the additional characteristics required of a Class II PCM telemetered stream within the context of a complete telemetry ground system. Table 1 describes the IRIG 106-05, Chapter 4 Specifications and the manner in which L-3 systems achieve compliance. L-3s PCI Mezzanine Card (PMC) Bit Synchronizer and Decommutator boards, developed for its industry-leading VME-based telemetry processing systems (Vista 450V, Vista 550V) are designed to meet the requirements of the most demanding telemetry applications. In the course of fielding over 1,000 telemetry systems worldwide, we have improved our hardware-based decommutation capabilities significantly over the years, culminating in our latest-generation PMC modules capable of handling PCM data rates to 50 Mbps, along with the hardware migration from formerly full-slot VME (9U) cards to space-efficient quarter-slot PMCs mounted on mezzanine carrier modules. To complement our pace-setting hardware capabilities, L-3 has also developed powerful software processing engines and software-based decommutator functions. Most software data processing tasks within the L-3 Vista VME systems take place on a Field Programmable Processor (FPP), a dedicated hardware processing module that provides the system with linear-scalable capability, with each processor running its own real-time operating system, VxWorks. FPP processing algorithms are
1
IRIG STANDARD 106-01, PART II, Telemetry Networks, May 2001. by Secretariat, Range Commanders Council, U.S. Army White Sands Missile Range.
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IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
written in the C programming language, providing the user a uniquely powerful, fully programmable real-time processing engine to create and run custom functions for data manipulation. The FPP is currently in its fifth generation FPP5, and it provides users a powerful differentiator for advanced telemetry processing when compared to systems that rely upon software-only processing engines.
Bit Rates
L-3s decommutators and bit synchronizers can handle data rates much higher than the required 10 Mbps, with the capability to decommutate PCM data streams up to 50 Mbps.
Word Lengths
The FPP supports word lengths in excess of 32 bits through the concatenation of two or more words, which are then processed through the system and output accordingly. For further information concerning how this is accomplished, including examples, please refer to the L-3 Communications Telemetry & RF Products white paper Processing 64-Bit Data Words.
Fragmented Words
Fragmented words are data words that are broken up into two or more non-consecutive word locations in a single major frame of PCM telemetered data. The FPP handles fragmented words using a combination of bit compression a bit masking and right justifying algorithm and concatenation algorithms to manage fragmented words transparently to the system user.
Time Words
Class I requires the ability to add time words to the PCM stream and telemeter them to the ground. L3 Communications Telemetry & RF Products performs this task in the FPP software processing engine in order to support both 16-bit and 12-bit methods of inserting time words. This calls for a combination of concatenations and bit-mask algorithms. Alternatively, the user may also write a custom algorithm using the Vista FPP Algorithm Development Kit, to handle these words directly.
Frame Lengths
L-3 has increased the number of words and therefore bits per major frame over previous decommutator offerings. Todays PMC Decommutators can handle up to 4M words per major frame, exceeding the characteristics required by Class II.
Subframe Synchronization Method
Typically subframes utilize a subframe identifier word, SFID, although this not the only method available to create PCM subframes in the Vista VME systems. If multiple subframes are required, the user can employ an additional SFID counter, or they can alternatively make use of other subframe synchronization methods such as unique recycle code (URC) or frame code complement (FCC). These codes provide the ability to add multiple subframe synchronization patterns to the major frame of the PCM stream for improved accuracy and data extraction ability.
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Specifications subject to change without notice. All trade names and product names referenced are trademarks, registered trademarks, or trade names of respective holders.
IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
Uneven Spacing of Data Words
Each of our decommutators both hardware and software versions handles the uneven spacing of data words. When an individual parameter is setup, the user has the ability to create as many occurrences of this parameter as desired. This allows the parameter to be setup with many different super- and sub-commutation definitions to allow for uneven spacing in the definition of data words.
Format Changes
Our current-generation PMC Decommutators handle the 16 different format switches allowed by the Class II characteristics. In the past, not all of L-3s VME-based decoms were capable of handling 16 different PCM formats in one telemetered PCM stream.
Asynchronous Embedded Formats
Asynchronous embedded formats are available through the FPP by using the software decommutation algorithm. The data is passed from the hardware decom to the software decom, allowing the user to setup the additional decom the embedded stream format, where it will be processed whenever its data occurs. Since two embedded asynchronous formats are allowed by the Class II characteristics, a second software decom may be used. In fact, the Vista systems allow for more than two embedded asynchronous streams, thereby exceeding the Class II characteristics.
Packet Telemetry
The transmission of packet telemetry is another characteristic of a Class II PCM telemetered stream, typically in the format specified by the Consultative Committee for Space Data Systems (CCSDS). In a CCSDS packetized structure, the decommutator accepts the data and transfers the packets to the FPP where the Vista-CCSDS algorithm depacketizes the data and processes it accordingly. In addition, the FPP can accept Ethernet input directly, allowing the packet data to be processed immediately without having to first pass through another hardware module.
User-Defined Functionality
The FPP provides extensive standard libraries of algorithmic functions numbering in excess of 200 plus the capability to create your own user-defined algorithms as needed to achieve the desired results. The availability of the FPP Algorithm Development package makes it possible to exceed or refine the Class II characteristics as the user deems necessary. The FPP also provides additional real-time processing capability, allowing the user to obtain more pertinent and timely information from their telemetered PCM data stream, whether or not required specifically by the IRIG 106-05 Class I and Class II standards. Therefore, as a standard feature of all L-3 VME-based systems, the FPP provides the ability to exceed the Class II characteristics. For more information and benchmarks on the capabilities of the Field Programmable Processor, please refer to the L-3 Communications Telemetry & RF Products FPP5 Upgrade Path White Paper. Since the IRIG 106 specification continues to be updated on a regular basis, readers should note the ease of adding capabilities to the FPP through the Vista Algorithm Development Environment. Future additions to the specification, depending on complexity, may not even call for an upgrade to your existing telemetry ground system, given the inherent modification capability of the FPP.
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Specifications subject to change without notice. All trade names and product names referenced are trademarks, registered trademarks, or trade names of respective holders.
IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
Typical VME System that Meets and Exceeds Chapter 4, Class II
Below is an example of a typical VME configuration from L-3 Communications Telemetry & RF Products, featuring the Vista 450V system and its 6-slot Avalon chassis along with the Vista 550V system and its 20-slot Base 550 chassis. This example depicts the minimum hardware and software components needed to both meet and exceed the IRIG 106-05, Chapter 4, Class I and Class II specifications. L-3 leads the industry with nearly 1,000 deployments of similar systems to practically every U.S. Military Range covering a majority of the significant telemetry flight test programs over the past 20 years.
FPP (4 or 5) Standard Processing EU conversion Limit checks Algorithm Processing Software decommutation Data Gather Outputs to Networks
Vista Avalon / 550 IRIG 106-05 Processing
FPP (4 or 5) Class II Processing Processing for 64 bit words Fragmented word processing Asynchronous embedded formats (software decommutation supports format switching) Tagged data formats Packet Telemetry (CCSDS) Asynchronous data transmission Merger of multiple format types
PCM Decommutator Main Frame decommutation Subframe decommutation Supercom decommutation Main Frame format switching Full IRIG 106-06 Class I Support Full IRIG 106-05 Class II Support with FPP processing
Ethernet
Ethernet Switch
Ethernet
FPP4 or FPP5 Data I/O Processing
S/W Decom S/W Decom
PCM Stream Input 1 Simulated PCM
PMC Carrier Module
PMC Bit Sync PMC Decom/ Sim
Embedded Streams
Vista Server
System Controller
OR
550 Processing System
Avalon Processing System
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Specifications subject to change without notice. All trade names and product names referenced are trademarks, registered trademarks, or trade names of respective holders.
IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
Additional Modules to Meet and Exceed the IRIG 106 Standards
Another purpose of this paper is to provide some examples to illustrate how a Vista VME system from L-3 Communications Telemetry & RF Products can meet the requirements for an IRIG 106-05, Chapter 4, Class II telemetered PCM stream. The information in the IRIG 106-05 specification provides for more capability than what is listed in a Class II stream. With this in mind, a Vista VME system has many other capabilities available to it that can handle the additional specifications listed by the IRIG 106-05 standard. Below is an example of such a system providing these enhanced telemetry processing capabilities.
FPP (4 or 5) Standard Processing EU conversion Limit checks Algorithm Processing Software decommutation Data Gather Outputs to Networks
Vista Avalon / 550 IRIG 106-05 Processing
FPP (4 or 5) Class II Processing Processing for 64 bit words Fragmented word processing Asynchronous embedded formats (software decommutation supports format switching) Tagged data formats Packet Telemetry (CCSDS) Asynchronous data transmission Merger of multiple format types
More FPPs (Optional) Processing Client PCs or other Network Assets Ethernet FPP4 or FPP5 Processing Data I/O PCM Stream Input 1 PCM Stream Input 2 Simulated PCM
PMC Bit Sync S/W Decom S/W Decom
Ethernet Switch
Ethernet
More I/O Modules (Optional) PMC Carrier Module
PMC Decom/ Sim PMC Bit Sync PMC Decom
Embedded Streams
PMC Carrier Module IRIG Time
PMC Time Code
Bridge 5 System Controller
Vista Server
OR
Avalon Processing System
PCM Decommutator Main Frame decommutation Subframe decommutation Supercom decommutation Main Frame format switching Full IRIG 106-06 Class I Support Full IRIG 106-05 Class II Support with FPP processing
550 Processing System
This system provides the additional capabilities using both software and hardware -- called out by the IRIG 106-05 standard. These functions are available in both the Vista 450V and Vista 550V configurations.
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All products are controlled by the U.S. Dept. of Commerce under Export Administration Regulations.
Specifications subject to change without notice. All trade names and product names referenced are trademarks, registered trademarks, or trade names of respective holders.
IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
Appendix A IRIG 106-05, Chapter 4 Specifications
This appendix lists the characteristics required of a Class I and Class II telemetered PCM data stream according to the specifications of IRIG 106-05, Chapter 4. The columns following each characteristic describe the manner by which this requirement is met on a Vista-based VME system from L-3 Telemetry & RF Products. IRIG 106-05, Chapter 4 Specifications
4.1 General 4.2 Class Distinctions and Bit-Oriented Characteristics 4.2.2 Bit-Oriented Distinctions and Requirements 4.2.2.1 Binary Bit Representations 4.2.2.2 Serial Bit Stream Transitions 4.2.2.3 Bit Rate 4.2.2.4 Bit Rate Accuracy and Stability 4.2.2.5 Bit Jitter 4.3 Fixed Formats 4.3.1 Word-Oriented Definition and Requirements 4.3.1.1 Word Length (Class I and II) 4.3.1.2 Fragmented Word (Class II) 4.3.1.3 Bit Numbering 4.3.1.4 Word Numbering 4.3.2 Frame Structure 4.3.2.1 Minor Frame 4.3.2.1.1 Minor Frame Length (Class I and II) 4.3.2.1.2 Minor Frame Composition 4.3.2.1.3 Minor Frame Synchronization 4.3.2.1.4 Transmitted Frame Counter 4.3.2.2 Major Frame 4.3.2.2.1 Major Frame Length
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Capability
Module(s)
Yes Yes Bit Synchronizer 128 Continuous Yes See Bit Rates Section Yes Yes
BSZ532 BSZ532, DCZ534, DCZ543, DCZ545 BSZ532, DCZ534, DCZ543, DCZ545 BSZ532, DCZ534, DCZ543, DCZ545 BSZ532
Yes See Word Lengths Section Yes See Fragmented Words Section Yes
DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525
Yes
Yes Decommutators 65,536 Words Yes
Yes
Yes
DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525
Yes See Frame Length Section
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IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
4.3.2.2.2 Minor Frame Numbering 4.3.2.3 Subcommutation 4.3.2.3.1 Subframe
Yes Decommutators 1,024 Subframes Yes
Yes Yes See Subframe Synchronization Method Section Yes Yes See Format Changes Section Yes
DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525
4.3.2.3.2 Subframe Synchronization Method
4.3.2.4 Supercommutation 4.4 Format Change (Class II) 4.4.1 Frame Format Identification 4.4.2 Format Change Implementation Methods 4.4.2.1 Measurement List Change
Yes Yes See Decom Data Sheets for Capabilities Yes See Asynchronous Embedded Formats Section Yes Yes Factory Quote Yes Factory Quote Yes See Time Words Section Yes Yes Yes Yes Yes Yes
4.4.2.2 Format Structure Change
4.5 Asynchronous Embedded Format (Class II) 4.6 Tagged Data Format (Class II) 4.6.1 Alternating Tag and Data 4.6.2 Bus Data, Military Standard (MIL-STD) 1553 4.6.3 Bus Data, ARINC 429 4.7 Time Words 4.7.1 16-Bit Standardized Time Word Format 4.7.2 Microsecond Time Word 4.7.3 Low Order Time Word 4.7.4 High Order Time Word 4.7.5 Time Word Order 4.7.6 Insertion into PCM Word Sizes other than 16 Bits 4.8 Asynchronous Data Merge (Class II) 4.8.1 PCM Data Word Format 4.8.2 Insertion Process
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FPP523-256, FPP525
FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 FPP523-256, FPP525
Yes Yes
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IRIG 106-05 Chapter 4 White Paper, v1.
April 2007
4.8.2.1 Transmission Overhead 4.8.2.2 Parity Bit 4.8.2.3 Data Bits 4.8.2.4 Stale Data Bit 4.8.2.5 Overflow Bit 4.8.2.6 Insertion Rate
Yes
Yes
Yes Yes Yes Yes
DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525 FPP523-256, FPP525 FPP523-256, FPP525 DCZ534, DCZ543, DCZ545, FPP523-256, FPP525
Printed in USA/ ML581 Rev. A
All products are controlled by the U.S. Dept. of Commerce under Export Administration Regulations.
Specifications subject to change without notice. All trade names and product names referenced are trademarks, registered trademarks, or trade names of respective holders.
