Microprocessor Systems

Asst.Prof.Dr. Haldun Sarnel

Dokuz Eyll University

Class Materials
Text

book

Ramesh S. Gaonkar, The Z80 Microprocessor

architecture , Interfacing, Programming, and
Design, 2005, Third Edition
ISBN: 978-81-87972-14-3
Penram International Publishing (India)
http://www.penram.com/
Lecture

Notes
Several related .pdf files

Advances in Semiconductor
Technology

IC- Integrated Circuits few transistors and diodes on

one chip
SSI small scale Integration few gates on one chip
MSI- Medium scale Integration- 100 gates on a chip
LSI Large Scale Integration 1000 gates on a chip
VLSI Very large scale Integration
SLSI Super Large Scale Integration

Borders between VLSI and SLSI are not strict.

Moores Law
1965 prediction by Intel cofounder
Gordon Moore:
The number of transistors that can be
built on the same size piece of silicon
will double every 18 months

Where is the Microprocessor ?

It

is inside of every device that we have

such as computer , printers , mobile ,
etc..

What is the Microprocessor?

Multipurpose , programmable logic device.

Reads Instructions from the Memory
Accepts binary input data
Process the data according to the instructions
Produces Output

A typical Programmable
Machine/System
Microprocessor

, Memory, and I/O

Memory

Microprocessor
I/O

The System Components

Hardware

Physical Devices
Program a group of instructions
preformed by the microprocessor
Software a group of programs
Memory
Microprocessor
I/O

Microprocessor vs.
Microcontroller

Microprocessor

single-chip only contains a CPU (Central Processing Unit) like the kind used in a PC
bus is available on the chip pins
ROM and RAM capacity, number of ports are selectable during system design
RAM is usually larger than ROM
includes some of the components on a chip and other components are used as
peripherals.
suitable to processing information in computer systems.

Microcontroller

single-chip contains CPU, RAM, ROM, Peripherals, I/O port

bus can be provided at ports (pins) if needed
internal hardware is fixed
ROM is usually larger than RAM
includes all of the required components on one chip.
suitable to control of I/O devices in designs requiring a minimum component

What numbering System a

Microprocessor Uses?
Binary System
A Bit is 0 or 1
The processor processes a group of bits called
Word.
The word size could be:
8-bit, 16-bit, 32-bit, or 64-bits
Therefore, the processor is named after the word
size. e.g. We say 8-bit Microprocessor

A Microprocessor as a
Programmable Device
The

piano is a programmable
machine

With its key , we can generate notes

The

Microprocessor has
different instructions :

Can be combined in different ways to

generate different programs.

Instructions are stored in a Memory

The Memory

Word Addressing

Given M words , how many bits l are required to address

them?

l log 2 M

Example: to address 64 MB
(1 million words is 1024 x 1024),

we need :

l log 2 (64 * 2 ) 26 bits

20

Memory Organization

Viewed as a large, single-dimension array, with an address

A memory address is an index into the array
"Byte addressing" means that successive addresses are one byte apart
0

8 bits of data

8 bits of data

8 bits of data

8 bits of data

8 bits of data

8 bits of data

8 bits of data

...

Types of Memory

Cache Memory

Serves as a buffer for frequently accessed data

Small High Cost

RAM (Main Memory)

Stores programs and data that the computer needs when executing a
program
Dynamic RAM (DRAM)

Uses Tiny Capacitors

Needs to be recharged every few milliseconds to keep the stored data

Static RAM (SRAM)

Holds its data as long as the power is on

D Flip Flop

Types of Memory (Cont.)

ROM

Programmable Read Only Memory (PROM)

Can be programmed once using appropriate equipment

Erasable PROM (EPROM)

Stores critical information necessary to operate the system.

Hardwired can not be programmed

Can be programmed with special tool

It has to be totally erased to be reprogrammed

Electrical Erasable PROM (EEPROM)

No special tools required

Can erase a portion

Memory Hierarchy

The idea

Hide the slower memory behind the fast memory

Cost and performance play major roles in selecting the memory.

Input / Output
Input

Devices

Switches , Keyboard, .
Output

Devices:

Seven Segments (LEDs), printer , Monitor ,..

The

processor reads the instructions from the

memory , data from the input devices,
processes them, produces the output

Microprocessor as CPU

-The CPU includes ALU, control

Units , and Various Registers
-Known as Microprocessor

The Von Neumann Model

It uses von Neumann

execution cycle
(also called the fetchdecode-execute cycle)

The Von Neumann Model (cont.)

A cycle could be as follows:

1.

The control unit fetches the next program

instruction from the memory, using the
program counter to determine where the
instruction is located.

2.

The instruction is decoded into a language

the ALU can understand.

3.

Any data operands required to execute the

instruction are fetched from memory and
placed into registers within the CPU.

4.

The ALU executes the instruction and

places the results in registers or memory.

Instruction Process
Von Neumann execution cycle
Fetch instruction from memory
Decode instruction
Evaluate address
Fetch operands from memory
Execute operation
Store result

Microprocessor Programming

Machine language (machine code)

Microprocessor-specific instruction written in binary format

11001001

Assembly language

English-like text based format (mnemonics)

Add A , B

High level Language

C++, Pascal , , etc.

for (i=0;i<8;i++)

Source Code

Compiler /
Interpreter

Object Code
(machine code)

Assembly Code

Assembler

Object Code
(machine code)

Z80 Instructions and

Alphanumeric Codes

8-bit word length

158 instructions
ASCII American Standard Code for Information
Interchange.

Each character has its equivalent binary format in a 7-bit code

EBCDIC Extended Binary Coded Decimal Interchange

Code 8-bit code

Reading Assignment

Please

read Chapter 1 in the textbook

Microprocessor-Based System

Microprocessor-Based System

Memory
Microprocessor
I/O

Microprocessor Unit (MPU)

Programmable

logic unit with a designed set

of instructions
What it does:

Fetches the instructions from the memory, one by one

Reads the input data from the input units
Performs the data manipulation specified by the

instruction
Writes the data to the output devices

Microprocessor Unit

MPU frequently communicates with the memory, I/O

devices
Fetch, Decode, and Execute operations

Can it be interrupted ?
Program initiated operation interrupt done by a
program.
Peripheral initiated operation interrupt done by external
devices

E.g. important data on the input during writing to the printer

What does it need to do so..

Group

Set

of logic circuits

of signal to transfer information

Control

Clock

signals for timing

circuits

Program-initiated operations
and Buses
Microprocessor

Memory Read

and Memory Operations

Reads instructions or data from the memory

Memory Write

Writes instructions and data into memory

I/O Read

Accepts data from input devices

I/O Write

Writes data to output devices

Program-initiated operations
and Buses

From where to read or to write?

We need an address! Right?

How the input/output will know about the operation?

We need a control signal to tell them

MPU Operations Steps:

Identify the address
Send synchronization SIGNAL control signal
Transfer the binary data

So, how many buses do we need?

Buses

Address Bus
Identify the memory
locations

Data Bus
Holds the data during
transfer operation

Control Lines
For timing signal

Buses
Address

Bus Size - bits

Depends on the number of memory locations that

can be accessed
Z80 has 16 address lines to address 216 locations

Data

Bus Size - bits

Depends on the data to be transferred

Z80 has 8 bits data bus
What

is the maximum memory size Z80 can use?

Externally Initiated operation

Interruptions categories :

Reset e.g. timer to reset everything in the MPU

Interrupt stop temporarily and do something , then come back.

Wait: the memory can not handle the MPU request , wait signal must be
generated.

Bus Request: sometimes the processor is too slow to hand a request that can
be handled faster by another device.
E.g transfer large amount of data through the DMA could be faster than
using the MPU

Memory
Memory

Cell

Q(t+1)

Reset

Set

Memory (Continue)
4-bit

Register

4 X 8 bit register
Input
Input Buffer

WR

A1
A0

2-to-4 Decoder

Register 3
Register 2
Memory Unit
Register 2
Register 0

Output Buffer

RD

Output

How the MPU Writes into the Memory?

MPU places the 16 bit address on the address bus

Memory interfacing circuits will decode address to

specify the target register

MPU Places a byte on the data bus

MPU sends a control signal (Memory Write) to

the memory to write

How the MPU reads from the Memory?

MPU places the 16 bit address on the address bus

Memory interfacing circuits will decode address to

specify the target register

MPU sends a control signal (Memory Read) to the

memory to enable the output buffer

The memory puts the data on the data bus and the
processor will read it

Reading Assignments

Plead read chapter 2

Review
What

are the four operations commonly

performed by the MPU?

Memory Read

Reads instructions or data from the memory

Memory Write

Writes instructions and data into memory

I/O Read

Accepts data from input devices

I/O Write

Writes data to output devices

Question
What

is the function of address Bus ?

Holds memory or I/O addresses

How

many memory locations can addressed

by the MPU with 13 address lines ?

13

How

many address lines are necessary to

address two MB with 8-bit word size?

21 lines

Question
Specify

the number of Registers and

Memory cells in a 128 X 4 memory chip?

128 registers and 4 memory cells per register

How

many bits are stored by a 256 X 4

memory chip? Can this chip specified as
128-byte memory?

256*4
No

Question
If

the memory chip size is 1024 X 4 bits ,

how many chips are required to make 4K
(4096) bytes of memory ?

two chips forms 1K memory

We need 8 chips

Question

Given the following Figure , define

How many words ?
How many bit per word?
How many address lines are used?
What is the name of the used bus?
Memory
CPU

16 bit BUS

1024 X 16

Question
State

the steps required by the MPU to read

or write from the memory?

How the MPU Writes into the Memory?

MPU places the 16 bit address on the address bus

Memory interfacing circuits will decode address to

specify the target register

MPU Places a byte on the data bus

MPU sends a control signal (Memory Write) to

the memory to write

How the MPU reads from the Memory?

MPU places the 16 bit address on the address bus

Memory interfacing circuits will decode address to

specify the target register

MPU sends a control signal (Memory Read) to the

memory to enable the output buffer

The memory puts the data on the data bus and the
processor will read it

Z80 Microprocessor Architecture

Z80 Hardware and programming

Model

8-bit Microprocessor
16- bit address lines
+5 V Power Supply
Housed in 40 pin dual in Line
(DIP) 2 sides
different versions of Z80
microprocessors such as Z80,
Z80A, Z80B and Z80H
rated to operate at various
frequencies ranging from 2.5MHz
to 8MHz.

Z80 Pin Configuration

53

Z80 Pin Configuration

54

Signal Classification
All

the signals can be classified into six

groups.

address bus
data bus
control signals
external requests
request acknowledge and special signals
power and frequency signals

Address Bus

16 tri-state signal lines, A15 A0

unidirectional and capable of

addressing 64K (216) memory
registers

used to send (or place) the addresses

of memory registers and I/O devices.

Tri state (0 , 1 , high impedance (the output has no effect

Data Bus

eight tri-state bidirectional lines

D7 D0

used for data transfer.

data can flow in either directionfrom the microprocessor to

memory and I/Os or vice versa.

Control and
Status Signals
Five

individual output
lines:

three can be classified as

status signals indicating the
nature of the operation
being performed,
two as control signals to
read from and write into
memory or I/Os.

Control and
Status Signals
M1

Machine Cycle One:

Status line indicates that an

opcode is being fetched from
memory.

Also used in an interrupt

operation to generate an
interrupt acknowledge signal.

Control and
Status Signals
MREQ

Memory Request:

indicates that the address

bus holds a valid address
for a memory read or write
operation.

Control and
Status Signals
IORQ

I/O Request:

Active low tri-state line

Indicates that the low-order

address bus (A7 A0) holds
a valid address for an I/O
read or write operation.

Control and
Status Signals

RD - Read:

Indicates that the microprocessor is

ready to read data from memory or an
I/O device

Used in conjunction with MREQ for

the Memory Read ( MEMRD )
operation

Used in conjunction with IORQ for

the I/O Read (IORD ) operation.

Control and
Status Signals
WR

Write:
Indicates that the microprocessor
has already placed a data byte on
the data bus and is ready to write
into memory or an I/O device
Should be used in conjunction
with
for the Memory
Write (MREQ
) operation
should MEMWR
be used in conjunction
with
for the I/O Write (
IOWR
IORQ
) operation.

External Requests

Includes five different input

signals to the
microprocessor from
external sources.

Used to interrupt an
ongoing process and to
request the microprocessor
to do something else.

External Requests
RESET Reset:

used to reset the microprocessor.

Clears the program counter
(PC), the interrupt register (I),
and the memory refresh register
(R).
Everything is in reset state
e.g. address bus and the data
bus are in high impedance state

External Requests

INT Interrupt Request:

initiated by an external I/O device

to interrupt the microprocessor
operation.
When the microprocessor accepts
the interrupt request, it
acknowledges by activating
the
IORQ
signal
The signal is maskable, meaning it
can be disabled through a software
instruction.

External Requests
NMI

Nonmaskable Interrupt

It cannot be disabled. It is
activated by a negative edgetriggered signal from an external
source.
Used primarily for implementing
emergency procedures.
No Ack signal is generated

External Requests
BUSRQ Bus Request:
Initiated by external I/O devices such as
the DMA (Direct Memory Access)
controller

An I/O device can send a low signal to

request the use of the address bus, the
data bus, and the control signals.

The external device can use the buses

and when its operations are complete, it
returns the control to the microprocessor.

External Requests
WAIT

This

Wait:

signal is used when

the response time of
memory or I/O devices
is slower than that of the
Z80

Request Acknowledge and

Special Signals
Bus Acknowledge:

BUSAK

Initiated by the Z80 in response to the

Bus Request signal.

Indicates to the requesting device that the

address bus, the data bus, and the control
signals have entered into the high
impedance state and can be used by the
requesting device.

Request Acknowledge and

Special Signals
Halt:
Indicates that the MPU
has executed the HALT
instruction.
HALT

Request Acknowledge and

Special Signals

RFSH Refresh:

Indicating that the address bus

A6-A0 (low-order seven bits)
holds a refresh address of
dynamic memory;

Should be used in conjunction

with MREQ to refresh memory
contents.

Power and Frequency Signals

- Clock:

Used

to connect a single
phase frequency source.

The

Z80 does not

include a clock circuit
on its chip

Power and Frequency Signals

+5V and GND:

These pins are for a

power supply and ground
reference;

The Z80 requires one

+5V power source.

Z80 CPU
B
U
F
F
E
R

8
INTERNAL DATA BUS (8 BIT)

MUX
INSTRUCTION
REGISTER

MUX

W'

Z'

B'

C'

D'

E'

H'

L'

DECODER

A'

F'

DATA BUS

TMP

ACT

IX
IY
SP

CONTROLLER
SEQUENCER

CONTROL
SECTION

ALU

PC
k

k
ADDRESS BUS

INTERNAL ADDRESS BUS (16 BIT)

B
U
F
F
E
R

CONTROL BUS

INTERNAL CONTROL BUS

B
U
F
F
E
R

16

13

Z80 Programming Model

Register Set

Accumulator and a
flag register (8-bit)
General-purpose
register arrays (8-bit)

registers as memory
pointers
(16-bit)

special-purpose
registers
(8-bit)

Register Set

General-purpose registers

may be used as 8-bit registers B, C, D, E, H, L

or combined as 16-bit register pairs BC, DE, HL

8-bit registers used to store data during the program execution
16-bit registers used to perform 16-bit operations or to hold memory
addresses (instructions involving register HL often take fewer bytes of object code and less
instruction cycles. So always give HL priority to hold a memory address)

Accumulator Register (A)

Part of the arithmetic logic unit (ALU) and is also identified as register A
All 8-bit arithmetic and logical instructions take one of the operands from the
accumulator and return the result to the accumulator
The shortest and fastest data transfers between the microprocessor and I/O
devices are performed through the accumulator.
More memory reference instructions move data between the accumulator and
memory than between any other register and memory.

Register Set

Flag Register (F)

includes six flip-flops that are set or reset according to data conditions after
an ALU operation
7
6
5
4
3
2
1
0
D0 - D7 are the ALU status flag
S Z X H X PV N C

S
Z
H
P
V
N
C

Sign Flag (1:negativ)*

Zero Flag (1:Zero)
Half Carry Flag (1: Carry from Bit 3 to Bit 4)**
Parity Flag (1: Even)
Overflow Flag (1:Overflow)*
Operation Flag (1:previous Operation was subtraction)**
Carry Flag (1: Carry from Bit n-1 to Bit n,
with n length of operand)
X not used
*: 2-complement number representation
**: used in DAA-operation for BCD-arithmetic

Register Set

Alternate registers (A F B C D E H L)
A duplicate set of general-purpose registers. Exchange
instructions select and deselect all alternate registers.

EXX

(BC)<->(BC') , (DE)<->(DE') , (HL)<->(HL')

EX AF, AF (AF)<->(AF')

Once selected all subsequent register operations are performed

on the active set until the next exchange select the inactive set.
Alternate registers cannot be addressed from a program.
what is this instruction useful for?
The alternate registers can be reserved for use when a fast
interrupt response is required

Register Set

16-Bit Registers As memory Pointers

Index registers (IX and IY)

16-bit memory pointers (also used to hold 16-bit data)

Stack pointer (SP) points to the top of the Stack

Program counter (PC)

points to the next opcode (first byte of an instruction) to be

fetched from memory
Following execution of the instruction, PC is incremented
to proceed to the next byte in memory (or replaced with a
new value, if a jump or call instruction is to be executed)

Special purpose registers

I : Interrupt vector register.

R : memory Refresh register

Register Set

What is Stack ?

A Stack is a reserved area of several read/write memory locations

The Z80 allows several levels of subroutine nesting through use
of a Stack and a Stack Pointer. When calls to subroutines are
made, the PC and the other pertinent data can be temporarily
stored on a Stack.

Top of the Stack is indicated by the contents of the SP. That is the
SP shows the address of the most recently made entry, because
the memory locations are organized as a last-in first-out file.

Register Set
Memory Refresh register (R)

Z80 includes built in circuitry for refreshing DRAM (dynamic

RAM) which simplifies the external interfacing hardware
DRAM consists of MOS transistors, which store Information as
capacitive charges; each cell needs to be periodically refreshed

R is increased at the beginning of every instruction

Only the lower 7 bits are included in the addition (bit 7 unchanged)
During instruction fetch from memory, the low order address is
used to supply a 7-bit address for refresh