Digital to Analog

Converter (DAC)
Kathmandu Engineering College
Electronics Circuits II
Gaurav Pradhan
Outline
Signal Conversion
Important Parameters
Introduction to DAC
Types of DAC

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Signal Conversion
Introduction
Analog to Digital and Digital to Analog
Why convert to digital?
Digitalsignal processing more economical and efficient
Possibility of encoding and encryption
Possibility of interfacing with micro processors and
controllers
The cost of DAC and ADC needs to included in
digital systems
High resolution ADC and DAC expensive

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Signal Conversion
Block Diagram
Analog Anti-aliasing Sample and Quantization
System Filter Hold ADC

Smoothening Digital
DAC
Filter System

Anti-aliasing filter and smoothening filter are LPF

Inherent quantization error in ADC
Loss of signal information in both ADC and DAC

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Signal Conversion ~
V
Sample & Hold and Quantization i

Analog
signal The analog signal is
sampled at every pulse
t

The recent analog values is

Pulse latched by the capacitor
Train

t The output of S/H circuit is

Output quantized
of S/H
t

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Signal Conversion
Sample & Hold and Quantization
Output of S/H quantized to
discrete values
Quantization Figure shows 8 different
Error
discrete values
111
1 LSB Quantization error present
110
because the sampled values
101
does not exactly fall on the
100 defined levels
011
010
What is the maximum
001
quantization error in terms
000
t of LSB?

Quantization of S/H output 1

LSB
2
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Binary Weight
A decimal number represented in Binary format is
N10 b n -1 2 n -1 b n -2 2 n -2 ............... b1 21 b 0 20 where b {1,0}

MSB NMSB LSB

Weight of MSB=1/2 (Vmax)

Weight of NMSB=1/2 (Weight of MSB) =1/22 (Vmax)
Weight of LSB=1/2n (Vmax)

No error while converting decimal to binary or vice versa

Presence of error in conversion in DAC and ADC

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Important Parameters
Static Characteristics
Linear Conversion
Integral Linearity

Analog O/P
1. Absolute Linearity
2. Best Straight Line Linearity
3. End Point Linearity
Digital I/P
Linearity:
In an ideal converter system

Analog O/P
equal increments in analog
domain should result in equal
increments in digital domain
Digital I/P
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Important Parameters
Static Characteristics
7 =LSB

Analog O/P
Integral Linearity: 6
5
Max. deviation of DAC 4
o/p from the straight 3 3
line drawn joining its 2
ideal min. and ideal 1
max. o/p 0
000 001 010 011 100 101 110 111
Digital I/P
Integral Error( ) Vobserved - Videal [at a particular i/p code]
Can be expressed in terms of LSB

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Important Parameters
Static Characteristics
Absolute linearity
Measured by assuming that o/p of DAC will begin at zero and
end at ideal full scale
Zero Error (Offset error): Difference between the ideal zero and
actual o/p when input to the DAC is a digital zero
Zero Error =Vobserved-Videal [for i/p code 000.000]
Full Scale Error: Difference between the ideal and actual o/p when
digital input to the DAC is for a full scale o/p
Full Scale Error =Vobserved-Videal [for i/p code 111.111]
Gain Error: Difference between the gain of actual and ideal static i/p
and o/p characteristics. Exists when the observed slope is not parallel
to the ideal slope
Gain Error =Vobserved-Videal [for i/p code 111111] with offset removed
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Important Parameters
Static Characteristics

7 =LSB GE FSE
Analog O/P

6
5
4
3 3
2
1
ZE 0
000 001 010 011 100 101 110 111
Digital I/P

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Important Parameters
Static Characteristics

Best Straight Line Linearity:

A straight line that best fits the observed points is taken as the ideal line.
The deviation of the observed values from this line is the best straight line
linearity error.

End Point Linearity:

A straight line joining the observed end points is taken as reference. The
deviation of the observed values from this line is the end point linearity error.

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Important Parameters
Static Characteristics

BSL
7 =LSB EPL
Analog O/P

6
5
4
3 3
2
1
0
000 001 010 011 100 101 110 111
Digital I/P

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Important Parameters
Static Characteristics
Differential Linearity: Digital Ideal Actual Differential
Linearity
Measure of the separation between
adjacent levels 000 0 0 0
Measures bit-to-bit deviation from 001 0.5 0.6 (0.6-0)-(0.5-0)
ideal output steps to actual output =0.1
steps
010 1 1.2 (1.2-0.6)-(1-0.5)
=0.1
Alternatively,
VCX - VS
Diff. Error 100%
VS
VCX is actual voltage change and VS is ideal change on a bit - to - bit basis

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Important Parameters
Dynamic Characteristics

Conversion Time:
The time taken from the moment an input is given to the time an output is
present

Settling Time:
The time it takes for the o/p to settle to within a specified band (+-LSB)

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Digital to Analog Converter
Introduction
Converts digital input signal into analog electrical quantities

Summing
Switches

Resistive
Register

Network
Voltage
Analog OUT
Data Amp
IN

Convert Reference
signal Voltage

Form of generic memory

New values stored once convert signal is asserted
Values need to be latched as conversion takes time
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Digital to Analog Converter
Introduction
Converts digital input signal into analog electrical quantities

Summing
Switches

Resistive
Register

Network
Voltage
Analog OUT
Data Amp
IN

Convert Reference
signal Voltage

Switches according to input logic 1 or 0

Provides a Vref value or zero (ground)
Examples of Totem Pole MOS switch in Manual
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Digital to Analog Converter
Introduction
Converts digital input signal into analog electrical quantities

Summing
Switches

Resistive
Register

Network
Voltage
Analog OUT
Data Amp
IN

Convert Reference
signal Voltage

Sums all the currents

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Digital to Analog Converter
Resistive Summing Network
B3 MSB B2 B1 B0 LSB

VRef

R 2R 4R 8R

RF
I3 I2 I1 I0 ITotal
-
VRef - 0 VRef + V0
I3 (When MSB B3 1)
R R
V - 0 VRef
I 2 Ref ( B2 1) I Total I 0 I1 I 2 I 3
2R 2R
VRef - 0 VRef VRef B0 B1 B2 B3
I1 ( B1 1) I Total
4R 4R R 8 4 2 1
V - 0 VRef
I 0 Ref ( B0 1) V0 -ITotal R F
8R 8R
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Digital to Analog Converter
Types of DAC
DAC with Binary Weighted Resistors
R-2R Ladder type DAC
Voltage Mode
Current Mode (Inverted R-2R Ladder)

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Digital to Analog Converter
DAC with Binary Weighted Resistors
VRef

R 2R 4R 2(N-1)R

SN-1 SN-2 SN-3 S0 RF=R/2

1 2 1 2 1 2 1 2
I3 I2 I1 I0 ITotal
-

N bit D/A converter + V0

Circuit consists of
Reference voltage VRef
N Binary weighted resistors R, 2R, 4R,. 2N-1R
Single Pole Double Throw Switches S0, S1, S2. SN-1
Op Amp with feedback resistance RF=R/2
Switches controlled N-bit digital input word D

2
1
N -1
2 N 1
bN 1 2 N 2
bN 2 ...... 2 b
1 1 2 0
b0 b N-1 MSB, b 0 LSB
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Digital to Analog Converter
DAC with Binary Weighted Resistors
VRef

R 2R 4R 2(N-1)R

SN-1 SN-2 SN-3 S0 RF=R/2

1 2 1 2 1 2 1 2
I3 I2 I1 I0 ITotal
-

N bit D/A converter + V0

Switch position 1 connects VRef to ground and position 2 to virtual ground

Currents to virtual ground add up, and flow through feed back resistance
RF
Total current, ITotal and Output Voltage VO is given by,

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Digital to Analog Converter
DAC with Binary Weighted Resistors
VRef

R 2R 4R 2(N-1)R

SN-1 SN-2 SN-3 S0 RF=R/2

1 2 1 2 1 2 1 2
I3 I2 I1 I0 ITotal
-

N bit D/A converter + V0

VRef VRef VRef

I Total bN 1 bN 2 ... N -1 b0
R 2R 2 R
2VRef bN 1 bN 2 b0 2VRef
I Total
R 2
1 2 .... N N D
2 2 2 R VO D
VRef
VO -ITotal R F - N D
2

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 Digital to Analog Converter
Questions
VRef V V
I Total bN 1 Ref bN 2 ... NRef
-1
b0 Full Scale output voltage?
R 2R 2 R
2V b b b 2V V (Max)
I Total Ref N11 N 22 .... N0 NRef D O

R 2 2 2 2 R RF N2
VRef
V Ref 2 N -1
2 ... 21
2 0

VO -ITotal R F - N D 2 N -1 R
2
Resolution (= Weight of LSB)? VRef
R F
N -1
2 R
2 N

1

VO (LSB) VRef
RF VO LSB 2 1
N

2 N -1 R
Weight of MSB?
RF
VO (MSB) VRef
R
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Digital to Analog Converter
DAC with Binary Weighted Resistors
Accuracy depends critically on
Accuracy of VRef
Precision of Binary weighted resistors
Perfection of switches

Disadvantages
Large spread between smallest and largest resistance for higher no. of
bits
Precise resistor values not available
Impractical for large number of bits

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Digital to Analog Converter 2R RF=R
R-2R Ladder In Voltage mode
-
R R R Va
+ VO
2R 2R 2R 2R 2R 2R

B0LSB B1 B2 B3MSB

VRef

2n resistors for n bit DAC

Only two values of resistors required
Resistance from any left or right node is 2R
Splitting of current
Gives rise to binary weighted sequence of current

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 Digital to Analog Converter
R-2R Ladder In Voltage mode

2R RF=R
VRef VRef
I
2R
- (2R//2R) 2R 3R
VRef Va
+ VO VRef
I 2R 2R
Va I R
3
I/2 I/2 R VRef
VO 1 a
V
MSB bit high (1) all others low (0) 2R 2

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Digital to Analog Converter
R-2R Ladder In Voltage mode
Next MSB bit high (1) all others low (0)
2R RF=R

-
2R R Va
VRef + VO
I 2R I/2 2R 2R
I/2
I/4 I/4

VRef VRef
I Similarly when only LSB is high,
[(2R//2R) R]//2R 2R 3R
I 1 VRef R VRef VRef
Va 2R
4 2 3R 6 VO n
2
R V V
VO 1 Va Ref Ref
2R 4 22
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Digital to Analog Converter
R-2R Ladder In Voltage mode
Thus expression of o/p voltage using superposition theorem,

VRef VRef VRef VRef

VO Sn 1 2 Sn 2 3 Sn 3 .... n S0
2 2 2 2
V
VO Ref
2 n
2
n 1
S n 1 2 n 2
S n 2 2 n 3
S n 3 .......... .... 2 0
S0
VRef
VO n D
2

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Digital to Analog Converter
R-2R Ladder In Current mode
I R R 2R
VRef
I/2 I/4 I/2n-1
2R 2R 2R 2R
I/2 I/4 I/8 I/2n
Bn-1MSB Bn-2 Bn-3 B0LSB

RF=R

Two sets of resistors used -

The resistance right of node is 2R + VO
Current flowing to right and down of node
is equal
Equivalent resistance at each node is R
Current flowing is constant in all resistors

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Digital to Analog Converter
R-2R Ladder In Current mode
V Ref
I
R
VRef VRef VRef
I Sn 1 2 Sn 2 .... n S0
2R 2 R 2 R
I n
2 R

VRef n -1
2 S n 1 2 n -2
S n 2 .... 2 0
S0
VRef
I n
D
2 R

VRef R F
VO I R F n D
2 R

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Digital to Analog Converter
Questions
Assume R=RF

Weight of MSB? Resolution?

V VRef
VO Ref VO n
2 2

Self Study
Multiplying DACs

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