VHDL Class Note2017CLASS2
VHDL Class Note2017CLASS2
PLD
PLD?
IS AN INTEGRATED CIRCUIT
WHICH CAN BE CONFIGURED
BY THE USER TO PERFORM A
LOGIC FUNCTION.
PROGRAMMER EQIPMENT
TYPES
PROM
PAL
PLA
STRUCTURE
AND array followed by an OR array
Either or both of them are programmable
Inputs are fed to the AND array which
generate the product terms
Product terms are fed into the OR array
OR array combines the various product
terms to produce the SOP
PROM
PROM
AND ARRAY FIXED OR ARRAY PROGRAMMABLE
PROM
AND array fixed OR array programmable
Flexible to the designer
Cheap and simple to use
All min terms are decoded
Only Boolean functions in sum of min
terms can be implemented
Useful when the combination circuit uses
more min terms.
PLA
PLA
Both AND array & OR array are programmable
N= number of inputs
K=number of product terms
M=number of outputs
Both arrays are programmable
More flexible to the designer
Costly and complex compared to PROM & PAL
Boolean functions in the form of SOP can be
implemented.
PAL
PAL
AND array programmable OR array fixed
PAL
AND array programmable OR array fixed
Flexible to the designer
Cheaper and simple
Boolean functions in the form of SOP can be
implemented.
ADVANTAGES OF PLD
F1(A,B) =m(1,3)
F2(A,B) =m(0,1,2)
F3(A,B) =m(0,3)
D =ABQ +ABQ