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The 8086 Microprocessor Architecture

The document discusses the features and architecture of the 8086 microprocessor. It is a 16-bit microprocessor with 16-bit data bus and 20-bit address bus, allowing it to access up to 1MB of memory. It has multiplexed address and data buses and supports features like multitasking, pipelining and external math coprocessors. Internally, it is divided into Bus Interface Unit and Execution Unit. Key registers like AX, BX, CX, DX and flags registers are also described. Assembly language programming and MOV instruction are briefly introduced.

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0% found this document useful (0 votes)
32 views

The 8086 Microprocessor Architecture

The document discusses the features and architecture of the 8086 microprocessor. It is a 16-bit microprocessor with 16-bit data bus and 20-bit address bus, allowing it to access up to 1MB of memory. It has multiplexed address and data buses and supports features like multitasking, pipelining and external math coprocessors. Internally, it is divided into Bus Interface Unit and Execution Unit. Key registers like AX, BX, CX, DX and flags registers are also described. Assembly language programming and MOV instruction are briefly introduced.

Uploaded by

tazeb Abebe
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 65

The 8086 Microprocessor

Architecture
Features of 8086 Microprocessor

 16-bit microprocessor. (ALU, internal registers and most
of its instructions are designed to work with 16-bit binary
words)

 16-bit data bus. (can read/write data from/to memory


and ports either 16-bit or 8 bits at a time)

 20-bit address bus. (can directly access 220 memory


locations)

 Can generate 16-bit I/O address. (can access 216 I/O


ports)
2

 Provides fourteen 16-bit registers.

 Has multiplexed address and data bus. (reduces the number of


pins needed, but slow down the transfer of data)

 Possible to perform bit, byte, word and block operations.

 Designed to perform in two modes, namely the minimum


mode and the maximum mode:

In the minimum mode only one processor is used and control signals
required by memory and I/O devices are issued by the processor.

In the maximum mode more than one processor is used and control
signals are generated with the help of external bus controller(8288).
3

 Supports multiprogramming. (the code for two or more processes
is in memory at the same time and is executed in a time-
multiplexed fashion)

 Supports pipelining.

 Supports for external math coprocessor.

 Range of clock rates:

5 MHZ for 8086


8 MHZ for 8086-2
10 MHZ for 8086-1

 Requires single +5v power supply.


4
Architecture of 8086

Internally 8086 is
divided into two
separate functional
units: The BIU and
the EU.

5
Bus Interface Unit

 Sends address of the memory or I/O

 Fetches instruction from memory

 Reads data from port/memory

 Writes data into port/memory

 Supports instruction queuing

 Provides address relocation facility

6

 To implement its functions the BIU contains instruction queue,
segment registers, instruction pointer, address summer and bus
control logic.

 To speed up program execution, the BIU fetches six instruction


bytes ahead of time from memory. These pre-fetched
instruction bytes are held for the execution unit in a group of
registers called Queue.

 The 8086’s main memory can be divided into 16 segments of


64K bytes each (16 x 64 KB = 1 MB). A segment may contain
codes or data. The 8086 uses 16-bit registers to address
segments.

7

 The code segment (CS) register holds the upper 16
bits of the starting address of the code segment.

 The stack segment register is used for the upper 16


bits of the starting address for the program stack.

 Extra segment (ES) register and data segment (DS)


register are used to hold the upper 16 bits of the
starting address of the two memory segments which
are used for data.
8

 To get 20-bit physical address one or more pointer or
index register are associated with each segment register.

 The pointer registers IP, BP, and SP are associated with


the code, data and stack segments, respectively.

 Instruction pointer (IP), which is similar to the program


counter of a typical microprocessor, linearly addresses
each location in a code segment. Because the size of the IP
is 16 bits, the segment size is 64K bytes.
9
Execution Unit (EU)


 The execution unit of 8086 tells the CPU from where to
fetch instructions or data, decodes instructions and
executes instructions.

 It contains control circuitry, instruction decoder, ALU,


and register organization.

 The control circuitry in the EU directs the internal


operations.

 The decoder translates the instructions fetched from


memory into a series of actions which the EU performs.
10
Register Organization

General purpose registers


AX (A- Accumulator): used for instructions like MUL, DIV and IN/OUT
instructions.

BX (B-Base register): used to store the EA of memory location for data transfer
between microprocessor and memory.

CX (C- Counter register): used as a counter for rotate, shift, repeat and loop
instructions.

DX (D-Data register): in MUL and DIV operations if result is of 32 bits, then register
DX is used to store 16 MSBs and register AX is used to store 16 LSBs. The 16-bit
input and output port is also stored in register DX.
11

Operand/Temporary Register
 This register can not be used by the programmer. It is used by the
microprocessor to store any intermediate data or result.

ALU
 The different arithmetic operations performed in ALU are
addition, subtraction, multiplication, and division of binary
numbers, BCD numbers and ASCII code numbers.

 The logical operations performed are ANDing, ORing, and EX-


Oring, inverting, rotating data and shifting data.

12

Flag Registers

 Six out of nine flags are used as status flags.


Depending upon the status of the result obtained
in ALU, microprocessor will store corresponding
status bit 0/1 in this status F/Fs.
13

Carry flag (CF): when there is carry out or borrow into of
MSB CF=1, otherwise CF=0.

Auxiliary carry flag (AC): will be set to one if there is a carry


out of or a borrow into the MSB of the nibble.

Parity flag (PF): set to 1 if result of byte operations or lower


byte of the word operation contain an even number of ones;
otherwise it is 0.

Zero flag (ZF): set to 1 if the result of operation in ALU is


zero; otherwise it is 0.
14

Sign flag (SF): if the result obtained is correct binary
number, then the sign flags bit will give correct sign of
the result. If SF=0/1, then the result is +ve/-ve
respectively.
Overflow flag (OF): when the sign binary result of the
8/16-bit is out of range then OF=1, and sign flag will be
incorrect..
If carry/borrow into the MSB is equal to carry/borrow
out of the MSB, then the sign result is correct and OF=0.

15
Example

Give the contents of the flag registers after execution of the
following addition.
0110 0101 1101 0001
+ 0010 0011 0101 1001

Trap flag (TF): used for single stepping through a program.


Interrupt flag (IF): used to allow/prohibit the interruption of
a program.
Direction flag (DF): if DF=0, the string is processed from its
beginning towards the high address.
16
Bus Operation

 The 8086 has a common address and data bus.

 The address data are time multiplexed (address and data


appear on the bus at different time intervals).

 The multiplexed address and data bus provides the most


efficient use of pins.

 The multiplexed address and data bus has to be de-


multiplexed externally with the use of latches and the
ALE signal provided by 8086.
17
Introduction to assembly language
programming

 A program that consists of 0s and 1s is called machine
language.

 Although the hexadecimal system was used as a more


efficient way to represent binary numbers, the process of
working in machine code was sill cumbersome for humans.

 Assembly languages were developed , which provided


mnemonics for the machine code instructions, plus other
features that made programming faster and less prone to
error.

18

 Assembly language programs must be translated into
machine code (object code) by a program called an
assembler.

 Assembly language is referred to as a low-level language


because it deals directly with the internal structure of the
CPU.

 To program in assembly language, the programmer must


know the number of registers and their size, as other
details of the CPU.

19

 An assembly language instruction consists of a
mnemonic, optionally followed by one or two
operands.

 The operands are the data items being manipulated,


and the mnemonics are the commands to the CPU,
telling it what to do with those items.

20
MOV instruction

 The MOV instruction copies data from one location to
another.
MOV destination, source
 The above instruction tells the CPU to move (in reality,
copy) the source operand to the destination operand.

 For example, the instruction MOV DX, CX copies the


contents of register CX to register DX.

 The MOV instruction does not affect the source operand.

21
Example

22
Example

23

 In the 8086 CPU, data can be moved among all the
registers as long as the source and destination registers
match in size.

 Code such as MOV AL, DX will cause an error, since one


cannot move the contents of a 16-bit register into an 8-bit
register.

 Values cannot be loaded directly into any segment


register. First load it to a non segment register and then
move it to the segment register.

24

If a value less than FFH is moved into a 16-bit register,


the rest of the bits are assumed to be zeros. For
example, in MOV BX, 5 the result will be BX=0005; that
is BH=00 and BL=05.
25
ADD instruction

 The ADD instruction tells the CPU to add the source
and the destination operands and put the result in
the destination.
ADD destination, source

26
Quiz

1. Write the assembly language instruction to move value
1234H into register BX.

2. Write the assembly language instructions to add the


values 16H and ABH. Place the result in register AX.

3. No value can be moved directly into which registers?

27
Memory Segmentation

 Two types of memory organizations are commonly used:
linear addressing and segmented addressing.

 In linear addressing the entire memory space is available


to the processor in one linear array.

 In segmented addressing the available memory space is


divided into segments.

 In 8086 the memory is divided into 16 logical segments.


Each segment is 64kB in size and addressed by one of the
segment registers.
28

 The code segment contains the assembly language instructions
that perform the tasks that the program was designed to
accomplish.

 The data segment is used to store information (data) that needs


to be processed by the instructions in the code segment.

 The stack is used to store information temporarily.

 A segment is an area of memory that includes up to 64kB and


begins on an address evenly divisible by 16 (such an address
ends in 0H).

29

30
Physical, Offset, and Logical addresses


 Physical address is the 20-bit address that is actually put
on the address pins of the 8086 microprocessor and
decoded by the memory interfacing circuitry. It is an
actual physical location in RAM or ROM within the 1MB
memory range.

 Offset address is a location within a 64kB segment range.

 Logical address consists of a segment value and an offset


address.
31

 The 16-bit contents of the segment register gives the
starting/base address of a particular segment.

 To address a specific memory location within a


segment we need an offset address.

 The offset address is also 16-bit wide and it is


provided by one of the associated pointer or index
register.
32

33
Code Segment

 To execute a program, the 8086 fetches the instructions
(op-codes and operands) from the code segment.

 The logical address of an instruction always consists of


a CS and an IP.

34
Example

35
Logical address vs. physical address

36

 The program above shows that the byte at address
1132:0100 contains B0, which is the op-code for
moving a value into register AL, and address
1132:0101 contains the operand (in this case 57) to be
moved to AL.

 Therefore, the instruction MOV AL, 57 has a


machine code of B057, where B0 is the op-code and
57 is the operand.

37

38
Data Segment

 In the program above, the data and code are mixed


together in the instructions. If the data changes, the code
must be searched for every place the data is included, and
the data retyped. For this reason, the idea arose to set
aside an area of memory strictly for data.

 Data segment uses register DS and an offset value.


39

 The following demonstrates how data can be stored
in the data segment and the program rewritten so
that it can be used for any set of data.

40

 While CS uses only the IP register as an offset, DS
uses only BX, DI, and SI to hold the offset address of
the data.

41
Examples

42

43
Little Endian Convention

 We have seen when 8-bit data is used the bytes are stored one
after the another in memory. What happens when 16-bit data is
used? For example:
MOV AX, 35F3H
MOV [1500], AX
 In cases like this, the low byte goes to the low memory location
and the high byte goes to the high memory location.
DS:1500 = F3 DS:1501 = 35
 This convention is called little endian convention. All Intel
microprocessors and many microcomputers use this
convention.

44

45
Extra Segment

 ES is a segment used as an extra data segment.

 Although in many normal programs this segment is


not used, its use is absolutely essential for string
operations.

46
Stack Segment

 The stack is a section of read/write memory (RAM)
used by the CPU to store information temporarily.

 The CPU needs this storage area since there are only
a limited number of registers.

 The two main registers used to access the stack are


the SS register and the SP register. These registers
must be loaded before any instructions accessing the
stack are used.
47

 The storing of a CPU register in the stack is called a push,
and loading the contents of the stack into the CPU register
is called a pop.

 In the 8086, the stack pointer register (SP) points at the


current memory location used for the top of the stack and
as data is pushed onto the stack it is decremented. It is
incremented as data is popped off the stack into the CPU.

 When an instruction pushes or pops a general purpose


register, it must be the entire 16-bit register. In other
words, one must code “PUSH AX”; there is no instruction
such as “PUSH AL”.
48

 To ensure that the code section and stack section of the
program never write over each other, they are located at
opposite ends of the RAM memory set aside for the program
and they grow toward each other but must not meet. If they
meet, the program will crash.

 As each PUSH is executed, the contents of the register are saved


on the stack and SP is decremented by 2.

 With every pop, the top 2 bytes of the stack are copied to the
register specified by the instruction and the stack pointer is
incremented twice. Although the data actually remains in
memory, it is not accessible since the stack pointer is beyond
that point.
49
Example

50
Example

51

 What values are assigned to the SP and SS, and who assigns
them?
It is the job of the DOS to assign the values for the SP
and SS since memory management is the responsibility
of the operating system.
 The top of the stack is the last stack location occupied.
 BP is another register that can be used as an offset into the
stack, but it has very special applications and is widely used to
access parameters passed between assembly language
programs and high-level language programs.

52
Example

53
Important points

 There may be many possible logical addresses that
represent a single physical address.

 When adding the offset to the shifted segment register


results in an address beyond the maximum allowed
range. In that situation, wrap-around will occur.
54
Example

55
Overlapping

 In calculating the physical address, it is possible that
two segments can overlap, which is desirable in
some circumstances.

56
Advantages of memory segmentation

1. It allows the memory addressing capacity to be 1MB even
though the address associated with individual instruction is
only 16-bit.

2. It allows instruction code, data, stack, and portion of a


program to be more than 64KB long by using more than one
code, data, stack segment, and extra segment.

3. It facilitates use of separate memory areas for program, data


and stack.

4. It permits a program or its data to be put in different areas of


memory, each time the program is executed which is very
useful in multiprogramming.
57
Use of zero flag for looping

 One of the most widely used applications of the flag
register is the use of the zero flag to implement
program loops.

 When a counter becomes zero, the zero flag is set


and the loop is stopped.

58
Memory map of the IBM PC



For a program to be executed on the PC, DOS must load it into RAM.

 During the design phase of the first IBM PC, engineers had to decide
on the allocation of the 1MB memory space to various sections of the
PC. This memory allocation is called a memory map.

 Of the 1MB memory, 640KB from addresses 00000 – 9FFFFH were set
aside for RAM.

 The 128KB from A0000H to BFFFFH were allocated for video


memory.

 The remaining 256KB from C0000H to FFFFFH were set aside for
ROM.
59

Fig. Memory allocation in the PC

60
RAM


DOS first allocates the available RAM on the PC for its own use and
then lets the rest be used for applications such as word processors.

 The complicated task of managing RAM memory is left to DOS since


different computers have different amounts of RAM, plus the fact
that the memory needs of application packages vary.

 For this reason we do not assign any values for the segment registers
since such an assignment means specifying an exact physical
address in the range 00000 – 9FFFFH, and this is beyond the
knowledge of the user.

 Another reason is that assigning a physical address might work on a


given PC but it might not work on a PC with a different DOS version
and RAM size. In other words, the program would not be portable to
another PC. 61
ROM

 From C0000H to FFFFFH is set aside for ROM. Of
this 256KB, 64KB from location F0000H – FFFFFH
are used by BIOS (basic input/output system) ROM.
 Some of the remaining space is used by various
adapter cards (such as cards for hard disks).
 The 640KB memory space from 00000 to 9FFFFH is
referred to as conventional memory, while the 384KB
from A0000H to FFFFFH are called the UMB (upper
memory block).

62
BIOS ROM

 Since the CPU can only execute programs that are stored in
memory, there must be some permanent (nonvolatile) memory to
hold the programs telling the CPU what to do when the power is
turned on.

 This collection of programs held by ROM is referred to as BIOS. It


contains programs to test RAM and other components connected
to the CPU.

 BIOS also contains programs that allow DOS to communicate with


peripheral devices such as the keyboard, video, printer, and disk.

 It is the function of BIOS to test all the devices connected to the PC


when the computer is turned on and to report any errors.

63

 It is only after testing and setting up the peripherals
that BIOS will load DOS from disk into RAM and
hand over control of the PC to DOS.

 Although there occasions when either DOS or


applications programs need to use programs in BIOS
ROM, DOS always controls the PC once it is loaded.

64

Thank You!
65

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