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Layout Design Rules

The document discusses layout design rules and gate layout. It explains that layout design is a schematic of an integrated circuit that describes the exact placement of components for fabrication. Layout design rules specify the minimum feature sizes and spacing allowed by the manufacturing process. Following standardized design rules using the lambda parameter makes it easier to migrate designs between different process technologies by keeping the rules scalable. Stick diagrams can be used to plan layouts and convey layer information through color coding.

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mohanraj
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244 views

Layout Design Rules

The document discusses layout design rules and gate layout. It explains that layout design is a schematic of an integrated circuit that describes the exact placement of components for fabrication. Layout design rules specify the minimum feature sizes and spacing allowed by the manufacturing process. Following standardized design rules using the lambda parameter makes it easier to migrate designs between different process technologies by keeping the rules scalable. Stick diagrams can be used to plan layouts and convey layer information through color coding.

Uploaded by

mohanraj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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LAYOUTDESIGNRULES&

GATELAYOUT

By

S.VARUN
M.Tech[EST]
What is a LAYOUT DESIGN?
 Layout Design is a schematic of the
Integrated Circuit(IC) which describes
the exact placement of the
components for fabrication.

 Layout Design rules describe how


small features can be & how closely
they can be packed in a manufacturing
process
Why do we need Layout Design Rules?
 IndustrialDesign rules are generally
specified in microns.

 This makes migrating from one


process to more advanced process
difficult because not all rules scale in
the same way.
 In
order to bring uniformity,Mead &
Conway popularized lambda-based
design rules based on single
parameter.

 Lambda,characterizes
the resolution of
the process & is generally the half of
the minimum drawn transistor channel
length.
 The channel length is the distance
between drain & the source which is
set by a minimum width of a
polysilicon wire.

 Ex:-A180 nm process has a minimum


polysilicon width of 0.18microns and
uses design rules with lambda=0.09.
 However the designers make the
scaling layout trivial.
 The same layout can be moved to a
new process simply by specifying the
Lambda value.
 The potential density advantage of
micron rules is sacrificed for
simplicity a nd easy scalability of
lambda rules.
 Designers often describe a process by
its feature size.

 Feature Size refers to the mi ni mum


transistor length,So lambda is half the
feature size.

 Transistor dimensions are always


specified by Width/Length ratio.
 Ex-In 0.6 um technology, width
corresponds to 1.2um & length to
0.6um.

 Indigital systems, the transistors are


chosen to have minimum possible
length because short channel
transistors are faster, smaller &
consume less power.
 Stickdiagrams may be used to convey
layer information through the use of a
color code

 Ex-In
the case of nMOS design, green
for n-diffusion, red for polysilicon,
blue for metal,and black for contact
areas.
A stick diagram is stick figure view of
a layout.

 Itis useful for


a)Planning Layout
b)Relative Placement of transistors
c)Assignment of signals to layers
d)Connections between cells
e)Cell hierarchy
1)When two or more ‘sticks’ of the same
type cross or touch each other which
represents electrical contact.

2)When two or more ‘sticks’ of different


type cross or touch each other which
represents no electrical contact.
3)When poly crosses diffusion, it
represents a transistor.

4)In CMOS, a demarcation line is drawn


to avoid touching of p-diffusion & n-
diffusion. All p-MOS should lie on one
side of the line & all n-MOS should be
on the other side of the line.
S.VARUN

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