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CMOS Design

This document discusses CMOS design methods and strategies. It begins by describing the VLSI design flow as a Y chart with three domains: behavioral, structural, and physical. It then discusses design strategies such as hierarchy, regularity, and modularity to improve productivity. Finally, it outlines different design methods including behavioral synthesis, RTL synthesis, logic optimization, and structural-to-layout synthesis. The goal is to provide consistent descriptions across different abstraction levels to optimize performance, size, time, and testability.

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Anand Amrut
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170 views8 pages

CMOS Design

This document discusses CMOS design methods and strategies. It begins by describing the VLSI design flow as a Y chart with three domains: behavioral, structural, and physical. It then discusses design strategies such as hierarchy, regularity, and modularity to improve productivity. Finally, it outlines different design methods including behavioral synthesis, RTL synthesis, logic optimization, and structural-to-layout synthesis. The goal is to provide consistent descriptions across different abstraction levels to optimize performance, size, time, and testability.

Uploaded by

Anand Amrut
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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CMOS Design Methods

VLSI design flow--Y chart (D.GJASKI)


VLSI design flow--Y chart (D.GJASKI)
• Behavioral Domain
– Freedom to choose........... Sequential/parallel
algorithm
• Structural Domain
– Decision about which particular logic family,
clocking strategy, or circuit style to use.
• Geometrical (Physical) Domain
– How the circuit is implemented in terms of chips,
boards..
Design Strategies
• Introduction
– A good VLSI Design system should provide for
consistent description in all three description
domains(Behavioral, Structural & Physical) and at all
relevant levels of abstraction (architectural, RTL, logic
& circuit)
– The design parameters are
• Performance (Speed, power, function, flexibility)
• Size of die (Cost of die)
• Time to design (cost of engg & scheduling)
• Ease of test generation & testability (cost of engg &
scheduling)
Design Strategies
• Hierarchy (divide & conquer)
– Involves dividing a module into submodules & then repeating this
operation on the submodules until the complexity of the submodules is at
an approximately comprehensible level of detail. (S/w smaller functions)
• Regularity
– Divide the hierarchy into a set of similar building blocks. (all levels it will
exist. Ex-- ckt level equal sized tra, logic level identical gates, @ HIGHER
Levels identical processors)
– Regularity allows an improvement in productivity by reusing specific
designs in a number of places thereby reducing the no. of different
designs that need to be completed.
• Modularity
– Modularity adds to the above two the condition that Submodules have
well- defined functions and interfaces. (transmission gate)
• Locality (time lacality) :
– Modules see a common clock
Design Methods
• Behavioral
– To Decide upon & assign resources based on area & timing requirements.
– Insert pipeline registers to achieve timimg constarints.
– Create microcode and/or control logic.
• RTL Synthesis
– It takes an RTL description & convert it to a set of registers & combinational logic.
– RTL HDLs have to capture the following attributes of a design
• Control flow using if-then-else and caese statements.
• Iteration
• Hierarchy
• Word widths, bit vectors, and bit fields
• Sequential versus parallel operation
• Registers specification & allocation
• Arithmetic. Logic, and comparison operations.
• Logic Optimization
– It Takes logic description (From RTL or directly at the logic level)
• Structural-to-Layout Synthesis
– Placement (to min area or time cycle)
– Routing (a global router)
• Layout Synthesis
Assignment questions
1. Draw the CMOS schematic for the following boolean
functions.

2. Explain Y-chart with a neat diagram.


3. Expalin design strategies.
4. Explain all the design methods.

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