Interrupt Structure and Processing of 8086
Interrupt Structure and Processing of 8086
K. Penchalaiah
Associate Professor
Dept. of ECE
8086 microprocessor
Interrupt: it is defined as breaking normal sequence of
program execution temporarily (suspends program execution),
to work on a different task and then return to its previous task.
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8086 microprocessor
Interrupt:
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8086 microprocessor
Types of Interrupts:
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8086 microprocessor
Sources of Interrupt:
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8086 microprocessor
Interrupt in 8086: There are 256 Interrupt types in 8086.
these are divided into three groups
1.Dedicated interrupts(0-4): first 5 interrupts
2.Reserved interrupts (5-32): next 27 interrupts
3.Interrupts available to user (33-255): remaining 224 int.
Hardware Interrupt :
An External signal applied to the NMI or INTR input
is referred to as External or Hardware Interrupts.
Software Interrupt:
An Interrupt is execution of the interrupt instruction
INTn is referred to as Internal or Software Interrupts.
Where ‘n’ is the interrupt type that can be any value
Between 00H and FFH.(i. e 0 - 255) 6
Processing of Interrupt of by 8086:
ISR
Main program
Push PSW
Clear IF
Clear TF .
Push CS .
Push IP
Fetch ISR address Processing
from IVT of
Interrupt
Interrupt
.
POP IP .
POP CS
POP PSW
IRET 7
Processing of Interrupt of by 8086:
after execution of every instruction it checks if any interrupt has
been requested.
1. It decrements the stack pointer by 2 and Pushes the
Flag Register(PSW) contents on to stack.
2. It Disables the 8086 INTR Interrupt pin by clearing the
interrupt flag (IF) in the flag register.
3. It resets the Trap flag (TF) in the flag register.
4. It decrements the stack pointer by 2 and Pushes the
code segment Register contents on to stack.
5. It decrements the stack pointer by 2 and Pushes the
Instruction Pointer Register contents on to stack.
6. It does an Indirect Jump to the start of the program to
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respond to the interrupt.
Interrupt Vector Table
• When the 8086 response to an interrupt it goes to four
memory locations to get the CS and IP values for the
start of the interrupt service routine(ISR).
• The first 1KB of memory from 00000h to 003FFH is set
aside as a table for starting address of interrupt
service routine.
• Since 4 bytes are required to store the CS and IP values
for each ISR.
• The starting address of ISR is often called the interrupt
vector or interrupt pointer.
• So, the table is referred to as Interrupt Vector
Table(IVT). 9
Interrupt Vector Table
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Interrupt Vector Table
• The interrupt vector table is used to store interrupt vectors
and consists of total of 256 vectors (represented as 0-255
in Hexa 00H - FFH).
IP Low 00008H
IP High 00009H
CS Low 0000AH
CS High 0000BH
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Interrupt Vector Table
these are divided into three groups
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Interrupt Acknowledgement cycle
When the 8086 responds to INTR input signal, different
from response to other interrupts.
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Interrupt Acknowledgement cycle
When the 8086 responds to INTR input signal, different
from response to other interrupts.
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Interrupt priorities in 8086
When two or more interrupts occurs at the same time,
the highest priority interrupt is served by the 8086.
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