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Introduction To VLSI Design

This document provides an introduction and overview of VLSI design. It discusses VLSI and its applications in enabling small, fast, low power integrated circuits due to combining millions of transistors on a single chip. It covers combinational and sequential circuits, and different ways of programming in Verilog including gate level, dataflow, and behavioral modeling. Gate level models directly use logic diagrams while dataflow uses logical statements and operators. Behavioral modeling uses procedural assignments and blocks defined by always and initial that execute at simulation time zero or repetitively. The document concludes with an understanding of combinational and sequential circuits and Verilog implementation and modeling in Xilinx software.

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412 views17 pages

Introduction To VLSI Design

This document provides an introduction and overview of VLSI design. It discusses VLSI and its applications in enabling small, fast, low power integrated circuits due to combining millions of transistors on a single chip. It covers combinational and sequential circuits, and different ways of programming in Verilog including gate level, dataflow, and behavioral modeling. Gate level models directly use logic diagrams while dataflow uses logical statements and operators. Behavioral modeling uses procedural assignments and blocks defined by always and initial that execute at simulation time zero or repetitively. The document concludes with an understanding of combinational and sequential circuits and Verilog implementation and modeling in Xilinx software.

Uploaded by

praveen mareedu
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Introduction to VLSI Design

Presenting by:
M. Sai Bhargav
11806781
E1806
B.Tech, ECE
Contents:
 Introduction
 About VLSI and its applications
 Combinational Circuits
 Sequential Circuits
 Verilog programming using gate level and data flow level modelling
 Behavioural modelling
 Conclusion
Introduction:

 The course I have taken is


Introduction to VLSI Design
 I had done my course in
Techvanto Organization which
is a renowned organization
and provides its services like
workshops and training
programs and also seminars on
some technical topics etc.
VLSI and its
Applications:
 VLSI- Very Large Scale Integration
 Creating an integrated circuit by
combining millions of transistor
 VLSI made it possible to integrate
all the digital components like CPU,
ROM,RAM etc. on a single chip.
Because of VLSI we are able to make
 Devices which are small in size
 Have more speed compared to any other
 Less power consumption
Moore’s Law:
Combinational
logic circuits:
 Output only depends on
present input at any given
time
 It does not use any memory or
storage device as it does not
depend on past outputs
 Logic gates are basic blocks of
combinational circuits
 Examples are adders,
subtractors, multiplexers,
demultiplexers etc.
Sequential circuits:

 Output depends on current input and


previous output
 It contain a memory element or a feedback
unit in order to store the previous output and
a clock
 Examples are flip flops, counters, shift
registers etc.
 There are two types of sequential circuits,
one is asynchronous which do not have clock
and other is synchronous which have clock
Programming languages:

 As it is so tough to design all IC’s or integrated


devices physically, we use some software’s to
implement the same design virtually
 Xilinx is one of the software’s we can use to
implement designs using Verilog codes
 By simulating in this software we can see all
the characteristics of design and also correct
errors if occur
 There are different ways to write a Verilog
code like gate level modelling, data flow
modelling, behavioral modelling.
 In Gate level modelling we directly use the logic diagram of circuit to
implement in Verilog code
 There will be keywords for each gate that we use in designing logic circuit
like “and” for and gate, “or” for or gate and same for all gates
 We declare input and output variables and use some intermediate wires to
connect the logic gates
 In dataflow modelling we use the logical statement of circuit to implement in
Verilog code
 There are number of operators that we use in dataflow modelling which will
be performed on operands to get the required output
 A keyword “assign” is used followed by “equal to” to assign a particular
operation to a variable
Some operators in dataflow modelling
Behavioural modelling:
 Same as all modellings initially, declaring input and output variables
 Blocks are defined by “always” or “initial” and both starts at simulation time
zero
 Initial executes only once where as always execute repetitively

module behave; always


reg [1:0]a, b; begin
#100 b = ~b;
initial end
begin End module
a = ’b1;
b = ’b0;
end

always
begin
#50 a = ~a;
end
 In this modelling we use procedural assignments which update the variables
under the control of procedural flow constructs that surrounded them
 Delay in assignment is used to suspend the execution of statement for
specified time units
 Blocking statements- defined by =
 Non blocking statements- defined by <=

reg [6:0] sum; reg h, ziltch;


sum[7] <= b[7] ^ c[7];
ziltch <= #15 ckz&h;//intra assignment
#10 hat <= b&c;
 Then after we use conditional statements like if-else and some other
Conclusion:
 In conclusion I understood about the combinational and sequential circuits
and implementation of combinational circuits in Verilog
 I understood how to use Xilinx software and all modellings in it

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