Thumb Instruction
Thumb Instruction
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Objectives
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CPU Instruction Set
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Processor Operating States
ARM state
which executes 32-bit, word-aligned ARM instructions.
THUMB state
which operates with 16-bit, halfword-aligned THUMB
instructions.
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Thumb Instruction Set
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Thumb Instruction Set
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Thumb state entry
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BX and BLX
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Eg
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* CODE32 instructs the assembler to interpret subsequent
instructions as ARM instructions
* CODE16 instructs the assembler to interpret subsequent
instructions as THUMB instructions
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Example
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Binary Encoding
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Thumb Programming Model
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Conti.
* All the data processing instructions that operate with and on the 'Lo'
registers update the condition code bits (the S bit is set in the
equivalent ARM instruction).
* The instructions that operate with and on the 'Hi' registers do not
change the condition code bits, with the exception of CMP which only
changes the condition codes.
* The instructions that are requiring '1 or 2 Hi regs' must have one or
both register operands specified in the 'Hi' register area.
* 3, 7 and 8-bit immediate fields is possible depending upon the
instructions.
* Shift amount for shifting instruction is 5 bit.
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* The following instructions perform ALU operations on to Lo
register pair.
* All instructions in this group set the CPSR condition codes.
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Instructions with high register range
only cmp sets CC
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Conditional Branch
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Egs
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