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COA GTU Study Material Presentations Unit-7 10052021051444AM

The document discusses computer arithmetic including addition, subtraction, and multiplication algorithms. It describes how binary addition and subtraction are performed by comparing the sign bits and magnitudes of the operands. It also explains the Booth multiplication algorithm which can multiply two signed binary numbers efficiently by adding or subtracting the multiplicand depending on pairs of bits of the multiplier. Finally, it covers decimal arithmetic units and how binary-coded decimal addition works by converting illegal binary codes to valid decimal codes.

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0% found this document useful (0 votes)
166 views16 pages

COA GTU Study Material Presentations Unit-7 10052021051444AM

The document discusses computer arithmetic including addition, subtraction, and multiplication algorithms. It describes how binary addition and subtraction are performed by comparing the sign bits and magnitudes of the operands. It also explains the Booth multiplication algorithm which can multiply two signed binary numbers efficiently by adding or subtracting the multiplicand depending on pairs of bits of the multiplier. Finally, it covers decimal arithmetic units and how binary-coded decimal addition works by converting illegal binary codes to valid decimal codes.

Uploaded by

Thabo Ndashe
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Computer Organization & Architecture (COA)

GTU # 3140707

Unit-7
Computer Arithmetic

Prof. Krunal D. Vyas


Computer Engineering Department
Darshan Institute of Engineering & Technology, Rajkot
[email protected]
9601901005
 Outline
Looping
• Addition and Subtraction
• Multiplication Algorithms (Booth Multiplication Algorithm)
• Decimal Arithmetic Unit
• Questions asked in GTU exam
Addition and Subtraction
Section - 1
Addition and Subtraction

Subtract Magnitudes
Add
Operation
Magnitudes When A > B When A < B When A = B

(+A) + (+B) + (A + B)
(+A) + (-B) + (A - B) - (B - A) + (A - B)
(-A) + (+B) - (A - B) + (B - A) + (A - B)
(-A) + (-B) - (A + B)
(+A) - (+B) + (A - B) - (B - A) + (A - B)
(+A) - (-B) + (A + B)
(-A) - (+B) - (A + B)
(-A) - (-B) - (A - B) + (B - A) + (A - B)
Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 4
Flowchart for Addition & Subtraction
Subtract operation Add operation

As = Sign bit of A Minuend in A Augend in A


Bs = Sign bit of B Subtrahend in B Addend in B

=0 As⊕Bs =1 =1 =0
As⊕Bs

As = Bs As ≠ Bs As = Bs
EA ← A+B’+1 As ≠ Bs EA ← A+B
AVF ← 0
=0 =1
A<B E
A≥B AVF ← E
A ← A’ ≠0 =0
A

A ← A+1 As ← 0 E = Carry
As ← As’ AVF = add overflow
flip-flop
END
(result is in A and As)

Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 5


Multiplication Algorithms (Booth
Multiplication Algorithm)
Section - 2
Multiplication
 Traditional way of binary multiplication Multiply operation

Multiplicand in B
23 10111 Multiplier in Q

x 19 x 10011
10111
10111
00000 =0 =1
00000 𝑄𝑛
10111 EA ← 𝐴+ 𝐵
437 110110101
≠0 =0
SC

END
(PRODUCT is in AQ)
Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 7
Perform 23 x 19
Multiplicand B = 10111 E A Q SC
Multiplier in Q 0 00000 10011 101
Qn = 1; add B 10111
First partial product 0 10111
Shift right EAQ 0 01011 11001 100
Qn = 1; add B 10111
Second partial product 1 00010
Shift right EAQ 0 10001 01100 011
Qn = 0; shift right EAQ 0 01000 10110 010
Qn = 0; shift right EAQ 0 00100 01011 001
Qn = 1; add B 10111
Fifth partial product 0 11011
Shift right EAQ 0 01101 10101 000
Final product in AQ =
0110110101
Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 8
Multiply (-9) x (-13) using Booth Algorithm
= 10111
= 01001
Initial 00000 10011 0 101
1 0 Subtract BR 01001
01001
ashr 00100 11001 1 100
1 1 ashr 00010 01100 1 011
0 1 Add BR 10111
11001
ashr 11100 10110 0 010
0 0 ashr 11110 01011 0 001
1 0 Subtract BR 01001
00111
ashr 00011 10101 1 000

Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 9


Booth Multiplication Algorithm
Multiply operation

Multiplicand in BR
Multiplier in QR

= 10
𝑄𝑛 𝑄 𝑛+1 = 01

= 00
A C ← 𝐴𝐶+𝐵𝑅+1 = 11 A C ← 𝐴𝐶+𝐵𝑅

≠0 =0
SC
END

Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 10


Decimal Arithmetic Unit
Section - 3
BCD Adder
 Two BCD digits are applied to 4-bit binary
1
adder which produce result ranging from 0 to
97 1001 0111 19 i.e. 9 + 9 + 1 = 19
+ 99 + 1001 1001
 Output sum of two decimal numbers must be
196 1 0011 0000 Both groups generate carry
+0110 +0110 Add 0110 to each
represented in BCD.
1 1001 0110  Problem is to find rule by which binary
number is to be converted to correct BCD

If codes are illegal or carry is generated in


the group then we add 0110 to that
particular group

Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 12


BCD Adder

Binary Sum BCD Sum Binary Sum BCD Sum


K Z8 Z4 Z2 Z1 C S8 S4 S2 S1 Decimal K Z8 Z4 Z2 Z1 C S8 S4 S2 S1 Decimal
0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 10
0 0 0 0 1 0 0 0 0 1 1 0 1 0 1 1 1 0 0 0 1 11
0 0 0 1 0 0 0 0 1 0 2 0 1 1 0 0 1 0 0 1 0 12
0 0 0 1 1 0 0 0 1 1 3 0 1 1 0 1 1 0 0 1 1 13
0 0 1 0 0 0 0 1 0 0 4 0 1 1 1 0 1 0 1 0 0 14
0 0 1 0 1 0 0 1 0 1 5 0 1 1 1 1 1 0 1 0 1 15
0 0 1 1 0 0 0 1 1 0 6 1 0 0 0 0 1 0 1 1 0 16
0 0 1 1 1 0 0 1 1 1 7 1 0 0 0 1 1 0 1 1 1 17
0 1 0 0 0 0 1 0 0 0 8 1 0 0 1 0 1 1 0 0 0 18
0 1 0 0 1 0 1 0 0 1 9 1 0 0 1 1 1 1 0 0 1 19

Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 13


BCD Adder
 Correction from binary to BCD is needed in Addend Augend
following conditions
 K=1
4-bit binary adder
 Z8 and Z4 or Z8 and Z2 must have 1
Carry Carry in
K
out
Z8 Z4 Z2 Z1

𝐶= 𝐾+𝑍 8 𝑍 4+𝑍 8 𝑍 2 Output


carry

4-bit binary adder

S8 S 4 S 2 S 1
Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 14
Questions asked in GTU exam
Section - 4
Questions asked in GTU exam
1. Explain Booth multiplication algorithm for multiplying binary integers in signed 2’s
complement representation.
2. Draw and explain flowchart for addition and subtraction operations with sign-magnitude data.
3. Explain BCD Adder with its block diagram.
4. Develop an algorithm for multiplication of two binary numbers, which are stored as per
floating point representation.
5. Draw flowchart hardware multiplication algorithm and explain it.

Prof. Krunal D. Vyas #3140707 (COA)  Unit 7 – Computer Arithmetic 16

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