CHAPTER 3
3.1.3 Describe various types of
addressing modes with example.
Describe various types of addressing
modes with example.
• Classification of instruction sets:
• Data transfer Group
• Arithmetic Group
• Logical Group
• Shift and rotate Group
• Branch & Subroutine
• Stack & Queue
Addressing Mode
Addressing Mode
Data transfer Group
• These instructions transfer or move data between its internal registers,
between an internal register and a storage location in memory, or
between two locations in memory.
• - memory to register
• - register to memory
• - register to register
• - memory to memory
Data transfer Group
MOVE INSTRUCTION
DATA TRANSFER | ADDRESSING MODE | IMMEDIATE DATA
ASSUME THE REGISTER HOLD FOLLOWING VALUE :
D1 = AABBCCDD
Obtain the new content of register D1 after following instruction is
executed.
ANSWER:
1) MOVE. B #$35, D1 1) D1 = AABBCC35
2) D1 = AABB0035
2) MOVE.W #$35, D1 3) D1 = 00000035
3) MOVE.L #$35, D1 4) D1 = AABBCC1D
4) MOVE.B #@35,D1 5) D1 = AABB001D
5) MOVE.W #@35,D1 6) D1 = AABBCC0A
6) MOVE.B #%1010,D1 7) D1 = 00000000A
7) MOVE.L #%1010,D1
MOVE INSTRUCTION
DATA TRANSFER |ADDRESSING MODE | DATA REGISTER DIRECT
ASSUME THE REGISTER HOLD FOLLOWING VALUE :
D0 = AABBCCDD D1 = 11223344
Obtain the new content of register D1 after following instruction is
executed.
ANSWER:
1) MOVE. B D0, D1 SOURCE CONTENT DESTINATION CONTENT
D0 = AABBCCDD D1= 112233DD
SOURCE CONTENT DESTINATION CONTENT
2) MOVE.W D0, D1
D0 = AABBCCDD D1= 1122CCDD
SOURCE CONTENT DESTINATION CONTENT
3) MOVE.L D0,D1 D0 = AABBCCDD D1= AABBCCDD
MOVE INSTRUCTION
DATA TRANSFER |ADDRESSING MODE | ADDRESS REGISTER DIRECT
ASSUME THE REGISTER HOLD FOLLOWING VALUE :
A0 = AABBCCDD A1 = 11223344
Obtain the new content of register D1 after following instruction is
executed.
ANSWER:
1) MOVE. B A0, A1 SOURCE CONTENT DESTINATION CONTENT
A0 = AABBCCDD A1= 112233DD
SOURCE CONTENT DESTINATION CONTENT
2) MOVE.W A0, A1
A0 = AABBCCDD A1= 1122CCDD
SOURCE CONTENT DESTINATION CONTENT
3) MOVE.L A0,A1 A0 = AABBCCDD A1= AABBCCDD
MOVE INSTRUCTION
DATA TRANSFER |ADDRESSING MODE | ABSOLUTE DATA
ASSUME THE REGISTER & MAIN MEMORY HOLD FOLLOWING VALUE :
D1 = AABBCCDD Obtain the new content of register
MAIN MEMORY D1 after following instruction is
$1000 55 66 executed.
$1002 77 FF
$1004 43 21 ANSWER
1) MOVE. B $1000, D1 2) MOVE.W $1000,D1 3) MOVE.L $1000,D1
ANSWER: ANSWER: ANSWER:
DESTINATION CONTENT DESTINATION CONTENT DESTINATION CONTENT
D1= AABBCC55 D1= AABB5566 D1= 556677FF
MOVE INSTRUCTION
DATA TRANSFER |ADDRESSING MODE| ABSOLUTE DATA
ASSUME THE REGISTER & MAIN MEMORY HOLD FOLLOWING VALUE :
D1 = AABBCCDD Obtain the new content of register
MAIN MEMORY D1 after following instruction is
$1000 55 66 executed.
$1002 77 FF
$1004 43 21
4) MOVE. W $1003, D1 5) MOVE.B $1003,D1
ANSWER: ANSWER:
DESTINATION CONTENT DESTINATION CONTENT
D1= AABBFF43 D1= AABBCCFF
MOVE INSTRUCTION
DATA TRANSFER |ADDRESSING MODE | ABSOLUTE DATA
ASSUME THE REGISTER & MAIN MEMORY HOLD FOLLOWING VALUE :
D1 = AABBCCDD Obtain the new content of register
MAIN MEMORY D1 after following instruction is
$1000 55 66 executed.
$1002 77 FF
$1004 43 21
1) MOVE. B D1, $1000 2) MOVE.W D1 ,$1000 3) MOVE.L D1 ,$1000
ANSWER: ANSWER: ANSWER:
DESTINATION CONTENT DESTINATION CONTENT DESTINATION CONTENT
$1000 DD 66 $1000 CC DD $1000 AA BB
$1002 77 FF $1002 77 FF $1002 CC DD
MOVE INSTRUCTION
DATA TRANSFER |ADDRESSING MODE|REGISTER INDIRECT
ASSUME THE REGISTER & MAIN MEMORY HOLD FOLLOWING VALUE :
D1 = AABBCCDD Obtain the new content of register
A1 = 00001000 D1, A1 and related address after
MAIN MEMORY following instruction is executed.
$1000 55 66
$1002 77 FF
1) MOVE. W D1, (A1)
ANSWER:
D1 = AABBCCDD DESTINATION CONTENT
$1000 CC DD
A1 = 00001000 $1002 77 FF
MOVE INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER INDIRECT
ASSUME THE REGISTER & MAIN MEMORY HOLD FOLLOWING VALUE :
D1 = AABBCCDD Obtain the new content of register
A1 = 00001002 D1, A1 and related address after
MAIN MEMORY following instruction is executed.
$1000 55 66
$1002 77 FF
1) MOVE. W D1, (A1)
ANSWER:
D1 = AABBCCDD DESTINATION CONTENT
$1000 55 66
A1 = 00001002 $1002 CC DD
MOVEA INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER DIRECT
• MOVEA (MOVE Address)
• Provides a means of initializing an address register.
• Only a word or longword operand is allowed to be
transferred into the specified address register.
• For a word operation, the source operand is sign-extended
before being loaded into the address register.
MOVEA INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER DIRECT
ASSUME THE REGISTER HOLD FOLLOWING VALUE :
D6 = AB206541 Obtain the new content of register
after following instruction is
A2 = executed.
ABCD1234
1) MOVEA.W D6,A2
ANSWER:
D6 = AB206541
A2 = 00006541
MOVEA INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |IMMEDIATE DATA
ASSUME THE REGISTER HOLD FOLLOWING VALUE :
Obtain the new content of register
A0 = $00000000
after following instruction is
executed.
2) MOVEA.W #$8C00,A0
ANSWER:
A0 = FFFF8C00
MOVEA INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER DIRECT
ASSUME THE REGISTER HOLD FOLLOWING VALUE :
Obtain the new content of register
D6 = AB20A541
after following instruction is
A2 = ABCD1234 executed.
3) MOVEA.W D6,A2
ANSWER:
D6 = AB20A541
A2 = FFFFA541
MOVEA INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER DIRECT
ASSUME THE REGISTER HOLD FOLLOWING VALUE :
Obtain the new content of register
D6 = $AB206541 ,
after following instruction is
A2 = $ABCD1234 executed.
4) MOVEA.L D6,A2
ANSWER:
D6 = $AB206541
A2 = $AB206541
EXG INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER DIRECT
• EXG = Exchange
• EXG interchanges the contents of two registers.
• operand size for EXG is longword
1) EXG D1,D5
Before : D1 = 11223344 , D5 = 66778899
After : D1 = 66778899 , D5 = 11223344
SWAP INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER DIRECT
• SWAP exchanges the lower word of the specified
data register with its upper word.
• The operand size for SWAP is word
1) SWAP D1 2) SWAP D1
Before : D1 = 11223344 Before : D1 = $01234567
After : D1 = 33441122 After : D1 = $45670123
CLR INSTRUCTION
DATA TRANSFER |ADDRESSING MODE |REGISTER DIRECT
• CLR = Clear
• Loads the target with 0
1) CLR.B D1 2) CLR.W D1
Before : D1 = 11223344 Before : D1 = 11223344
After : D1 = 11223300 After : D1 = 11220000
ARITHMETIC GROUP
•Similarly, as the operation of mathematic, addition
(+), subtraction (-), multiplication (x), division (÷)
•Binary arithmetic instructions performs signed and
unsigned operations.
ARITHMETIC GROUP | ADDITION
•68k microprocessor allows addition of 3 data size i.e 8 bit
(.B), 16 bit (.W), and 32 bit (.L)
•Data is accessed via register (D0 to D7), memory, absolute
data and I/O port.
•< Destination> + <Source> <Destination>
•Both can be data registers
•At least one must be a data register
ADD.B D0, D1 ; Perform addition operation between data in D1 and D0
in byte size. ( D1+D0).The result will be stored in D1.
ADDITION ( ADD) OPERATION
ADD INSTRUCTION
ARITMETHIC GROUP|ADDRESSING MODE|DATA REGISTER DIRECT
Before :, D0 = $00002222 D1 = $00200500
1) ADD.L D0,D1 2) ADD.B D0,D1
After After
D0 = 00002222 D0 = 00002222
D1 = 00202722 D1 = 00200522
ADD INSTRUCTION
ARITMETHIC GROUP|ADDRESSING MODE|IMMEDIATE DATA
Before : D1 = BBCCDDAA
1) ADD.B #$30,D1 2) ADD.W #$555,D1
After After
D1 = BBCCDDDA D1 =BBCCE2FF
3) ADD.B #$99,D1
After
D1 =BBCCDD43
ADD INSTRUCTION
ARITMETHIC GROUP|ADDRESSING MODE|ABSOLUTE
Before : D1 = $00200500
$3000 32
$3001 43
$3002 98
1) ADD.W $3000,D1 2) ADD.B $3002,D1
After After
D1 = 00203743 D1 =
ADDI INSTRUCTION
ARITMETHIC GROUP|ADDRESSING MODE|IMMEDIATE DATA
• Add an immediate value
• Cannot be done using ADD as one operand must be a
data register.
1)ADDI.W #$72,D1 “ADDI.W #$72,D1” and
“ADD.W #$72,D1”
are equivalent
Before : D1 = $00200500
After : D1 = $00200572 But “ADDI #” can add to a
memory location
SUB INSTRUCTION
ARITMETHIC GROUP|SUBTRACTION
• 68k microprocessor allows subtraction of 3 data size i.e
8 bit (.B), 16 bit (.W), and 32 bit (.L)
• < Destination> - <Source> <Destination>
(Result stored in destination)
• Result of subtraction is store at destination
• At operand , both can be data registers.
• At least one at operand must be a data register.
SUB. B D0, D1 ; Perform subtraction operation between data in D1 and
D0 in byte size. ( D1-D0).The result will be stored in D1.
SUBTRACTION ( SUB) OPERATION
SUB INSTRUCTION
ARITMETHIC GROUP|DATA REGISTER DIRECT
Before : D1 = 11200511 , D0 = CCDDAABB
1) SUB.B D1,D0
After : D1 = _________ , D0 = __________
2) SUB.W D1,D0
After : D1 = __________ , D0 = __________
SUB INSTRUCTION
ARITMETHIC GROUP|IMMEDIATE DATA
Before : D1 = 11200511 , D0 = CCDDAABB
3) SUB.B #$80,D0
After : D0 = __________
4) SUB.W #8000,D0
After : D0 = __________
PRACTICES
MULU INSTRUCTION
ARITMETHIC GROUP|MULTIPLICATION
• 68k microprocessor allows multiplication of 16 bits
destination with 16 bits source.
• Data is accessed via register (D0 to D7), memory, absolute data and
I/O port.
• Result of multiplication is store at destination.
• At operand , both can be data registers.
• At least one at operand must be a data register.
MULU D0, D1 ; Perform multiplication operation between data in D1
and D0 in word size. ( D1 *D0). The result will be stored in D1.
MULTIPLY ( MULU) OPERATION
MULU INSTRUCTION
ARITMETHIC GROUP|DATA REGISTER DIRECT
Before : D1 = AB200002 ; D2 = EEDD6541
1) MULU D1,D2 ;16 bit x 16 bit = 32 bit
After : D1 = AB200002 ; D2 = 0000CA82
6541
X 0002
CA82
MULU INSTRUCTION
ARITMETHIC GROUP|DATA REGISTER DIRECT
Before : D1 = AB200015 ; D2 = EEDD6541
2) MULU D1,D2 ;16 bit x 16 bit = 32 bit
After : D1 = _________ ; D2 = ____________
MULU INSTRUCTION
ARITMETHIC GROUP|IMMEDIATE DATA
@ octal no.
Before : D1 = AB206541 % binary no.
$ hexadecimal no.
No signdecimal no.
3) MULU #3,D1 ;16 bit x 16 bit = 32 bit
After : D1 = _________
MULU INSTRUCTION
ARITMETHIC GROUP|IMMEDIATE DATA
@ octal no.
Before : D1 = AB20FFFF % binary no.
$ hexadecimal no.
No signdecimal no.
3) MULU #2,D1 ;16 bit x 16 bit = 32 bit
After : D1 = _________
PRACTICES
Assume D0 and D1 is holding following data. Obtain new content of data register
after following instruction is executed and assume all instruction are not
sequence. D0 = 0001122
D1 = 00001010
PRACTICES
D0 = 77881122 BEFORE
D1 = BBCC1010
PRACTICES
D0 = 77881122
BEFORE
D1 = BBCC1010
PRACTICES
D0 = 77881122
BEFORE
D1 = BBCC1010
DIVU INSTRUCTION
ARITMETHIC GROUP|DIVISION
• 68k microprocessor allows division of 32 bits destination
with 16 bits source.
• Data is accessed via register (D0 to D7), memory, absolute data and
I/O port.
• Result of division is store at destination
• At operand , both can be data registers.
• At least one at operand must be a data register.
DIVU D0, D1 ; Perform division operation between data in D1 and D0 in
word size. ( D1 ÷ D0). The result will be stored in D1.
DIVISION ( DIVU) OPERATION
DIVU INSTRUCTION
ARITMETHIC GROUP|IMMEDIATE DATA
1) DIVU #2,D3
i) Convert into decimal no
ii) Perform division between two number
Before : D3 = 00006541 iii) Convert back into hexadecimal no
After : D3 =000132A0
Result
i)654116 =2592110 ii) iii) Result :
Balance
#2 = 210 1296010 = 32A016
Balance :
16 bit lower(result) 16 bit upper 110 = 116
( remainder/ balance)
DIVU INSTRUCTION
ARITMETHIC GROUP|IMMEDIATE DATA
2) DIVU #$1234,D0
i) Convert into decimal no
ii) Perform division between two
Before : D0= $00005678 number
iii) Convert back into hexadecimal
no
After : D0 = $0DA80004
Result
Balance
16 bit lower(result) 16 bit upper ( remainder/ balance)
PRACTICES
PRACTICES
BEFORE
PRACTICES
BEFORE
PRACTICES
BEFORE
NEG operation
• NEG – Take the 2’s complement of target
• Example 1: NEG = 2’s complement
$41 = 01000001
NEG.B D3 Invert 1011111 0
+ 1
Before : D3 = $AB206541 $BF = 10111111
After : D3 = $AB2065BF
Example 2:
NEG.W D3
Before : D3 = $AB206541
After : D3 = $AB209ABF
Example 3:
NEG.W D3
Before : D3 = $AB202528
After : D3 = ___________
LOGICAL GROUP
• Similar to the logic gate, logical operations
involve AND, OR, and NOT.
• The content of the register and memory are
compared.
• The operation is implemented in ALU.
• 68k microprocessor allows logical operation
of 3 data size i.e 8 bit (.B), 16 bit (.W), and 32
bit (.L)
• < Destination> AND <Source> <Destination>
• Result of logical process is store at destination
LOGICAL GROUP
AND INSTRUCTION
LOGICAL GROUP| IMMEDIATE DATA
Example 1:
• AND.B #$3E, D3 [D3(B) AND $3E D3 (B) ]
(8 bit data in data register D3 is AND-ed with 8 bit
absolute data, and the product is stored in D3)
OR INSTRUCTION
LOGICAL GROUP| DATA REGISTER DIRECT
Example 1:
• OR.B D0, D1 [D1 (B) or D0 (B) D1(B) ]
• 8 bit data in data register D1 is OR-ed with 8 bit data in
data register D0, and the product is stored in D1)
NOT INSTRUCTION
LOGICAL GROUP| DATA REGISTER DIRECT
Example 1:
• NOT.B D1 [D1(B) NOT D1 ]
(content in D1 is NOT, and the product is stored back to D1)
0101 0101
Example 1
Write the coding by using assembly language to
solve the equation below:
4510 +6C16
ORG $1000
MOVE.B #45, D0
MOVE.B #$6C, D1
ADD.B D1,D0
END
Example 2
Write the coding by using assembly language to
solve the equation below:
(258 + 1510 ) – A16
Solution
ORG $1000
MOVE.B #@25, D0
MOVE.B #15, D1
MOVE.B #$A, D2
ADD.B D1, D0
SUB.B D2, D0
END
Example 3
Write the coding by using assembly language
to solve the equation below:
(7008 * 101010112 /ABAC16)
Solution
ORG $1000
MOVE.W #@700, D0
MOVE.W #%10101011, D1
MOVE.W #$ABAC, D2
MULU D1, D0
DIVU D2, D0
END
Example 4
Write the coding by using assembly
language to solve the equation below:
(DE16 AND 778) + 2010
Solution
ORG $1000
MOVE.B #$DE, D0
MOVE.B #@77, D1
MOVE.B #20, D2
AND.B D1,D0
ADD.B D2,D0
END
Simplify the equation below
Thank You…
