Nodal and Mesh

Boylestad: ArtAnalysis
8.9 , P:306; Alexender: Art:3.2, P:76,

Node: A node is a junction of two or more branches,

where a branch is any combination of series elements.
Boylestad P:290.
Mesh: A mesh is a loop ,no other loop inside in it.
Boylestad
Mesh: A mesh is a loop which does not contain
any other loops within it. Alex P:88,
Active Node and Reference Node:

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 Determinants Methods For Solving Simultaneous
Equation
Boylestad: Appendix D, P:1128-1135

Simultaneous Equation Solution using Calculator

“Youtube”
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 Nodal
Boylestad: Art 8.9 ,Analysis
P:306; Alexender: Art:3.2, P:76,
Procedure
1. Determine the number of nodes within the network.
2. Pick a reference node and label each remaining
node with a subscripted value of voltage: V1, V2 , and
so on.
3. Apply KCL at each node
4. Solve the resulting simultaneous equations for the nodal
voltages.

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 Nodal Analysis
Alexender: Example:3.1, P:78

At node 1, applying KCL

At node 2, applying KCL
Solving (1)and(2)

......(1)
......(2)

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 Nodal
Analysis
Write the nodal equations and find the voltage across the 2Ω resistor for the network in Figure.

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 Nodal
Analysis
Alexender: Art:3.3, P:82
Supernode:A supernode is formed by enclosing a voltage source connected between two
nonreference nodes and any elements connected in parallel with it.
At node 1,
v1 =10V..........(1)
Now, the supernode condition
v2 - v3 = 5V..........(2)
At supernode (2&3), applying KCL

18v1  15v2  2v3  0........

After solving (1), (2) and (3) ( 3)

v1 
v2 
v3  EEE-3111 6
 Nodal
Analysis
Alexender: Example:3.3, P:82
Now, the supernode condition
v2 - v1 = 2V..........(1)

At supernode (1&2), applying KCL

2 v1  v2 v2 v2  v1  7 
v1 2 10  4 10 0
v1 v2  v2
v
  5  0;  1 
2 1  v425
2v  20........(2)2
4

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 Nodal
Analysis
Supernode Practice

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 Mesh
Boylestad: Art 8.7 , P:295, P:, Alexender: Art:3.4 P:87,
Analysis
Steps of Mesh Analysis
1. Assign a distinct current in the
clockwise/anticlockwise direction to each mesh.
2. Indicate the polarities for each element in each mesh.
3. Apply KVL around each closed loop.
4. Solve the equations for the assumed mesh currents.

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 Mesh
Analysis
Alexender: Example:3.5, P:90
KVL in mesh-1

KVL in mesh-2

Solving above two equations

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Mesh
Analysis

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 Supermesh
AnalysisArt:3.5, P:92
Alexender:
A supermesh results when two meshes have a current source in common.

Now, the supermesh condition

i2 - i1 = 6A.........(1)

In supermesh (2&3), applying KVL

Solving above two equations

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Supermesh
Analysis

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 Network Theorems
Boylestad: Ch:9 , P:345, P:, Alexender: Chap:4
P:119,

1. Superposition Theorem
2. Thévenin’s Theorem
3. Norton’s Theorem
4. Maximum Power Transfer Theorem

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 Superposition Theorem
Boylestad: Art:9.1 , P:345, Alexender: Art:4.3
P:123;
Statement: The current through, or voltage across, any element of a
linear network is equal to the algebraic sum of the currents or
voltages produced independently by each source.

Steps to Apply Superposition Principle:

1.Turn off all independent sources except one source. Find the
output (voltage or current) due to that active source using nodal
or mesh analysis.
2. Repeat step 1 for each of the other independent sources.
3.Find the total contribution by adding algebraically all the
contributions due to the independent sources.

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 Superposition Theorem
Alexender: Exam:4.3 P:123;

To obtain v1, we set the current To get v2, we set the voltage source to zero,Using
source to zero. Applying KVL to the loop. current division,

Or,
v 2  (4 8) *
3  8V

Therefore,

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 Superposition Theorem
Alexender: Ex:4.5 P:126;

To get i1,
To get i2,
To get i3,

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Superposition Theorem

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 Thévenin’s Theorem
Boylestad: Art:9.3 , P:353, Alexender: Art:4.5
P:132;
Statement: A linear two-terminal circuit can be replaced by an
equivalent circuit consisting of a voltage source in series
with a resistor.
Steps to Apply:
1. Remove that portion of the network where the
Thévenin equivalent circuit is to be applied.
2. Mark the terminals of the remaining two-terminal
network.
3. Calculate the open-circuit voltage (ETh) between the
marked terminals.
4. Caculate the seen resistance from the marked terminal.
5. Draw Thévenin equivalent circuit.
6. Complete the Thévenin equivalent circuit by connecting the
EEE-3111 19
removed portion in step1
 Thévenin’s Theorem
Alexender: Ex:4.8 P:133;

/Eth

At the top node, KCL gives

The Thevenin equivalent circuit

Rth

Eth

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 Thévenin’s Theorem
Boylestad: Ex:9.10 P:359;

Eth

Rth

Eth
Rth=2 kΩ
Eth Eth  6 Eth 10
6  0.8  4 0 The Thevenin equivalent circuit
Eth=3V

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Thévenin’s Theorem

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 Norton’s Theorem
Boylestad: Art:9.3 , P:353, Alexender: Art:4.5
P:132;
Statement: A linear two-terminal circuit can be replaced by an
equivalent circuit consisting of a current source in parallel
with a resistor.
Steps to Apply:
1. Remove that portion of the network where the
Norton equivalent circuit is to be applied.
2. Mark the terminals of the remaining two-terminal
network.
3. Calculate the short circuit current (IN) between the
marked terminals.
4. Caculate the seen resistance from the marked terminal.
5. Draw Norton equivalent circuit.
6. Complete the Norton equivalent circuit by connecting the
EEE-3111 23
removed portion in step1
 Norton’s Theorem
Alexender: Ex:4.11 P:138;
= Rth

Eth

IN

Norton’
s circuit

RN
IN
Rth
Thevenin’
Eth=4V
s circuit

I N  Eth
Rth

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Norton’s Theorem

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 Maximum Power Transfer Theorem
Boylestad: Art:9.5 , P:367, Alexender: Art:4.8
P:142;
Statement:A load will receive maximum power from a network
when its resistance is exactly equal to the Thévenin resistance of
the network applied to the load.
The power delivered to the load

x=RL
u=RL
v=(RTh+
R L)2

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 Maximum Power Transfer Theorem
Alexender: Ex:4.13 P:143;

From,Thevenin'
stheorem ETh  VTh 
22V
RTh  9
For maximum power
to load

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Maximum Power Transfer Theorem

EEE-3111 28
 AC Circuit Analysis
Alexender: Sinusoids and Phasors, Chap:9 P:352;
Complex number:

Complex Algebra:

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 AC Circuit Analysis
Alexender: Sinusoids and Phasors, Chap:9 P:352;
A sinusoid is a signal that has the form of the sine or cosine function.

v1(t) = Vm sin ωt
v2(t) =Vm cos ωt =Vm sin (ωt+90°)

v1(t) = Vm sin ωt =Vm cos (ωt-90°)

v2(t) =Vm cos ωt

EEE-3111 30
 AC Circuit Analysis
Alexender: Sinusoids and Phasors, Art:9.3 P:359;
A phasor is a complex number that represents the amplitude and phase of a sinusoid.

Time Domain Represntation Time Domain Represntation

v1(t) = Vm sin ωt v2(t) =Vm cos ωt
v2(t) =Vm sin (ωt+90°) v1(t) = Vm cos (ωt-90°)
Phasor Domain Represntation Phasor Domain Represntation
V2  Vm 0
V1 
V1  Vm 90
Vm2 0
V 
Vm 90
In general, Time Domain Represntation
v1(t) = Vm sin ωt v(t) = Vm sin ωt
v2(t) =Vm sin (ωt±θ)
Phasor Domain Represntation
V1  Vm 0 V  Vm 0 (Maximum
Value )
V 2  V m   
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Vm
 AC Circuit Analysis
Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589
PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Resistor

V  V m  0

I  I m 

V  IR

Z=R
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 AC Circuit Analysis
Alexender: Art:9.4 P:359; Boylestad Art 14.3,
P:589
PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Inductor
I L  I m
0
I  I m 

V L  LI m sin( t  90 )
V L  LI m  90   jLI L  jX L I L

V  jXLI

Z=jωL=jXL=XL<90°
XL=ωL
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3
 AC Circuit Analysis
Alexender: Art:9.4 P:359; Boylestad Art 14.3,
P:589
PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Capacitor
VC  Vm  0 
V  V m 

i  CV m cos( t  90 ) iC  CV m sin( t  90 )

I C  CV m  90   jCV C ( In phasor form )
In Phasor form
1 1
I  CV m e j ( 90  )  jCV VC  IC   j I C   jX C I
jC C
C
1 1
V  I j I   jX C I
jC C
V   jX C I
Z=-j/(ωC)=-jXC=XC<-90°
XC=1/(ωC)
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 AC Circuit Analysis
Alexender: Art:9.4 P:359; Boylestad Art 14.3,
P:589
PHASOR RELATIONSHIPS
Ohm’s Law: V  V FOR
 IZ CIRCUIT ELEMENTS:
I Z

Z   jX C   j  X C   90 
Z  jX  jL C
L
Z  R V  V m cos( t  )
i  I m cos( t 
i  I m cos( t  ) In Phasorform
In) Phasor form
In Phasor form V  V m ;
I  I m ;
I  I m ; V V 
V  IZ  I m * jX I 
Z   jX C
L m
V  IZ  I m * R
V  jLI m    LI m    90 
V  I m R  I  jCV m    CV m    90 
In time domain ,
In time domain , In time domain ,
v  LI m cos( t    90 )
v  Im R cos( t  ) i  CV m cos( t    90 )
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 AC Circuit Analysis
Alex Art 9.7, P: 373;Boylestad Art 15.3, 15.7,
P:643,664
Impedances in Series and Parallel :

EEE-3111 36
 AC Circuit Analysis
Alex Art 9.6, P: 372;Boylestad Art 15.3, 15.4,
P:644,650
Kirchhoffs Voltage Law(KVL) :

Voltage Divider Rule(VDR) :

E
V1  * Z1
Z1  Z 2
E
V2  *Z2
Z1  Z 2

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 AC Circuit Analysis
Alex Art 9.7, P: 373;Boylestad Art 15.8,15.9,
P:668,675
Kirchhoffs Current Law(KVL) :

Current Divider Rule(VDR) :

V P  IT ( Z1 Z 2 )  I T Z 1 Z
Z1  Z 2
2
ITZ2 Z2
V
I1  P   IT
Z1 Z1  Z 2 Z1  Z 2

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 AC Circuit Analysis

1000rad / sec
Z1  R  30
Z2  jXL  jL  j *1000rad / sec*65mH
j65
Z3   jX C   j   
C (1000rad / j25
j sec)*(40F)
In Phasor
form Vs
1215V
Z  Z1  Z 2 
Z3  30 j65
1215
VS
I Z    0.24  38.13
j25
A
 30
i(t) 5053.13
i
j40 
0.24cos(1000t 
5053.13
38.13) A
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 AC
1000rad / sec
Circuit Analysis
Z1  R  30
Z2  jXL  jL  j *1000rad / sec*65mH
j65
Z3   jX C   j   
C (1000rad / j25
j sec)*(40F)
In Phasor
form Vs
1215V
VR  IZ1  IR  0.24
38.13*30  7.2
38.13V
U sin g KVL U sin g VDR
VL  IZ2  I ( jXL ) 
0.24 38.13*(
VS VR V j65) VR  1Z VS   7.2 
V  V VL V
V C  0 ZT 5053.13
15.651.87V
S R L C 38.13V
30*1215
1215V ( j65)*1215
VC  IZ3  I ( jX C )  VL  2
VS  
ZT  5053.13
0.24 38.13*( j25)  15.651.87V
6128.13V Z (
VC  3 VS   6
ZT j25)*1215
5053.13 128.13V
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 AC Circuit Analysis
Z1
Alex Ex9.11, P: 376;
 4rad / sec
Z3 Z1  R  60
j j
Z2 Z 2   jX C   
C j25
(4rad /
L  j * 4rad / sec* 5H 
Z3  jX L  jsec)*(10mF)
I 2  Z3 I  j20*0.17 
Z 2Z 3  j25 j20 j20 In Phasor form
74.04
 Vs  20 15V
0.68105.96A Z  Z1  Z 2 Z3  60 ( j25)
I3  I  I 2 (KCL) ( j20)
 0.17   60
V j100 20116.6259.04
74.04  S   0.17  74.04
o  I3 Z 3 1715.96V
V I  15
Z A
0.68105.96
VDR(Z2 Z3  j100) Vo  116.6259.04
VS VR  20 15  (0.17 
 0.85  74.04*60)
VS *(Z
Vo  A
74.04 Z 3 ) 20 15* j100
2

Z1  Z 2 Z 3  60 j100 17.1515.66V

vo 17.15cos(4t 15.66)V
17.1515.96
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V
AC Circuit Analysis (Power)
Boylestad Art 14.5, P: 603;

EEE-3111 42
 AC Circuit Analysis (Power)
Boylestad Ex 16.2, P: 715;

V  IZ  I 2 Z 2  I 1 Z 1
 50 A136 .26  * ( j8)  400  46 .25
V  VI cos(V I )  400 * 50 cos( 46 .25  30 )  19201 Watt
Psource
P  I 2 R  80 2 * 3  19200
Watt
R 1

EEE-3111 43
AC Circuit Analysis (Power)
Boylestad Ex 16.4, P: 716;

EEE-3111 44