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1 © 2021 Arm
 Introduction to
Arm-based
System-on-Chip Design

Intro to System-on-Chip Design course

© 2021 Arm
Learning Objectives
At the end of this lecture, you should be able to:
• Explain why the SoC concept developed.
• Describe scaling and its effect on the cost of chip fabrication.
• Outline strategies to improve the productivity of IC design engineers.
• Define the meaning of SoC and list its basic components.
• Explain the advantages of SoC over system on boards.
• Explain the limitations of SoC design.

3 © 2021 Arm
Module Syllabus

• Why the SoC Concept Developed?

• Advantages and Limitations of SoCs
• Differences among SoCs, CPUs and MCUs
• SoC Design Flow
• Examples of Commercialized SoCs

4 © 2021 Arm
Why the SoC Design Concept Developed

• We are living in a post-PC era, with:

• Smartphones and tablets
• The Internet of Things, wearable computing, and cyber-physical systems
• Industry 4.0
• The silicon transistor is still at the heart of this revolution.
• The primary metrics of silicon chips have changed: from clock-frequency to cost, form-
factor, and power.
• On-chip integration of functional hardware is now more important than ever.
• How and why have we reached this point?

5 © 2021 Arm
Moore’s Law
Moore’s Law

(*)
Prediction of Moore’s Law
(*) Data are based on international semiconductor technology road map (http://www.itrs.net/)
6 © 2021 Arm
Why Scaling?

The virtuous circle of the semiconductor industry

7 © 2021 Arm
The Design Productivity Gap
The design gap

1.00E+07 1.00E+08

Productivity (transistors/staff month)

58% per year compound
1.00E+06 complexity growth 1.00E+07
Logic transistors per chip
1.00E+05 1.00E+06

1.00E+04 1.00E+05

1.00E+03 1.00E+04

1.00E+02 1.00E+03

21% per year compound

1.00E+01 productivity growth 1.00E+02

1.00E+00 1.00E+01
1981 1991 2001

Complexity outpaces design productivity

8 © 2021 Arm
Bridging the Design Productivity Gap
• Several strategies exist to reduce the design productivity gap, namely:

Design
Abstraction

Standard
Tools and Design
Automation
Hardware
Platforms Systems
on
Chips

Design Fast
Reuse Prototyping

9 © 2021 Arm
What is an SoC?

• An SoC is an integrated circuit that packages basic computing components into a single
chip.
• An SoC has most of the components to power a computer.

Arm cores

AMBA buses

Physical IPs

Motherboard of a PC SoC

Picture source: http://thecustomizewindows.com/, http://www.adafruit.com/

10 © 2021 Arm
What Is Inside an SoC?

System Manager
(Processor)

System Bus

Program Data
Timer DAC GPIO Watchdog
Memory Memory

11 © 2021 Arm
Example Arm-based SoC

Clock Power
Generator Management Unit
Watchdog
JTAG/Serial wire
DMA
Low Latency Arm Cortex-M0
AHB IOP Microprocessor Timers

APB Bus
Mux

AHB to APB UART

Arm
ARMAMBA
AMBA33AHB-Lite
AHB-LiteSystem
SystemBus
Bus
Bus Bridge

System Boot ROM 7-segment

AHB APB
RAM UART
ROM VGA GPIO
RAM Timer
Control ROM Table Peripheral
Display Peripheral

An example of an Arm-based SoC

12 © 2021 Arm
Advantages of SoCs
Higher
performance

Lighter
Low cost
footprint
SoC
Advantages

Higher Power
reliability efficiency

13 © 2021 Arm
Limitations of SoCs
Less
flexibility

SoC
Limitations

Application
Complexity
specific

14 © 2021 Arm
SoC v Microcontroller v Processor

SoC CPU MCU

Can have a single or multiple processor
cores
Is a single processor core Typically has a single processor core

Has larger memory blocks, a variety of

IOs, and other peripherals

Integrated with more powerful blocks, Has memory blocks, basic IOs, and other
Used for general purposes
e.g., GPU, DSP basic peripherals

Capable of running OSs

It needs to be supported with memories Mainly used for basic control purposes,
Mainly used for advanced applications and IOs such as embedded applications
(e.g., smartphones, tablets).

15 © 2021 Arm
SoC Design Flow
SoC
Design Specifics IP Vendors:
Hardware Software
IP Cores Purchase SW Drivers Core Design
Purchase HW
Cores Drivers

Architecture Design
Integrated Integrated
HW/SW Partitioning
Hardware Software

Fabless Vendors: SoC

Functional Prototype on Platforms Software Design
Simulation e.g., FPGA Simulation

Physical Optimization HW/SW Application Development

and Fabrication Co-verification and Test

Foundries:
Volume Manufacture Chip Fabrication
and Ship

Device Vendors:
PCB Manufacture
and Device Assembly Final Products

16 © 2021 Arm
SoC Design Flow
SoC
Design Specifics IP Vendors:
Hardware Software
IP Cores Purchase SW Drivers Core Design
Purchase HW
Cores Drivers

Architecture Design
Integrated Integrated
HW/SW Partitioning
Hardware Software
Fabless Vendors: SoC
Design
Functional Prototype on Platforms Software
Simulation e.g., FPGA Simulation

Physical Optimization HW/SW Application Development

and Fabrication Co-verification and Test

Foundries:
Volume Manufacture Chip Fabrication
and Ship

Device Vendors:
Final Products
PCB Manufacture
and Device Assembly

17 © 2021 Arm
SoC Design Flow
SoC
Design Specifics IP Vendors:
Hardware Software
IP Cores Purchase SW Drivers Core Design
Purchase HW
Cores Drivers

Architecture Design
Integrated Integrated
HW/SW Partitioning
Hardware Software

Functional Prototype on Platforms Software

Simulation e.g., FPGA Simulation

Physical Optimization HW/SW Application Development

and Fabrication Co-verification and Test

Foundries:
Volume Manufacture Chip Fabrication
and Ship

PCB Manufacture
and Device Assembly

18 © 2021 Arm
SoC Design Flow
SoC
Design Specifics IP Vendors:
Hardware Software
IP Cores Purchase SW Drivers Core Design
Purchase HW
Cores Drivers

Architecture Design
Integrated Integrated
HW/SW Partitioning
Hardware Software

Functional Prototype on Platforms Software

Simulation e.g., FPGA Simulation

Physical Optimization HW/SW Application Development

and Fabrication Co-verification and Test

Foundries:
Volume Manufacture Chip Fabrication
and Ship

PCB Manufacture
and Device Assembly

19 © 2021 Arm
SoC Design Flow
SoC
Design Specifics IP Vendors:
Hardware Software
IP Cores Purchase SW Drivers Core Design
Purchase HW
Cores Drivers

Architecture Design
Integrated Integrated
HW/SW Partitioning
Hardware Software

Functional Prototype on Platforms Software

Simulation e.g., FPGA Simulation

Physical Optimization HW/SW Application Development

and Fabrication Co-verification and Test

Foundries:
Volume Manufacture Chip Fabrication
and Ship

PCB Manufacture
and Device Assembly

20 © 2021 Arm
SoC Design Flow
SoC
Design Specifics IP Vendors:
Hardware Software
IP Cores Purchase SW Drivers Core Design
Purchase HW
Cores Drivers

Architecture Design
Integrated Integrated
HW/SW Partitioning
Hardware Software

Functional Prototype on Platforms Software

Simulation e.g., FPGA Simulation

Physical Optimization HW/SW Application Development

and Fabrication Co-verification and Test

Foundries:
Volume Manufacture Chip Fabrication
and Ship

PCB Manufacture
and Device Assembly

21 © 2021 Arm
SoC Design Flow
SoC
Design Specifics IP Vendors:
Hardware Software
IP Cores Purchase SW Drivers Core Design
Purchase HW
Cores Drivers

Architecture Design
Integrated Integrated
HW/SW Partitioning
Hardware Software

Functional Prototype on Platforms Software

Simulation e.g., FPGA Simulation

Physical Optimization HW/SW Application Development

and Fabrication Co-verification and Test

Foundries:
Volume Manufacture Chip Fabrication
and Ship

PCB Manufacture
and Device Assembly

22 © 2021 Arm
SoC Example: NVIDIA Tegra 2
Designer NVIDIA
Year 2010
Processor Arm Cortex-A9
(dual-core)
Frequency Up to 1.2 GHz
Memory 1 GB 667 MHz LP-DDR2
Graphics ULP GeForce
Process 40 nm
Package 12 × 12 mm (package on package)

Used in tablets Acer Iconia Tab A500

Asus Eee Pad Transformer
Motorola Xoom
Motorola Xoom Family Edition
Samsung Galaxy Tab 10.1
Toshiba Thrive

23 © 2021 Arm
SoC Example: Apple SoC Families
SoC Model No. CPU CPU ISA Technology Die size Date Devices
N/A APL0098 Arm11 Armv6 90 nm N/A 6/2007 iPhone
iPod Touch (1st gen.)
A4 APL0398 Arm Cortex-A8 Armv7 45 nm 53.29 mm2 3/2010 iPad, iPhone 4,
Apple TV (2nd gen.)
A5 APL0498 Arm Cortex-A9 Armv7 45 nm 122.6 mm2 3/2011 iPad 2, iPhone 4S

APL2498 Arm Cortex-A9 Armv7 32 nm 71.1 mm2 3/2012 Apple TV (3rd gen.)

APL7498 Arm Cortex-A9 Armv7 32 nm 37.8 mm2 3/2013 Apple TV 3

A5X APL5498 Arm Cortex-A9 Armv7 45 nm 162.94 mm2 3/2012 iPad (3rd gen.)
A6 APL0598 Swift Armv7s 32 nm 96.71 mm2 9/2012 iPhone 5
A6X APL5598 Swift Armv7s 32 nm 123 mm2 10/2012 iPad (4th gen.)
A7 APL0698 Cyclone Armv8-A 28 nm 102 mm2 9/2013 iPhone 5S, iPad mini (2nd gen.)
(64-
bit)
APL5698 Cyclone Armv8-A 28 nm 102 mm2 10/2013 iPad Air

24 © 2021 Arm
Course Summary

• In the following modules, you will be:

• Learning about Arm Cortex-M0 processor
architecture and AMBA3 AHB bus protocol
• Implementing a basic Arm-based SoC using
Cortex-M0 and AHB bus and prototype them onto
an FPGA chip
• Developing your own hardware peripherals
• Developing software drivers for your physical IPs
• Demonstrating your SoC through a game
application (the SNAKE game as shown in the
picture on the right)

25 © 2021 Arm
 Thank You
Danke
Gracias
谢谢
ありがとう
Asante
Merci
감사합니다
धन्यवाद
Kiitos
‫شكًر ا‬
ধন্যবাদ
© 2021 Arm ‫תודה‬
 The Arm trademarks featured in this presentation are registered
trademarks or trademarks of Arm Limited (or its subsidiaries) in
the US and/or elsewhere. All rights reserved. All other marks
featured may be trademarks of their respective owners.

www.arm.com/company/policies/trademarks

© 2021 Arm