Lecture #1

Introduction
Microprocessors

1
 Course
Week 1,2:
Syllabus
- Introduction to microcontroller
- Evolution of the microprocessor
- Introducing the architecture of the microprocessor

Week 3:
- Data Addressing modes

Week 4:
- why assembly language
- Structur of Assembly language program:
i) Defining memory variables using the DB, DW and the DD directives.
ii) Defining arrays using the DUP directive, and strings.
iii) Defining constants using EQU directive.
iv) Sample program to demonstrate the simplified directives method of
writing assembly programs.
 Course
Week 5:
Syllabus (Continued)
- Assembly Language Instructions (continued)
- Input L output instruction set
Week 6:
- Assembly Language Instructions (continued)
-Data transfer Instructions
Week 7:
- Assembly Language Instructions (continued)
- Arithmetic Instructions
Week 8:
-Assembly Language Instructions (continued)
- Program Control and Processor Control Instructions
 Course Syllabus (Continued)
Week 9:
- Assembly Language Instructions (continued)
- Bitwise and Logical Manipulations :

Week 10:
- Assembly Language Instructions (continued)
- String Instructions
Week 11:
- Assembly Language Instructions (continued)
- Program Modules and procedures
Week 12:
- - Assembly Language Instructions (continued)
- - Arrays
Week 13:
- Assembly Language Instructions (continued)
- Arrays and Files
Week 14:
-8086/8088 hardware specifications
-Pin-outs and pin functions.
-Clock generator(8284A).
-Bus buffering and latching
- Bus timing
-Ready and wait state
-Minimum mode versus maximum mode
Marking Scheme & Textbook

Marking scheme
 First Control Test : 15%
 Second Control Test : 15%
 Assignments , and Term project: 10%
 Final exam : 60%
Textbook
 - Barry B.Brey ,”The intel microprocessors 8086/8088, 80186/80188, 80286, 80386, 80486,
Pentium,Pentium pro processor,Pentium II,Pentium III, Pentium 4”,2003.
 2- Hanel H. Jhon.,”Hand Book of Pentium Microprocessors”, 1997.
 3-Peter Abel,”IBM PC Assembly language and programming”,2001.
 What is Computer ?

Computer Data Processing

Data Storage
Major Components of a Computer

MEMORY
I/O SYSTEM
BUS
Computer

CPU
What is Microprocessor ?

CPU
 Past Microprocessors ...
1971 - Intel 4004, 1st single chip CPU, 4-bit processor
1972 - Intel 4040, enhanced 4004, 60 instructions
1972 - Intel 8008, 8-bit P
1972 - Texas Instrument TMS 1000, 1st single C, 4-bit
1974 - Intel 8080, successor to the 8008, used in Altair 8800
1975 - Motorola 6800, used MOS technology
1976 - Intel 8085, updated 8080, +5V power supply
1976 - Zilog Z80, improved 8080
1976 - TI TMS 9900, 1st 16-bit P
1978 - Zilog Z8000, Motorola 68000, 16-bit P
1978 - Intel 8086, 16-bit, IBM’s choice...
microprocessor
a- The 4-bit microprocessor
- In 1971, Intel corporation released the first microprocessor the 4004, a
4-bit microprocessor
- It only addressed 4096X 4-bit memory locations
- Instruction set are 45 different instructions
- Used only in limited applications such as video games and small
microprocessor-based controllers.
b- The 8-bit microprocessor
- Later in 1971, Intel corporation released the first 8-bit microprocessor -
the 8008
- In 1973 Intel Corporation released the 8080 microprocessor which is
also 8-bit microprocessor. It addresses more memory and executes more
instructions and also executes instructions ten times faster than the 8008
microprocessor. I.e. an addition that took 20 micro sec. on an 8008-based
system took only 2.0 micro sec. on an 8080-based system.
- In 1977, a newer version of 8085, 8080 was introduced by Intel
corporation. The main difference is the adds take 1.3 micro sec. instead of
2.0 micro sec. It executes instruction at the rate of 0.5 MIPS.
microprocessor (continued)

c- The 16-bit microprocessor

- In 1978, Intel corporation released the 8086 microprocessor and
about one year later the 8088 and also 80186 which is an improved
version of 8086 microprocessor.
- The 8086 & 8088 are capable of addressing a 1Mbyte memory,
execute instruction in as little as 400ns, and have a large number of
Internal registers. The 8086 & 8088 executed up to 2.5 MIPS.
- The 80286 address a 16 Mbytes memory. It executes up to 8 MIPS.

d- The 32-bit microprocessor

Examples
80386, 80486, and Pentium.
- The clock frequency of 80386 is 33 Mhz but 66 Mhz for 80486.
- The 80386 execute many instructions in 2 clocks while 80486
execute many instructions in 1 clock. The 80486 execute instructions at
rate of 54 MIPS.
- The Pentium speeds of 100 MIPS and more.
What is Microcontroller ?

MEMORY
I/O SYSTEM
BUS

CPU
 Past Microcontrollers ...
1972 - Texas Instrument TMS 1000, 1st single C, 4-bit
1976 - Intel 8048, 8-bit C, 1k ROM, 64b RAM, 27 I/O
1980 - Intel 8051, 4k ROM, 128b RAM, 32 I/O, 2 16-bits timers
1980s
(MCS-51 family)
- Intel 8031, 8052, 8751, …
- Atmel AT89C51, AT 89C1052/2051,…
- Dallas Semiconductor DS5000 series…
- Philips, National Semiconductor, ...
(Other Cs)
Microchip PIC16 series, Motorola 68HC11, Zilog’s Z86
 General Structure of a C
I/O
Interrupt
Control Serial Parallel
Interface Interface

CPU Internal address, data, & control buses

Timers/ RAM ROM

Counters
Memory
 Major 8-bit Micro-controllers

 Intel 8051
 Motorola 68HC11
 Zilog Z86
 Microchip PIC16XX
Microprocessor System Vs Microcontroller System

Data Bus
CPU CPU RAM ROM

General Serial
purpose RAM ROM I/O Timer COM
Micro Port Serial
Port I/O
processor Timer
Port COM
Port
Address Bus

General-Purpose Microprocessor System Microcontroller

Microprocessor System Vs Microcontroller System
P C
Single-chip CPU Single-chip IC
Hardware RAM-ROM ratio high ROM-RAM ration high
Architecture Interrupt, I/O, Timer – Interrupt, I/O, timer-Internal
external. Need to respond to Real time
Not much on Real-time

Application Microcomputer system Control – oriented activities

Processing information Control of I/O devices
Process intensive to handle Control intensive to handle
Instruction Large volume of data I/O using single Bit
set Operates on byte, words, Operates mostly on Bit & byte
pointers, and arrays.
Longer development time shorter development time
ANDing, ORing, XORing in ANDing, ORing, XORing in
bit level is less easy bit level is easy
 What is CPU ?
The Central Processing Unit (or P)

Control Unit &

Instruction Decoder

Arithmetic/Logic Unit

Registers
 To synchronize and control the
overall operation of the P system

Control Unit &

Instruction Decoder

Arithmetic/Logic Unit

To decode instruction and

Registers
pass the necessary control signals to CU
To perform the arithmetic and
logical operations within the CPU

Control Unit &

Instruction Decoder

Arithmetic/Logic Unit

Registers
To perform shift and rotate
operations that may either be
arithmetic or logical in nature
 • Control and Status Registers
• User-Variable Registers

Control Unit &

A set ofInstruction
internal storage
Decoder
locations within the CPU
Arithmetic/Logic Unit

Registers
 Registers
Control & Status User-Visible
Registers Registers

Program Counter General-Purpose Reg.

Instruction Register Address Register
... Data Register
... Flag Register
To hold the memory address of the
next instruction to be executed
Control & Status User-Visible
Registers Registers

Program Counter General-Purpose Reg.

Instruction Register Address Register
... Data Register
... Default value at power on/reset:
PC = 0000H or FFFFH (or other address
predetermined by the manufacturer)
 To hold the instruction
Control & Status fetched from external memory
User-Visible
Registers Registers

Program Counter General-Purpose Reg.

Instruction Register Address Register
... Data Register
... Flag Register
 Can be assigned to a variety
of functions
Control by programmer
& Status User-Visible
Registers Registers

Program Counter General-Purpose Reg.

Instruction Register Address Register
... Data Register
... Flag Register
 To hold the address of next
Control
memory&location
Status to be addressed User-Visible
Registers Registers

Program Counter General-Purpose Reg.

Instruction Register Address Register
... Data Register
... Flag Register
 To hold the data User-Visible
fetched from memory Registers

Program Counter General-Purpose Reg.

Instruction Register Address Register
... Data Register
... Flag Register
 Condition-code register that contains
a number of flag bits.
Control & Status
Registers
Each flag bit is either set (“1”) or reset (“0”)
by the result of an arithmetic or logical
General-Purpose Reg.
instruction that has just been executed
Instruction Register Address Register
... Data Register
... Flag Register
Intel 8086 Organization
Registers - storage locations found inside
the processor for temporary storage of
data
AH AL
1- Data Registers (16-bit)
 AX, BX, CX, DX
2- Address Registers (16-bit)
 Segment registers: CS, SS, DS, ES
 Pointer registers: SP, BP, IP
 Index registers: SI, DI
3- Status (Flags) register (16-bit)
 1- Data Registers
The general-purpose registers are used in any
manner that the programmer wishes. Each
general-purpose register is addressable as
32-bit registers (EAX, EBX, ECX, and EDX), as
16-bit registers (AX, BX CX, and DX), or as 8-
bit registers (AH, AL, BFL BL, CH, CL, DH,
and DL).
 AH AL
Data Registers cont.
The data registers Each byte of the 4
may be used for data registers can
general purposes, be accessed
however each has independently
special uses  AH, AL, BH, etc.
 AX : Accumulator  These are referred to
 BX : Base as 8-bit registers, but
 CX : Count remember they are
part of an existing
 DX : Data
register
Data Registers
Accumulator Cont.
(AX): often holds the temporary result after
an arithmetic -and logic operation. Also addressed as EAX,
AH, or AL.
BX (Base)- often holds the base (offset) address of data
located in the memory and also the base address of a table
of data referenced by the translate instruction. Also
addressed as EBX, BH, or BL.
CX (Count): contains the count for certain instructions
such as shift count (CL) for shifts and rotates the number of
bytes (CX) operated upon by the repeated string operations,
and a counter (CX or ECX) with the LOOP instruction. Also
addressed as ECX, CH, or CL.
DX (Data): is a general-purpose register that also holds the
most significant part of the product after a 16- or 32-bit
multiplication, the most significant part of the divided before
a division, and the 1/0 port number for a variable 1/0
instruction. Also addressed as EDX., DH, or DL.
 2- Address Registers
Segment Registers
Additional registers, called segment registers, generate
memory addresses along with other registers in the
microprocessor.
Pointer and Index Registers
Although the pointer and index registers are also
general purpose in nature, they are more often used
to index or point to the memory location holding the
operand data for many instructions. These registers
are 16-bit on the 8086, 8088, 80186, and 80286,
and 32-bit on the 80386 and 80486 microprocessor.
 Segment Registers
CS (code): the code segment is a section of memory that
hold, programs and procedures used by programs. The code
segment is limited to 64K bytes in length in the 8088-80286
and 4G bytes in the 80386/80486. The code segment
register defines the starting address of the section of
memory_ holding code.
DS (data): the data segment is a section of memory that
contains most data used by a program. Data are accessed in
the data segment by an address or the contents of other
registers that hold the offset address.
ES (extra): the extra segment is an additional data
segment that is used by some of the string instructions.
SS (stack): the stack segment defines the area of memory
used for the stack. The stack pointer register determines the
location of the current entry in the stack segment. The BP
register also addresses data within the stack segment.
Segment Registers cont.
20-bit addresses are obtained by combining
two 16-bit registers, segment:offset
 Address = segment*16+offset
Example CS: 010C IP: 14D2
 Address = 010C*10+14D2 = 010C0+14D2
Address = 02592
Each segment is 64K, segments can start at
any paragraph boundary
 Pointer and Index Registers
SP (Stack Pointer): used to address data in LIFO (last-in, first-
out) stack memory. This occurs most often when the PUSH and
POP instructions are executed or when a subroutine is CALLed
or RETurned from in a program. This register is also the 32-bit
ESP register.
BP (Base Pointer): is a general-purpose pointer often used to
address and array of data in the stack memory. This register is
also the 32-bit EBP register.
SI (Source Index): used to address source data indirectly for
use with the string instructions. This register is also the 32-bit
ESI register.
DI (Destination Index): normally used destination data indirectly
for use with the string instructions. This register Is also the 32-
bit EDI register.
Instruction and Stack Pointers
IP contains the address of the next
instruction to be executed
 IP specifies an offset into the CS segment
 IP is not the operand of any instruction
SP points to the top item on the stack
 SP is an offset into the SS segment
 SP can be used as an operand in some
instructions
 BP and Index Registers
BP is a Base Pointer SI and DI are called
 Specifies an offset Index registers
into any segment,  They normally specify
but most commonly an offset into the
the Stack segment Data segment,
although they can be
used as offsets into
any segment
 Sometimes they hold
a number to be
added to the address
of an array (index)
3- Status Or Flag registers
Individual bits are used to store the
status of the microprocessor
 Bits are set or cleared as the result of many
operations
 Bits may be affected indirectly (by the
execution of an instruction) or directly by
an instruction designed to access the status
word
Storing data in Registers
AH AL AH AL
Byte Value 3F AX 3F Or AX 3F

BH BL
Word value 143E BX 14 3E

DH DL AH AL

Double word 78 9A 34 5B
789A345B DX AX
Or

78 9A 34 5B
EAX
Data Transfer from register to
memory
AH AL
16FFF 12 34
17000 34

17001 12

17002
Data Transfer from memory to
register
AH AL
16FFF 12 34
17000 34

17001 12

17002
 Memory
Memory Address-1  Memory Location-1
Memory Address-2  Memory Location-2

1 2 3 4 5 6 7 8
1 word = 8-bit data
(for 8051)

Memory Address-n  Memory Location-n

 Bus System (I)
Address Bus
These are the wires that carry the CPU generated address
signals out to memory and to I/O devices.
The address signals only travel outwards from the CPU
(unidirectional).
The number of address lines that a microprocessor has
determines the size of the memory space that it can
access.
 Memory Size
No of Add. lines Size of memory space

8 28 = 256
16 216 = 65 536 = 64 K
20 220 = 1 048 576 = 1 M
24 224 = 16 777 216 = 16 M
32 232 = 4 294 967 296 = 4 G
 Bus System (II)
Data Bus
These are the data signals that travel out of and
into the P (bi-directional).
The number of wires in the data bus depends on
the word size that the P operates with.
An 8-bit P will have a data bus consisting of 8
wires and a 32-bit P will have a data bus with 32
wires.
 Bus System (III)
Control Bus
The control bus consists of wires, some of which
carry signals from the CPU to external devices,
while others carry signals from external devices to
the CPU.
The number of wires present in the control bus
varies from one P to another.
Examples of control bus signals are READ/,
WAIT, READY, and HOLD.
von Neumann Architecture

ALU I/O
Main
Memory
CU
 Basic Instruction Cycle
PC = 0000H Start

Fetch Fetch Cycle

Instruction
PC = PC + n
Execute
Execute Cycle
Instruction

End
Memory Read Operation - Step 1
The CPU sends out the control signals Memory
Request and Read to indicate that it wants to
read from memory
CPU Read Memory
Memory request

Data bus

Address bus

CPU places address (XXXX) of the

memory location on the address bus
 Memory Read Operation - Step 2
Accessed location at XXXX

CPU Read Memory

Memory request

Data bus

Address bus

Memory places data from the

accessed location onto the data bus
Memory Read Operation - Step 3
The CPU removes the Memory Request
and Read signals

CPU Read Memory

Memory request
Register
Data bus

Address bus

CPU latches the data into a register

Memory Write Operation - Step 1
The CPU sends out a Memory Request control
signal to indicate that it wants to perform a
memory operation
CPU Memory
Memory request

Data bus

Address bus

CPU places address (YYYY) of the

memory location on the address bus
Memory Write Operation - Step 2
The CPU sends out a Write control signal to
indicate that valid data is available on the data
bus
CPU Write Memory
Memory request
Register
Data bus

Address bus

CPU places the data from a register

onto the data bus
Memory Write Operation - Step 3
The CPU removes the Write signal to complete
the memory write operation

CPU Write Memory

Memory request
Register Accessed location
Data bus at YYYY

Address bus

Memory copies the data bus into the

accessed location
Comparison between Intel
microprocessors

Part No. Data Bus Memory

Size
8085 8 64 Kbytes

8086 16 1 Mbytes

8088 8 1 Mbytes

80186 16 1 Mbytes

80286 16 16 Mbytes

80386DX 32 4 Gbytes

80386SX 16 32 Mbytes

80486 32 4 Gbytes

4 Gbytes 32/64 4 Gbytes

Comparison between 80286
and 80386

80286 80386

24-bit address bus gives 16 32-bit address bus gives 4 Gbytes

Mbytes

Virtual addressing is up to 1 Gbyte Virtual addressing is up to 64

trillon bytes

General Purpose registers are 16- General Purpose registers can be

bits wide extended to 32-bits wide

Has no 32-bit wide registers Has three 32-bit wide registers

Comparison between 80386
and 80486

80386 80486

There is no cache memory 8 Kbytes cache memory is added

to store dat & instructions for high
speed

The 80386 execute many The 80486 execute many

instructions in 2 clocks instructions in 1 clock

An external 80387 coprocessor is 80387 coprocessor is built right

connected by or to 80386 for into 80486 for mathematical
mathematical operations operations
 Assembly Language Program
An assembly language program is a program written
using labels and mnemonics, in which each statement
corresponds to a machine instruction.
; A test program

ORG 0000H
MOV A, #01H
LOOP: RL A
MOV P1, A ; output to port 1
JMP LOOP
END
 Assembling A Source Program
An assembler is a program that translate an assembly
language program into a machine language program.

program.obj

program.src asm51

program.lst
 Linking Object Files
A linker/locator is a program that combines relocatable
object programs (modules) and produces an absolute
object program that is executable by a computer.

program

File3.obj
File2.obj RL51
File1.obj
program.m51
 BIN to HEX conversion

program.bin OH program.hex

Download to 8051
Memory
00000 Interrupt Vectors
00400 BIOS and DOS Data
8086 - 1 megabyte of
DOS
memory (220 bytes)
Each byte is accessed Application
Program Area
by specifying an
A0000
address (00000h
Video
through FFFFFh) B0000

C0000
20-bit addresses must
be formed from 16- D0000 Reserved
bits of information E0000

F0000 BIOS