Chapter 3
Chapter 3
ADDRESSING MODES
OF 8086
Haramaya University
COMPILED BY: Wogayehu A.
@2024/24
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Addressing Modes in 8086
• The different ways that a processor can access data are referred to
as addressing modes.
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Data Addressing Modes
• It is important for instructions to use registers that are the same size.
• Never mix an 8-bit register with a 16-bit register, or a l6-bit register
with a 32-bit register because this is not allowed by the
microprocessor and results in an error when assembled.
• A comma always separates the destination from the source in an
instruction. Mov destination, source
• SHL DX, CL:- are exceptions to this rule.
• None of the MOV instructions affect the flag bits.
• Immediate value cannot be moved into a segment register directly
• A segment-to-segment register MOV instruction is about the only
type of register MOV instruction not allowed.
• Note that the code segment register is not normally changed by a
MOV instruction because the address of the next instruction is found
by both IP/EIP and CS. If only CS were changed, the address of the
next instruction would be unpredictable. Therefore, changing the CS
register with a MOV instruction is not allowed.
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Data Addressing Modes
• Anything given in square brackets will be an Offset Address also
called Effective Address.
• MOV instruction by default operates on the Data Segment; unless
specified otherwise.
• BX and BP are called Base Registers.
• BX holds Offset Address for Data Segment.
• BP holds Offset Address for Stack Segment.
• SI and DI are called Index Registers
• The Segment to be operated is decided by the Base Register and NOT
by the Index Register.
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Data Addressing Modes
• MOV AX, BX instruction transfers the word contents of the source
register (BX) into the destination register (AX). The source never
changes, but the destination always changes.
• It is crucial to remember that a MOV instruction always copies the
source data into the destination.
• The source is to the right and the destination is to the left, next to the
opcode MOV.
• We naturally assume that things move from left to right, whereas
here they move from right to left.
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Registers and Segments revisions……………………..
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Various Data Addressing Modes
Group I : Addressing modes for
1. Immediate Addressing
accessing register and immediate data
2. Register Addressing
3. Direct Addressing
9. String Addressing
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2.REGISTER ADDRESSING MODE
• The instruction will specify the name of the
register which holds the data to be operated by
the instruction.
• the data is stored in a register and it is referred using
the particular register.
• both the operands are registers.
• Source & Destination Operands: Registers
• Example 1: 8 bit register as source of operand.
MOV CL, DH
• The content of 8-bit register DH is moved to
another 8-bit register CL: (CL) (DH)
• Example 2: 16 bit register as source of operand
MOV AX, BX
This addressing mode is preferred because the
instructions are compact and fastest executing of
all instruction forms. 10
2.Purpose of REGISTER ADDRESSING MODE
• The register addressing mode is useful when the
operand is located in a register, and it is faster
than accessing the operand from memory or IO.
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2.REGISTER ADDRESSING MODE
• In the 80386 and above, the extended 32-bit register names
are: EAX, EBX, ECX, EDX, ESP, EBP, EDI,ESI.
• In the 64-bit mode of the Pentium 4, the register names are:
RAX, RBX, RCX, RDX, RSP, RBP, RDI, RSI, and R8 through
R15.
• The R8 to R15 registers are 64-bit registers, and they can be
accessed as R8D, R8W, and R8B (the lower 32-bit double-
word, 16-bit word, and 8-bit byte, respectively).
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Memory Access
• To access memory we use the four registers: BX, SI, DI and BP.
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4. REGISTER INDIRECT ADDRESSING MODE
• In Register indirect addressing, name of the register which holds
the Effective Address (EA) will be specified in the instruction.
• the effective address is in SI, DI or BX.
• BX is the "base'' register; it is the only general-purpose register
which may be used for indirect addressing.
• Registers used to hold Effective Address of an operand are any of
the following registers: BX, SI, DI.
• The segment is Data segment by default.
EA = (BX)
BA = (DS) x 10 H where:
MA = BA + EA DS = Data Segment
(AX) (MA) or, EA = Effective Address
BA = Base Address
(AL) (MA) MA = (Physical) Memory Address
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(AH) (MA +1)
4. Purpose of Register Indirect Addressing Mode
• Register indirect addressing mode is an addressing mode in the 8086
microprocessor that allows the programmer to specify the memory
location indirectly by using a register that contains the address of the
operand.
• The register indirect addressing mode is used when the memory
location of the operand is not known in advance, and it is stored in a
register.
• It is also used when the memory location of the operand is calculated
by an expression that involves a register.
• The register indirect addressing mode is simple and flexible, and it
allows the programmer to access data in memory using a variety of
registers.
• The register indirect addressing mode is used in many instructions,
such as MOV, ADD, SUB, and CMP.
• In summary, the purpose of register indirect addressing mode is to
access data in memory indirectly by using a register that contains the
address of the operand 20
4. Purpose of Register Indirect Addressing Mode…
---Variable address in a register
– instruction specifies the register holding the address
– Address dynamic: depends on contents of register when instruction is
executed.
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4. Purpose of Register Indirect Addressing Mode…
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5.Indexed Addressing Mode
• SI or DI register is used to hold an index value for
memory data and a signed 8-bit or unsigned 16-bit
displacement will be specified in the instruction.
• The effective address is sum of index register and
displacement.
• Displacement is added to the index value in SI or DI
register to obtain the Effective Address (EA).
EA = (SI) + FFA2H
BA = (DS) x 10 H
MA = BA + EA
(CX) (MA) or,
(CL) (MA)
(CH) (MA + 1) 23
5.Purpose Indexed Addressing Mode
• The index addressing mode is fast and is excellent for
manipulating data structures such as arrays, as all that is needed
is to set up a base address and use the index in the code to access
individual elements.
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6. Based Addressing Mode
• In Based Addressing, BX or BP is used to hold the base
value for effective address and a signed 8-bit or unsigned
16-bit displacement will be specified in the instruction.
• In case of 8-bit displacement, it is sign extended to 16-bit
before adding to the base value.
• The effective address is the sum of base register and
displacement.
• When BX holds the base value of Effective Address ( EA ),
20-bit physical address is calculated from BX and DS.
Operations:
• Example: 0008H 08H (Sign extended)
EA = (BX) + 0008H
BA = (DS) x 10 H
MA = BA + EA
EA = (BX) + (SI)
BA = (DS) x 10 H
MA = BA + EA
(DL) (MA)
(DH) (MA + 1)
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7.Features of Based & INDEX Addressing Mode
• Based indexed addressing mode is actually a combination
of based relative addressing mode and indexed relative
addressing mode
• It uses one base register (either BP or BX) and one index
register (either SI or DI)
• The offset address of the operand is given by the sum of
the base register, index register, and displacement
• Based indexed addressing mode allows data to be
addressed at any memory location through an offset
address held in the base register and index register
• Based indexed addressing mode is used to access data in a
specific segment of memory
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8.BASED & INDEX with Displacement ADDRESSING MODES
• In Based Index with displacement Addressing, the
effective address is computed from the sum of a base
register (BX or BP), an index register (SI or DI) and a
displacement. MOV DX, [BX + SI + 0AH]
• Example 1:
Operations:
000AH 0AH (Sign extended)
EA = (BX) + (SI) + 000AH
BA = (DS) x 10 H
MA = BA + EA
(DX) (MA) or,
(DL) (MA)
(DH) (MA + 1)
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8. Functions of based indexed displacement mode
• Based indexed displacement mode allows data to be
addressed at any memory location through an offset
address held in the base register and index register
• It is used to access data in a specific segment of memory
• Based indexed displacement mode uses one base register
(either BP or BX), one index register (either SI or DI), and a
displacement value to calculate the physical address of the
operand
• The offset address of the operand is given by the sum of
the base register, index register, and displacement
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9. String Addressing Mode
• Employed in string operations to operate on string data.
(MAE) (MAD)
Note : Effective address of
the Extra segment
If DF = 1, then (SI) (SI) – 1 and (DI) (DI) – 1
If DF = 0, then (SI) (SI) +1 and (DI) (DI) + 1
only a byte of data will be copied from the source to the destination.
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9. String Addressing Mode….
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9. String Addressing Mode….
The core compulsory rules for string instructions
1. The source block has to be present in the data segment
2. The destination block/string data has to be present in the
extra segment
3. The offset address of the source string has to be given by
source index
4. The offset address of the destination has to be given by
destination index
5. The count has to be given by CX register only
6. The direction has to be decided by flag register weather
automatically incremented or decremented.
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STRING MANIPULATION INSTRUCTIONS
String : Sequence of bytes or words
is a series of the same type of data items in sequential memory locations
8086 instruction set includes instruction for string movement, comparison, scan,
load and store are the 5 types of string instructions.
Offset or effective address of the source operand is stored in SI register and that of
the destination operand is stored in DI register.
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10. Direct I/O Port Addressing
• These addressing modes are used to access data from standard I/O
mapped devices or ports.
• IN AX, [80H] ; AX gets 16-bit data from I/O port address 80H
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Indirect I/O Port Addressing
• In indirect I/O port addressing mode, the
register containing the port address is given in
the instruction
• The 16-bit port address is stored in the register
specified in the instruction
• Indirect I/O port addressing mode allows access
to I/O ports whose addresses are stored in
registers
• Indirect I/O port addressing mode is useful
when the I/O port address is not known at the
time the program is written
• Indirect I/O port addressing mode is a type of
register indirect addressing mode
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12. Implied Addressing Mode
• Implied addressing refers to instructions that comprise
only an opcode without an operand.
• In implied addressing mode, the operands are specified
implicitly in the definition of the instruction.
• Example 1: STC
• Example 2: CLC
• Example 3: CLD,
This clears the Direction flag to zero.
Example 4: STD
.Sets the Direction Flag to one. 40
Exercise
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2. Program Memory Addressing Modes
o Program memory addressing mode is required for instructions that cause a
branch in the program.
o According to the flow of instruction execution, the instructions
may be categorized as
1. Sequential Control Flow Instructions
2. Control Transfer (BRANCH) Instructions
o Sequential control flow instructions are the instructions which
after execution, transfer control to the next instruction appearing
immediately after it (in the sequence) in the program.
For example the arithmetic, logic, data transfer and processor control
instructions are Sequential control flow instructions.
o The control transfer instructions on the other hand transfer
control to some predefined address or the address somehow
specified in the instruction, after their execution.
For example INT, CALL, RET, REP& JMP instructions fall under this category.
In a CALL we call a function or subroutine or procedure, execute it and you
come back or return to its exact next instruction not in the same instn.
In a JMP you go to a new location and you continue no return or no coming
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back just continue..
Differences b/n JMP and CALL?
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Addressing Modes in 8086…..
Program Memory addressing mode is required for
instructions that cause a branch in the program.
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Addressing Modes in 8086…..
• For the control transfer instructions, the addressing modes depend
upon whether the destination location is within the same segment or
in a different one.
• It also depends upon the method of passing the destination address
to the processor.
• Basically, there are two addressing modes for the control transfer
instructions. Inter segment and intra segment addressing modes.
• Inter-Segment addressing modes. : Address to which the control to be transferred is in
a different segment
• Intra-Segment addressing modes. : Address to which the control to be transferred lies
in the same segment.
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Addressing Modes in 8086…
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Program Memory Addressing Modes 8086
Intra-Segment Direct Addressing Mode
o Address where to transfer program control is
specified directly in the instruction as an 8-bt (16-bit)
displacement.
o The effective address is thus calculated by adding this
displacement to the current value of IP.
o As it’s intra-segment, only IP changes, CS doesn’t
change.
o If the displacement is 8-bit it’s called as a short
branch.
o This addressing mode is also called as Relative
Addressing Mode.
o Direct -Destination address specified as a part of the
instruction 47
Intra-Segment Direct Addressing Mode
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Intra-Segment Indirect Addressing Mode
o Address where to transfer program control is
specified indirectly in the instruction through a
register or a memory location.
o The value in the IP is replaced with the new value.
o As it is intra-segment, only IP changes, CS doesn’t
change.
o Eg: JMP WORD PTR [BX] ; IP {DS:[BX], DS:[BX + 1]}
Jump to effective address stored in BX
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• Program Memory Addressing Modes
Inter-Segment Indirect Addressing Mode
o The new branch location is specified indirectly in
the instruction through a register or a memory
location.
o Both IP and CS get new values, as this is an inter-
segment branch IP = changes
o Eg: JMP WORD PTR [BX]; ; CS =changes
o Let say BX=2000h, DS:[2000h]=1234h
o jumps would be relative to CS and not DS. So, JMP WORD PTR [BX]would read
DS:[BX] i.e. DS:2000h, get 1234h stored at DS:2000h and then jump to
CS:1234h.
o JMP [2000H]? Is it inter indirect or intra indirect?
o i.e. Jump to an address in the other segment specified at
effective address 2000H in DS.
The basic syntax of JMP instruction: JMP label
In JMP label to declare a label in your program, just type its name and add ":" to the
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end, label can be any character combination but it cannot start with a number,
Program Memory Addressing Mode
The basic syntax of JMP instruction: JMP label
• Jump Instructions are used for changing the flow of execution of
instructions in the processor.
• If we want jump to any instruction in between the code, then this can
be achieved by these instructions. There are two types of Jump
instructions:
• 1. Unconditional Jump Instructions---used to jump on a
particular location unconditionally, i.e. there is no need to satisfy any
condition for the jump to take place.
• Example: JMP [4032H], JMP ABC, like label ABC must be defined.
• 2. Conditional Jump Instructions---In these types of instructions,
the processor must check for the particular condition. If it is true,
then only the jump takes place else the normal flow in the execution
of the statements is maintained.
• The ALU operations set flags in the status word (Flag register). The
conditional jump statements tests the flag and jump is the flag is set.
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Program Memory Addressing Mode
There are following types of conditional jump instructions:
• i) JC : Stands for 'Jump if Carry'
• It checks whether the carry flag is set or not. If yes, then jump takes place,
that is: If CF = 1, then jump.
• ii) JNC : Stands for 'Jump if Not Carry'
• It checks whether the carry flag is reset or not. If yes, then jump takes place,
that is: If CF = 0, then jump.
• iii) JE / JZ : Stands for 'Jump if Equal' or 'Jump if Zero'
• It checks whether the zero flag is set or not. If yes, then jump takes place,
that is: If ZF = 1, then jump.
• iv) JNE / JNZ : Stands for 'Jump if Not Equal' or 'Jump if Not Zero'
• It checks whether the zero flag is reset or not. If yes, then jump takes place,
that is: If ZF = 0, then jump.
• v) JP / JPE : Stands for 'Jump if Parity' or 'Jump if Even Parity'
• It checks whether the Parity flag is set or not. If yes, then jump takes place,
that is: If PF = 1, then jump.
• vi) JNP / JPO : Stands for 'Jump if Not Parity' or 'Jump if Odd Parity'
• It checks whether the Parity flag is reset or not. If yes, then jump takes
place, that is: If PF = 0, then jump. 53
Program Memory Addressing Mode
Examples for comparison instructions
Look the difference between the two compare instructions using JMP
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Addressing Modes in 8086……..
3. Stack Memory Addressing Modes
The STACK is a portion of read/write memory set aside
by the user for the purpose of storing information
temporarily.
When the information is written on the stack, the
operation is called PUSH.
When the information is read from stack, the operation
is called POP.
Stack is an area of memory for keeping temporary
data.
Stack is used by CALL instruction to keep return
address for procedure, RET instruction gets this value
from the stack and returns to that offset.
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Addressing Modes in 8086……….
• Stack Memory Addressing Modes
PUSH, POP Operations…
The Microprocessor stores the information,
much like stacking plates. If it is desired to
take out the first stacked plate, we will have
to remove all plates above the first plate in
the reverse order.
This means that, the first information pushed
on to the stack is the last information popped
off from the stack.
o This type of operation is known as first in,
last out (FILO) or last in first out (LIFO)
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Addressing Modes in 8086….
• Stack Memory Addressing Modes
Function of PUSH and POP operations…
o Temporarily stores the contents of 16-bit register
or memory location or program status word, and
retrieves when required.
o When the programmer realizes the shortage of the
registers, he stores the present contents of the
registers in the stack with the help of PUSH
instruction and then uses these registers for other
functions.
o After completion of other function, programmer
loads the previous contents of the register from
the stack with the help of POP Instruction. 62
Addressing Modes in 8086……
• Stack Memory Addressing Modes
PUSH Operation…
o The PUSH instruction decrements stack pointer by
two and copies a word from some source to the
location in the stack where the stack pointer points.
( here the source must be a word = 16-bit)
o The source of the word can be a general purpose
register, a segment register, or memory.
o The next slide shows the map of the stack before
and after execution of PUSH AX and PUSH CX
Instructions.
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• Stack Memory Addressing Modes
PUSH Op….Whenever a word of data is pushed onto the stack
o The high-order 8 bits are placed in the location addressed by SP – 1.
o The low-order 8 bits are placed in the location addressed by SP – 2.
o The SP is then decremented by 2 so that the next word of data
is stored in the next available stack memory location.
Where SP is stack Pointer, and lets assume stack was empty.
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Addressing Modes in 8086……
• Stack Memory Addressing Modes
POP Operation…
o The POP instruction copies a word from the stack
location pointed to by the stack pointer (SP) to the
destination.
o The destination can be a general purpose register,
a segment register, or memory.
o After the word is copied to the specified
destination, the stack pointer is automatically
incremented by 2. SP=SP+2
o The next slide shows the map of the stack before
and after execution of POP DX and POP BX
Instructions.
o In a stack, the top element is the element that is inserted at the last or most
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recently inserted element which is Top of stack.
Addressing Modes in 8086……
• Stack Memory Addressing Modes
POP Operation…
o The byte @ SP is transferred to lower order byte position.
o Then, the byte @ SP+1 will be transferred to higher order
byte position. Then again SP will be incremented again.
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Thanks…………….
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