MODULE-4
Digital Data Communication Techniques and Data
Link Control Protocols
CHAPTER-1
DIGITAL DATA COMMUNICATION TECHNIQUES
Contents
Asynchronous and synchronous transmission
Types of errors
Error detection techniques
Error correction techniques (single bit)
Introduction
Synchronization:
For two devices linked by a transmission medium to exchange data, a
high degree of cooperation agreement between the two sides is required
known as synchronization.
Two techniques for controlling this timing are:
1.Asynchronous transmission
2.Synchronous transmission
Asynchronous transmission (character oriented)
In asynchronous transmission, each character of data is treated
independently.
Here data are transmitted one character at a time, where each character is
five to eight bits in length.
Timing only needs maintaining within each character
NRZ-L signal encoding technique is used for asynchronous transmission,
so it leads to loss of synchronization for long sequence of 0’s and 1’s.
Contd..
Advantages and Disadvantages
Advantages:
Asynchronous transmission is simple and cheap
Disadvantages:
Asynchronous transmission leads to Framing Error.
Long sequence of zeroes or one’s leads to loss of synchronization.
Asynchronous transmission requires an overhead of two to three bits
per character.
Synchronous Transmission: (Bit Oriented or Byte
oriented)
Block of data transmitted without start or stop bits
The block may be a bit or many bits in length .
With synchronous transmission, it allows the receiver to determine the
beginning and end of a block of data.
To achieve this, each block begins with a preamble bit pattern(8-bit flag) and
generally ends with a postamble bit pattern(flag).
The data including preamble, postamble, and control information are called a
frame.
Contd..
The frame starts with a preamble called a flag, which is 8 bits long. The same
flag is used as a postamble.
The receiver looks for the occurrence of the flag pattern to signal the start of a
frame.
This is followed by some number of control fields
Synchronous Frame Format
Advantages
For sizable blocks of data, synchronous transmission is far more efficient than
asynchronous.
Avoids loss of synchronization by using Manchester and differential
Manchester encoding mechanisms.
Example
Types Of Errors
An error occurs when a bit is altered between transmission and reception.
Two general types of errors can occur
1. Single-bit errors and
2. Burst errors
A single-bit error
It is an isolated error condition that alters one bit but does not affect nearby bits.
The term single-bit error means that only 1 bit of a given data unit (such as a
byte, character, or packet) is changed from 1 to 0 or from 0 to 1.
Eg: data before transmission-00001010 ,data in reception-00000010 only one bit
is changed.
A burst error
A burst error means that 2 or more bits in the data unit have changed.
The term burst error means that 2 or more bits in the data unit have changed
from 1 to 0 or from 0 to 1.
Length of Burst Error B is a contiguous sequence of B bits in which the first
and last bits and any number of intermediate bits are received in error.
Due to impulse noise a burst error occurs
Contd..
The duration of noise is normally longer than the duration of 1 bit, which means
that when noise affects data, it affects a set of bits.
The number of burst bits affected depends on the data rate and duration of
noise.
For example,1.if we are sending data at 10 Mbps, a noise of 1micro second can
affect 10 bits; if we are sending data at 100 Mbps, the same noise can affect
100bits,i.e., there is an error burst of 100 bits.
Redundancy
The central concept in detecting or correcting errors is redundancy.
To be able to detect or correct errors, we need to send some extra bits with our
data.
These redundant bits (called error detection code) are added by the sender and
removed by the receiver.
To detect or correct errors, we need to send extra bits i.e., error detection
code(redundant bits) with data.
Error Detection Techniques
Regardless of the design of the transmission system, there will be errors during
transmission from sender to receiver, resulting in the change of one or more bits in
a transmitted frame.
Error Detecting Principle
For a given frame of bits, additional bits that constitute an error-detecting code
are added by the transmitter.
This code is calculated as a function of the transmitted bits.
Typically, for a data block of k bits, the error-detecting algorithm yields an error-
detecting code of n-k bits, where n-k <k.
The error-detecting code, also referred to as the check bits, is appended to the
data block to produce a frame of n bits, which is then transmitted.
Contd..
Error Detection Process
Parity Check
The simplest error-detecting scheme (Parity check) is to append a parity bit to
the end of a block of data.
Two types of parity checks have been used
1. Odd Parity
2. Even Parity
Even Parity
The parity bit is set(add or append) by the transmitter such that the total number
of ones in the character, has become an even number of 1s means even parity.
If the number of 1’s is not even at the receiver side, receiver can detect the error
in the transmission.
Odd Parity
The parity bit is set by the transmitter such that the total number of ones in the
character, has become an odd number of 1s means odd parity.
If the number of 1’s is not odd at the receiver side, receiver can detect the error in
the transmission.
Eg: Input before transmission- (1110001),
Using even parity -11100010 [0 is appened]
Using odd parity -11100011 [1 is appened]
Disadvantages
Single Parity check is not able to detect even no. of bit error.
For example, the Data to be transmitted is 101010.
Code word transmitted to the receiver is 1010101 (we have used even parity).
Let’sassume that during transmission, two of the bits of code word flipped to
1111101.
On receiving the code word, the receiver finds the no. of ones to be even and
hence no error, which is a wrong assumption.
Cyclic Redundancy Check (CRC)
A Cyclic Redundancy Check (CRC) is an error-detecting code. Blocks of data
entering these systems get a short check value attached (Frame Check Sequence),
based on the remainder of a polynomial of their contents.
Given a k-bit block of bits, or message, the transmitter generates an n-k bit
sequence, known as a frame check sequence (FCS), [such that the resulting
frame, consisting of n bits, is exactly divisible by some predetermined number.(P
= n-k+1)
The receiver then divides the incoming frame by that predetermined number and,
if there is no remainder, assumes there was no error.
Example:
Polynomials
A second way of viewing the CRC process is to express all values as
polynomials in a dummy variable X, with binary coefficients
The CRC process can now be described as
Example CRC implemented in polynomial
For D=1010001101, we haveD(X)=X9+X7+X3+X2+1. And for P=110101 we have
P(X)=X5+X4+X2+1.
Here k=10(number of bits in D(X)),P= n-k+1=6(Pattern p=n-k+1) so n-10+1=6
n=6+10-1=15, FCS(n-k=15-10=5)
The message D is multiplied with Xn-k. So D(X) multiplied with X5.[ X5 *D(X)
=X5*(X9+X7+X3+X2+1)=X14+X12 +X8 +X7+ X5
The product is divided by P.[P(X)=X5+X4+X2+1].
After the polynomial division, it end up with remainder R= 01110 which corresponds to
X3+X2+X1
The message is transmitted as n= X14+X12 +X8 +X7+ X5 + X3+X2+X1
Again the transmitted message is divided by pattern P(X) at the receiver’s side, if it is no
remainder then it is called as error free transmission.
Example of Polynomial Division
Digital Logic Implementation
The CRC process can be implemented by, a circuit consisting of XOR gates and a
shift register.
The shift register is a string of 1-bit storage devices.
The entire register is clocked simultaneously, causing a 1-bit shift along the entire
register.
The circuit is implemented as follows:
The number of shift registers, equal to the length of the FCS (n-k bits).
There are up to n-k XOR gates.
The presence or absence of a gate corresponds to the presence or absence of a term in the
divisor polynomial, P(X), excluding the terms 1 and Xn-k.
Again the transmitted message is divided by pattern P(X) at the receiver’s side, if it is no
remainder then it is called as error free transmission.
Digital Logic Implementation
With the input 1010001101
Circuit with Shift Registers for dividing by the polynomial X 5 + X4 + X2+ 1
XZ
Example with input of 1010001101
C4 C3 C2 C1 C0 C4 ⊕ C3 ⊕ I C4 ⊕ C1 ⊕ I C4 ⊕ I I
Initial 0 0 0 0 0 1 1 1 1
Step 1 1 0 1 0 1 1 1 1 0
Step 2 1 1 1 1 1 1 1 0 1
Step 3 1 1 1 1 0 0 0 1 0
Step 4 0 1 0 0 1 1 0 0 0
Step 5 1 0 0 1 0 1 0 1 0
Step 6 1 0 0 0 1 0 0 0 1
Step 7 0 0 0 1 0 1 0 1 1
Step 8 1 0 0 0 1 1 1 1 0
Step 9 1 0 1 1 1 0 1 0 1
Step 0 1 1 1 0
10
Error Correction
There are two approaches
Backward Error correction: When an error is detected in a frame, the sender
is asked to retransmit the data/frame. This is known as Automatic Repeat
request (ARQ).
Eg: Stop-and-wait ARQ, Go-back N ARQ, Selective Repeat ARQ
Forward Error Correction: Use more redundancy in the transmitted data to
not only detect but to correct error in the received data.
Eg: Hamming code.
Error correction process
Error Correction Process
Hamming Distance
The Hamming distance between two words is the number of differences between
corresponding bits.
The Hamming distance d(v1, v2) between two n-bit binary
sequences v1 and v2 is the number of bits in which v1 and v1 disagree.
For example, if v1 = 011011, v2 = 110001
then d(v1, v2) = 3
Now let us consider the block code technique for error correction.
Suppose we wish to transmit blocks of data of length k bits. Instead of
transmitting each block as k bits, we map each k-bit sequence into a
unique n-bit codeword.
Example:
For n=2, k=5 the following assignment is made
Suppose that a codeword block is received with the bit pattern 00100.This is
not a valid codeword, and so the receiver has detected an error.
Disadvantage:
It is not true that for every invalid codeword there is one and only one valid
codeword at a minimum distance.
There are 25=32 possible codewords of which 4 are valid, leaving 28 invalid
codewords.
Redundancy of the code:
With an (n, k) block code, there are valid codewords out of a
total of 2n possible codewords.
The ratio of redundant bits to data bits, (n-k)/k is called the
redundancy of the code, and the ratio of data bits to total
bits, k/n, is called the code rate.
The code rate is a measure of how much additional bandwidth is
required to carry data at the same data rate as without the code.
HAMMING CODE
Hamming code can be applied to data units of any length and uses the
relationship between the data bits and redundant bits.
To calculate the numbers of redundant bits (k) required to correct d data bits, the
condition is 2k >= m + k + 1 where m is data bit.
Basic Approach
To each group of m information bits k parity bits are added to form (m+k) bit
code.
Location of each of the (m+k) digits is assigned a decimal value.
The k parity bits are placed in positions 1, 2, …, 2k-1 positions(powers of 2 ).
k parity checks are performed on selected digits of each codeword.
At the receiving end the parity bits are recalculated. The decimal value of the k
parity bits provides the bit-position in error, if any. Figure shows how hamming
code is used for correction for 4-bit numbers (d4d3d2d1) with the help of three
redundant bits (r3r2r1) for the data bits 1010.
Chapter-2
DATA LINK CONTROL PROTOCOLS
Contents
Flow control
Error control
High level data link control (HDLC) protocol.
DATA LINK CONTROL PROTOCOLS
First, Data link control, deals with the design and procedures for
communication between two adjacent nodes: node-to-node communication.
The second function of the data link layer is media access control, or how to
share the link.
Need for data link control
1. Frame synchronization (Beginning and End of frame)
2. Flow control ( sender shouldn’t send faster than receiver capacity)
3. Error control (EC+ED)
4. Addressing (Identity of S and R)
5. Control and data on same link( No physically separation link for control and
data info)
6. Link management (coordination and cooperation)
Flow Control
Flow control is a technique for assuring that a transmitting entity does not
overwhelm a receiving entity with data.
The receiving entity typically allocates a data buffer of some maximum length
for a transfer.
When data are received, the receiver must do a certain amount of processing
before passing the data to the higher-level software.
Inthe absence of flow control, the receiver’s buffer may fill up and overflow
while it is processing old data.
Model of frame transmission
Flow Control
The time it takes for a station to emit all of the bits of a frame onto the medium
is the transmission time; this is proportional to the length of the frame.
Thepropagation time is the time it takes for a bit to traverse the link between
source and destination.
Stop-and-Wait Flow Control
The simplest form of flow control, known as stop-and-wait flow control, works as
follows:
A source entity transmits a frame.
After the destination entity receives the frame, it indicates its willingness to accept
another frame by sending back an acknowledgment to the frame just received.
The source must wait until it receives the acknowledgment before sending the
next frame.
The destination can thus stop the flow of data simply by withholding
acknowledgment.
It is often the case that a source will break up a large block of data into smaller
blocks and transmit the data in many frames.
Contd..
This is done for the following reasons:
• The buffer size of the receiver may be limited.
• The longer the transmission, the more likely that there will be an error,
necessitating retransmission of the entire frame.
• With smaller frames, errors are detected sooner, and a smaller amount of data
needs to be retransmitted.
• On a shared medium, such as a LAN, it is usually desirable not to permit one
station to occupy the medium for an extended period, thus causing long delays
at the other sending stations.
Drawbacks
Delayed
Acknowledgement/Data:
After a timeout on the sender
side, a long-delayed
acknowledgement might be
wrongly considered as
acknowledgement of some
other recent packet.
Sliding-Window Flow Control
The term Sliding Windows refers to imaginary boxes to hold frames.
Efficiency of link can be greatly improved by allowing multiple frames to be in
transit at the same time.
A maintains a list of sequence numbers that it is allowed to send, and B
maintains a list of sequence numbers that it is prepared to receive.
Each of these lists can be thought of as a window of frames. The operation is
referred to as sliding-window flow control.
The sequence number to be used occupies a field in the frame; it is limited to a
range of values.
Example
For a 3-bit field, the sequence number can range from 0 to 7.
Accordingly, frames are numbered modulo 8; that is, after sequence number 7,
the next number is 0.
For a k-bit field the range of sequence numbers is 0 through 2 k-1 and frames are
numbered modulo 2k.
The maximum window size is 2k-1.
It assumes the use of a 3-bit sequence number, so that frames are numbered
sequentially from 0 through 7, and then the same numbers are reused for
subsequent frames.
The example assumes a 3-bit sequence number field and a maximum window size of
seven frames.
Initially, A and B have windows indicating that A may transmit seven frames, beginning
with frame 0 (F0).
After transmitting three frames (F0, F1, F2) without acknowledgment, A has shrunk its
window to four frames and maintains a copy of the three transmitted frames.
The window indicates that A may transmit four frames, beginning with frame number 3.
B then transmits an RR (receive ready) 3, which means “I have received all frames up
through frame number 2 and am ready to receive frame number 3; in fact, I am prepared to
receive seven frames, beginning with frame number 3.
With this acknowledgment, A is back up to permission to transmit seven frames, still
beginning with frame 3; also A may discard the buffered frames that have now been
acknowledged.
A proceeds to transmit frames 3, 4, 5, and 6. B returns RR 4, which acknowledges
F3, and allows transmission of F4 through the next instance of F2.
By the time this RR reaches A, it has already transmitted F4, F5, and F6, and
therefore A may only open its window to permit sending four frames beginning with
F7.
Advantages
Sliding-window flow control is potentially much more efficient than stop-and
wait flow control.
The reason is that, with sliding-window flow control, the transmission link is
treated as a pipeline that may be filled with frames in transit.
ERROR CONTROL
Error control refers to mechanisms to detect and correct errors that occur in the
transmission of frames.
There is a possibility of two types of errors:
1. Lost frame : A frame fails to arrive at the other side
2. Damaged frame : frame does arrive, but some of the bits are in error (have been altered
during transmission).
The most common techniques for error control are based on some or all of the
following ingredients:
Error detection: Detecting whether there are corrupted bits in a frame.
Positive acknowledgment: The destination returns a positive acknowledgment to
successfully received, error-free frames.
Retransmission after timeout: The source retransmits a frame that has not been
acknowledged after a predetermined amount of time.
Negative acknowledgment and retransmission: The destination returns a negative
acknowledgment to frames in which an error is detected. The source retransmits such frames.
Contd..
Three versions of ARQ or Three Error control techniques are:
1.Stop-and-wait ARQ
2.Go-back-N ARQ
3.Selective-reject ARQ
Stop-and-Wait ARQ
Stop-and-wait ARQ is based on the stop-and-wait flow control technique.
Stop-and-wait ARQ is based on the stop-and-wait flow control technique.
The source station transmits a single frame and then must await an acknowledgment
(ACK).
No other data frames can be sent until the destination station’s reply arrives at the
source station.
Two sorts of errors could occur. First (damaged frame), the frame that arrives at the
destination could be damaged.
The receiver detects this by using the error-detection technique referred to earlier and
simply discard the frame
Station A sends a frame.
The frame is received correctly by station B, which responds with an acknowledgment
(ACK).
The ACK is damaged in transit and is not recognizable by A, which will therefore time out
and resend the same frame.
This duplicate frame arrives and is accepted by B.
B has therefore accepted two copies of the same frame as if they were separate.
To avoid this problem, frames are alternately labeled with 0 or 1, and
positiveacknowledgments are of the form ACK0 (acknowledges receipt of a frame
numbered 1 and indicates that the receiver is ready for a frame numbered 0) and
ACK1 (acknowledges receipt of a frame numbered 0 and indicates that the receiver is
ready for a frame numbered 1).
Advantage: Simplicity
Disadvantage:
Only one frame is sent at a time.
No Pipelining.
Efficiency is less.
Go-Back-N ARQ
Selective Reject ARQ
Thank You
