ANALOG TO DIGITAL CONVERTER(ADC):

An Analog to Digital Converter (ADC) converts an analog signal into a

digital signal. The digital signal is represented with a binary code, which is a
combination of bits 0 and 1.
The block diagram of an ADC is shown in the following figure −

Observe that in the figure shown above, an Analog to Digital

Converter (ADC) consists of a single analog input and many binary outputs. In
general, the number of binary outputs of ADC will be a power of two.
ADC accepts an analog input voltage Va and produces an output binary
word d1d2d3……………dn of functional value D , so that

D=d12-1+d22-2+………………………..+dn2-n

Where d1 is the most significant bit and dn is the least significant bit.

An ADC usually has two additional control lines: The START input to tell
the ADC when to start the conversion and the EOC(end of
conversion)output to announce when the conversion is complete.
There are two types of ADCs:
(I)Direct type ADCs and
(II)Indirect type ADC or Integrating type ADC.
(I)Direct type ADC:-
If the ADC performs the analog to digital conversion directly by utilizing the
internally generated equivalent digital (binary) code for comparing with the
analog input, then it is called as Direct type ADC.

The following are the different types of Direct type ADCs −

•Flash (Comparator)type converter

•Counter type ADC
•Servo or tracking ADC
•Successive Approximation ADC
(II)Indirect type ADC:-

•Integrating type ADCs perform conversion in an indirect manner by first

changing the analog input signal to a linear function of time or frequency and
then to a digital code.

•The two most widely used integrating type converters are:

(I) Charge balancing ADC (II) Dual slope ADC
 PARALLEL COMPARATOR/FLASH COMPARATOR ADC

•It is formed of a series of comparators, each one comparing the

input signal to a unique reference voltage. The comparator
outputs connect to the inputs of a priority encoder circuit, which
then produces a binary output.
•This type of ADC has the disadvantage that the number of comparators
required almost doubles for each added bit.

•A 2-bit ADC requires 3 comparators , 3-bit ADC needs 7,where as 4 bit

requires 15 comparators.

•In general ,the number of comparators required are 2n-1 ,where n is the
desired number of bits.

•The larger the value of n, the more complex is the priority encoder.
COUNTER TYPE ADC
•A 3-Bit counting ADC is shown in above fig(a). The COUNTER is reset
to zero count by the RESET pulse.

•Upon the release of RESET, the clock pulses are counted by the binary
counter. These pulses go through the AND gate which is enabled by
the voltage comparator high output.

•The number of pulses counted increase with time. The binary word
representing this count is used as the input of a D/A converter whose
output is a staircase of the type as shown in above Fig(b).

•The analog output Vd of DAC is compared to the analog input Va by

the comparator.

•If Va > Vd ,the output of the comparator becomes HIGH and the AND
gate is enabled to allow the transmission of the clock pulses to the
counter.
•If Va < Vd ,the output of the comparator becomes LOW and the AND
gate is disabled. This stops the counting at the time and the
digital output of the counter represents the analog input voltage Va.

•For a new value of analog input Va, a second reset pulse is applied to
clear the counter. Upon the end of the RESET, the counting begins again
as shown in above fig(b).The counter frequency must be low enough to
give sufficient time for the DAC to settle and for the comparator to
respond.
Low speed is the most serious drawback of this method. The conversion
time can be as long as (2n-1) clock periods depending upon the
magnitude of input voltage Va.

If the analog input voltage varies with time, the input signal is
sampled ,using a sample and hold circuit before it is applied to the
comparator. If the maximum value of the analog voltage is represented
by n-pulses and if the clock period is T seconds, the minimum interval
between samples is nT seconds.
 SERVO TRACKING TYPE ADC

•An improved version of counting ADC is the tracking or

a servo converter shown in below fig(a).
•The circuit consists of an UP/DOWN counter with the comparator
controlling the direction of the count.

•The analog output of the DAC is Vd and is compared with the analog
input Va.If Va > Vd ,the output of the comparator becomes HIGH and the
counter is caused to count up.

•The DAC output increases with each incoming clock pulse and when it
becomes more than Va, the counter reverses the direction and counts
down.

•This causes the control to count up and the count increases by 1 LSB.
The process goes on being repeated and the digital output changes back
and forth by + 1LSB around the correct value.

•However, when the analog input changes rapidly, the tracking A/D
cannot keep up with the change and error occurs as shown in above
fig(b).
The disadvantage of this technique is the time needed to
stabilize as a new conversion value is directly proportional to
the rate at which the analog signal changes .
 SUCCESSIVE APPROXIMATION CONVERTER
•The successive approximation technique uses a very efficient code
search strategy to complete n-bit conversion in just n-clock periods. An
8-bit converter would requires 8 clock pulses to obtain a digital output.
The circuit uses a successive approximation register (SAR) to find the required value
of each bit by trial and error.

The circuit operates as follows:

With the arrival of the START command, the SAR sets the MSB d1=1 with all other bits
to zero so that the trial code is 10000000.

The output Vd of the DAC is now compared with analog input Va.
If Va > Vd the DAC output Vd then 10000000 is less than the correct digital
representation. The MSB is left at ‘1’ and the next lower significant bit is made ‘1’ and
further tested.

If Va < Vd the DAC output Vd then 10000000 is greater than the correct digital
representation. So reset MSB to ‘0’ and go on to the next lower significant bit .

This procedure is repeated for all subsequent bits, one at a time ,until all bit positions
have been tested.

Whenever the DAC o/p crosses Va, the comparator changes state and this can be
taken as the end of conversion (EOC) command.
A comparison of the speed of an 8-bit tracking ADC and 8-bit
successive approximation ADC is made in below fig.
(II)Indirect type ADC:-

•The two most widely used integrating type converters are:

(I) Charge balancing ADC (II) Dual slope ADC

The most commonly used ADC’s are SAR & Integrator type
ADC’s.

The Successive approximation ADCs are used in applications

such as data loggers and instrumentation where conversion
speed is important.

The Successive approximation ADC and Flash type ADC are

faster but generally less accurate than integrating type ADC’s.

The integrating type ADC is used in applications such as digital

meter, panel meter and monitoring systems where the
conversion accuracy is critical.
 Dual slope ADC
As the name suggests, a dual slope ADC a produces an equivalent
digital output for a corresponding analog input by using two (dual)
slope technique. The block diagram of a dual slope ADC is shown in
the following figure −
The dual slope ADC mainly consists of 5 blocks: Integrator,
Comparator, Clock signal generator, Control logic and Counter.

The converter first integrates the analog input signal Va for a fixed
duration of 2n clock periods as shown in fig.b. Then it integrates an
internal reference voltage VR of opposite polarity for a fixed duration
of N clock cycles until the integrator output is zero.

The working of a dual slope ADC is as follows −

• Before the START command arrives, the switch SW1 is connected to

ground and SW2 is closed.

•Any offset voltage present in the A1,A2,comparator loop after

integration ,appears across the capacitor CAZ till the threshold of the
comparator achieved.
•At the arrival of START command at t = t1,the control logic opens
SW2 and connects SW1 to Va and enables the counter starting from
zero.

•The circuit uses an n-stage ripple counter and therefore the counter
resets to zero after counting 2n pulses.

•The analog voltage Va is integrated for a fixed number 2n counts of

clock pulses after which the counter resets to zero.

•If the clock period is T ,the integration takes place for a time T1=2nT
and the output is a ramp going downwards as shown in fig.b.

•The counter resets itself to zero at the end of the interval T1 and
switch SW1 is connected to the reference voltage(- VR).
•The output voltage Vo will now have a positive slope. As long as Vo is
negative, the output of the comparator is positive and the control logic
allows the clock pulse to be counted.

• However ,when Vo becomes just zero at time t=t3,the control logic

issues an end of conversion (EOC) command and no further clock
pulses enter the counter. the reading of counter at t3 is proportional
to the analog input voltage Va.
PROBLEM
 Problem 2:

If the analog signal Va is +4.129V in the above example

,find the equivalent digital number.
ADC/DAC SPECIFICATIONS:

Resolution

Linearity

Accuracy

Monotonicity

Settling time

Stability
Resolution:
• The resolution of a converter is the smallest change in voltage
which may be produced at the output(input) of the converter.
For example, an 8-bit D\A converter has 28-1=255 equal intervals.
Hence the smallest change in output voltage is (1\255)of the full
scale output range.

• The resolution is the value of the LSB.

• = 1 LSB increment

Problem: Find the resolution of a 10-bit ADC for an input range of 10V?
Linearity:
• The linearity of an ADC/DAC is an important measure of its
accuracy & tells us how close the converter output is to its ideal
transfer characteristics.
• The linearity error is usually expressed as a fraction of LSB
increment or percentage of full-scale voltage. A good converter
exhibits a linearity error of less than ±½LSB.
Accuracy:

Absolute accuracy:
It is the maximum deviation between the actual converter
output & the ideal converter output.
Relative accuracy:
It is the maximum deviation after gain & offset errors
have been removed.

The accuracy of a converter is also specified in form of

LSB increments or % of full scale voltage.
Settling time:
It represents the time it takes for the output to settle within a
specified band ±½LSB of its final value following a code change at
the input (usually a full scale change). It depends upon the switching
time of the logic circuitry due to internal parasitic capacitance
&inductances. Settling time ranges from 100ns to 10μs depending
on word length & type circuit used.

Stability:
The performance of converter changes with temperature age &
power supply variation. So all the relevant parameters such as offset,
gain, linearity error & monotonicity must be specified over the full
temperature & power supply ranges to have better stability
performances.