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Chapter 6

Subroutine and Stack concept
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0% found this document useful (0 votes)
14 views

Chapter 6

Subroutine and Stack concept
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Microprocessor and Interfacing

(MPI)
GTU # 3160712

Unit-6:
Stack and
Subroutine
 Looping
Topics to be covered
 Introduction to Stack
 Introduction to Subroutine
 Counters and Time Delays
 Time Delay Routines
 Time Delay using a Register Pair
 Counter design with time delay
 Examples
 Assembly language programs
Introduction to Stack
Introduction to Stack
 Stack is a group of memory location in the R/W memory that is used for
temporary storage of binary information during execution of a program.
 The starting memory location of the stack can be defined in program and
space is reserved usually at the high end of memory map.
E.g.: LXI SP,FFF8; loads 16-bit memory address in stack pointer
 Instruction necessary for stack are as follows:
LXI SP, 2095 Load the stack pointer register with a 16-bit
PUSH B/D/H address.
It copies contents of register pair on the stack
PUSH PSW Operand PSW represents Program status word
meaning. i.e. content of accumulator and flags.
POP B/D/H It copies content of top two memory locations
of the stack in to specified register pair
POP PSW It copies content of top two memory locations
of the stack in to accumulator and flags
respectively.
Introduction to
Subroutine
Introduction to Subroutine
 A subroutine is a group of instruction that performs a subtask of repeated
occurrence.
 A subroutine can be used repeatedly in different locations of the program.
Advantage of using Subroutine
 Rather than repeating same instructions several times, they can be
grouped into a subroutine that can be called from the different locations.
Where to write Subroutine?
 In Assembly language, a subroutine can exist
anywhere in the code.
 However, it is customary to place subroutines
separately from the main program.
The 8085 has two instructions for dealing with
subroutines
 The CALL instruction is used to redirect program
execution to the subroutine.
Introduction to Subroutine
Instruction Description Example
Opcode Operand

CALL 16-bit Instruction transfers the CALL 000AH


program sequence to the
address memory address given in the
operand. Before transferring,
the address of the next
RET instruction(PC)
The program is sequence
pushed onto
is RET
the stack. from the subroutine
transferred
to the calling program.
Working of CALL instruction
Before CALL instruction
CALL 4 0 5 0
4 05 0 Stack
03
06
Register 21
s
W Z SP 50
SP
SP
PC 2 40 0
Working of CALL and RET instruction
Before CALL instruction
CALL 4 0 5 0 Stack
03 2151
06 2150
Register 21 2149
s 50 2148
W 40 50 Z
24 2147
SP 00 2146
2145
PC
2144
Working of CALL instruction
 When CALL instruction is fetched, the microprocessor knows that the next
two new Memory location contains 16-bit subroutine address.
 Microprocessor reads subroutine address from the next two memory
location and stores the higher order 8-bit of the address in the W register
and stores the lower order 8-bit of the address in the Z register.
 Push the Older address of the instruction immediately following the CALL
onto the stack [Return address].
 Loads program counter(PC) with the new 16-bit address supplied with the
CALL instruction from WZ registers.
CALL Conditionally

Instruction Description Example


Opcode Operand

CC 16-bit Call on Carry, Flag Status: CC 2030H


address
CNC 16-bit CY=1
Call on No Carry, Flag Status: CNC 2030H
address
CZ 16-bit CY=0
Call on Zero, Flag Status: CZ 2030H
address
CNZ 16-bit Z=1
Call on No Zero, Flag Status: CNZ 2030H
address
CP 16-bit Z=0
Call on Positive, Flag Status: CP 2030H
address
CM 16-bit S=0
Call on Minus, Flag Status: CM 2030H
address
CPE 16-bit S=1
Call on Parity Even, CPE 2030H
address Flag Status: P=1
CPO 16-bit Call on Parity Odd, CPO 2030H
address Flag Status: P=0
Return from Subroutine

Instruction Description Example


Opcode Operand

RC 16-bit Return on Carry, CY=1 RC


address
RNC 16-bit Return on No Carry, CY=0 RNC
address
RZ 16-bit Return on Zero, Z=1 RZ
address
RNZ 16-bit Return on No Zero, Z=0 RNZ
address
RP 16-bit Return on Positive, S=0 RP
address
RM 16-bit Return on Minus, S=1 RP
address
RPE 16-bit Return on Parity Even, RPE
address Flag Status: P=1
RPO 16-bit Return on Parity Odd, RPO
address Flag Status: P=0
CALL: Call Unconditionally

Lin Instruction Address PC SP 05 [2008


]
e
1 LXI H,1002 [0000] [0003] 0
SP [2007
2 LXI D,3002 [0003] [0006] 0
09 ]
SP
[2006
3 CALL ADD1 [0006] [0009]
0009 ]
4 LXI B,4002 [0009] [000C] [2005
]
5 ADD1:MOV A,D [000C] [000D]
6 ADD H [000D] [000E]
7 RET [000E]
Working of RET instruction

• Retrieve the return address from the top of


RET
the stack
• Load the program counter with the return
address.

Stack
03 2151
06 2150
Register 21 2149
s
W Z SP 50 2148
SP 24 2147
SP 00 2146
2145
PC
2144
Things to be considered in Subroutine
 Number of PUSH and POP instruction used in the subroutine must be
same, otherwise, RET instruction will pick wrong value of the return
address from the stack and program will fail.
Counters and Time
Delays
Counters and Time Delays
Counters and Time Delays are important techniques.
Applications of Counters and Time Delays
They are commonly used in
1. Traffic Signal
2. Digital Clocks
3. Process Control
4. Serial data transfer
• A counter is designed simply by loading appropriate
number into one of the registers and using INR or DCR
instructions.
• Loop is established to update the count.
• Each count is checked to determine whether it has
reached final number ;if not, the loop is repeated.
Example 1: Create Counters and Time Delays

Initialize 1. MVI C,05

Display 2. LOOP: MOV A,C

3. OUT 01
Update
4. DCR C
Is this
NO
Final
Count
5. JNZ LOOP
YES
6. HLT
End
Example 1: Create Counters and Time Delays

Label Opcod Operand Comment T-states


e
MVI C,05h ; Load Counter 7
LOOP: DCR C ; Decrement Counter 4
JNZ LOOP ; Jump back to Decr. 10/7
C

CRJNZ
C LOOP
MVI C, 05h
(true) JNZ LOOP (false)
achine Cycle:
Machine
Machine Cycle:F +FR=+1
Cycle: FR+=3
R Machine Cycle: F + R = 2
States:
T-States:
=2 = 4T 4T + T-States: 4T +
3T + 3T=10T 4T + 3T =
T-States: 3T =7T

7T
Example 1: Create Counters and Time Delays
 Instruction MVI C, 05h requires 7 T-States to execute.
 Assuming, 8085 Microprocessor with 2MHz clock frequency.
 How much time it will take to execute above instruction?
Clock frequency of the system (f)= 2 MHz
Clock period (T) = 1/f = ½ * 10-6 = 0.5 s
Time to execute MVI = 7 T-states * 0.5 s
= 3.5 μs
How much time it will take to execute above instruction with 1 MHz
clock frequency?
Example 1: Create Counters and Time Delays

Label Opcod Operand Comment T-states


e
MVI C,05h ; Load Counter 7
LOOP: DCR C ; Decrement Counter 4
JNZ LOOP ; Jump back to Decr. 10/7
C
 Now to calculate time delay in loop, we must account for the T-states
required for each instruction, and for the number of times instructions are
executed in the loop.
 The for the next two instructions:
DCR:  4 T-States
JNZ : 10 T-States
14 T-States
 Here, the loop is repeated for 5 times.
Example 1: Create Counters and Time Delays
How to calculate time delay for given loop?
 Time delay in loop TL with 2MHz clock frequency is calculated as:
TL= T * Loop T-states * N10 -----------------(1)
TL : Time Delay in Loop
T : Clock Period
N10 : Equivalent decimal number of hexadecimal count loaded in the
delay register
Substituting value in equation (1)
TL= (0.5 * 10-6 * 14 * 5)
= 35 s
Example 1: Create Counters and Time Delays
 If we want to calculate delay more accurately, we need to accurately
calculate execution of JNZ instruction
i.e If JNZ = true, then T-States = 10

Else if JNZ =false, then T-States = 7


 Now, according to our program:
1. MVI C,05
2. LOOP: DCR C Here, the last cycle
will be executed in 7
T-States;
3. JNZ LOOP when JNZ = false
Therefore, there is4.difference
HLT of (10T – 7T) 3T-states:
Example 1: Create Counters and Time Delays
Therefore, there is difference of (10T – 7T) 3T-states:
 Delay generated by last clock cycle:
= 3T * Clock Period
= 3T * (1/2 * 10-6 )
= 1.5 s
 Now, the accurate loop delay is:
TLA=TL - Delay generated by last clock cycle
TL= (0.5 =
* 10 * 14
35-6 s *
- 1.5 s
5)= 35 s
= 33.5 s
Example 1: Create Counters and Time Delays
Now, to calculate total time delay
Total Delay = Time taken to execute instruction outside loop
+
Time taken to execute loop instructions
TD = TO + TLA
= (7 * 0.5 s) + 33.5 s
= 3.5 s + 33.5 s
= 37 s
Example 2: Create Counters and Time Delays
Calculate time delay and accurate time delay for given loop with
Counter value =255 (FF h) T-states=14
Clock frequency =2MHz
TL = T * Loop T-states * N10 -----------------(1)
= 0.5 *10-6* 14* 255
= 1785 μs = 1.8 ms
TLA= Time to execute loop instructions
= TL – (3T states*clock period)
= 1785 – ( 3 * ½ * 10-6)
= 1785 – 1.5=1783.5 μs
Exercise: Counters and Time Delays
1. How much time the 8085 microprocessor will take to execute the MOV B,
A instruction, if the crystal frequency is 4MHz?
2. How much time will be required to execute the STAX B instruction if the
clock frequency is 4 MHz?
3. How much time will be required to execute the MVI M,25h instruction if
the clock frequency is 6 MHz?
Time Delay using a
Register Pair
Time Delay using a Register Pair
 Time delay can be considerably increased by setting a loop and using a
register pair with a 16-bit number (FFFF h).
 A 16-bit is decremented by using DCX instruction.
Problem with DCX instruction
 DCX instruction doesn’t set Zero flag.
 Without test flag, Jump instruction can’t check desired conditions.
 Additional technique must be used to set Zero flag.
Example 3:Time Delay using a Register Pair
Label Opcod Operan Comment T-states
e
LXI d
B,2384 ; Load BC with 16-bit 10
LOOP: DCX h
B counter
; Decrement BC by 1 6
MOV A, C ; Place contents of C in 4
ORA B A
; OR B with C to chk 4
JNZ LOOP ;Zero flag not equal to 0,
if result 10/7
10/7
jump back to loop
 Here the loop includes four instructions:
Total T-States = 6T + 4T + 4T + 10T
= 24 T-states
Example 3:Time Delay using a Register Pair
 The loop is repeated for 2384 h times.
 Converting (2384)16 = (_____)10
2384 h = (2 * 163 )+ (3* 162) + (8 * 161) + (4 * 160)
= 8192 + 768 + 128 + 4
9092
= 9092
 Clock frequency of the system (f)= 2 MHz
 Clock period (T) = 1/f = ½ * 10-6 = 0.5 s
Now, to find delay in the loop
TL= T * Loop T-sates * N10
= 0.5 *10-6* 24 * 9092
= 109104 s
= 109 ms (without adjusting last cycle)
Example 4:Time Delay using nested loop
38 h

FF h

Label Opco Operand T-states


de
MVI B,38h 7T
LOOP MVI C,FFh 7T
2:
LOOP DCR C 4T
1: JNZ LOOP1 10/7 T
DCR B 4T
JNZ LOOP2 10/7 T
Example 4:Time Delay using nested loop
 Calculating delay of inner LOOP1: TL1
Label Opco Operand T-states
LOOP LOOP de
DCR C 4T
1 1: JNZ LOOP1 10/7 T
Decrement
Register C
TL= T * Loop T-states * N10
= 0.5 *10-6* 14*
Is 255
N Regist = 1785 μs = 1.8
o er ms
C = 0?

Yes TL1= TL – (3T states* clock period)


= 1785 – ( 3 * ½ *
Delay
10 -6
) of Loop1 TL1= 1783.5
μs = 1785-
1.5=1783.5 μs
Example 4:Time Delay using nested loop
 Now, Calculating delay of outer LOOP2: TL2
Label Opco Operand T-states
MVI C, de
MVI B,38h 7T
FF
LOOP MVI C,FFh 7T
2:
Delay of Loop1 TL1= 1783.5
TL1 Delay DCR B μs 4T
in LOOP1 JNZ LOOP2 10/7 T
Counter B : (38)16 = (56)10
DCR Loop2 is executed for 56
B times
T-States = 7 + 4 + 10 = 21 T-
States
JNZ TL2 = 56 (TL1 + 21 T-States *
LOOP2
0.5)
= 56( 1783.5 μs + 10.5)
= 100464 μs
Disadvantage of using software delay
 Accuracy of time delay depends on the accuracy of system clock.
 Microprocessor is occupied simply in a waiting loop; otherwise it could be
employed to perform other functions.
 The task of calculating accurate time delays is tedious.
 In real time applications timers are commonly used.
 Intel 8254 is a programmable timer chip, that can be interfaced with
microprocessor to provide timing accuracy.
 The disadvantage of using hardware chip include the additional expense
and the need for extra chip in the system.
Counter design with
time delay
Counter design with time delay
Initialize
Counter
Displa
Load
y
Delay
Time Register
Delay Decrement
Delay
Update Register
Count
N
o
Is Delay
N Is Count Register =
o Complet 0?
e?

Yes
Yes
Example 5: Hexadecimal counter program
Write a program to count Assembly Language Program
continuously in
1. MVI B,FF
hexadecimal from FFh to
00h with 0.5 s clock 2. LOOP:MOV A,B
period. Use register C to 3. OUT 01
set up 1ms delay 4. MVI C, COUNT; need to calculate delay
between each count and
count
display the number at
one of the output port. 5. DELAY: DCR C
6. JNZ DELAY
Given:
7. DCR B
Counter= FF h
8. JNZ LOOP
Clock Period T=0.5 s
9. HLT
Total Delay = 1ms
Output:
To find value of delay
Example 5: Hexadecimal counter program
Delay Calculations Instruction T-States
DCR C 4
1. MVI B,FF;
JNZ DELAY 10
2. LOOP:MOV A,B Total 14 T

3. OUT 01

4. MVI C, COUNT
Calculate Delay for
5. DELAY: DCR C
Internal Loop
6. JNZ DELAY TI = T-States * Clock Period
7. DCR B
* COUNT
8. JNZ LOOP = 14 * 0.5 * 10-6 * COUNT
9. HLT TI = (7.0 * 10-6 )* COUNT
Example 6: 0-9 up/down counter program
 Write an 8085 Instructio T-States
Program n
assembly language DCX 6
program to generate a 1. START: MVI B,00H MOV A,L 4
decimal counter (which 2. DISPLAY:OUT 01 ORA H 4
counts 0 to 9 3. LXI H, COUNT JNZ 10
continuously) with a 4. LOOP: DCX H TOTAL 24 T
one second delay in
between. The counter 5. MOV A,L
should reset itself to
6. ORA H
zero and repeat
continuously. Assume a 7. JNZ LOOP
Clock frequency of 8. INR B
1MHz. 9. MOV A,B
10. CPI 0A
11. JNZ DISPLAY
12.JZ START
Example 6: 0-9 up/down counter program
Delay Calculation:
As show in previous program of register pair, assuming
T-states = 24
Loop Delay TL = 1 sec
Clock Period T =1 * 10-6 sec
Find Count
TL= T * Loop T-states * Count
1 sec = (1.0 * 10-6 sec) * 24 * Count
Count =
= (41666)10
= (A2C2)16 =A2C2 h
Exercise
Calculate delay in following loop, assuming clock period = 0.33s

Label Instruction T-states


LXI B, 12FF H 10
DELAY: DCX B 6
XTHL 16
XTHL 16
NOP 4
NOP 4
MOV A,C 4
ORA B 4
JNZ DELAY 10/7

Ans=102ms
TL= T * T-states * Count
Exercise
Write a set of 8085 assembly language instructions to generate a 1 second
delay, if the crystal frequency is 6 MHz.
Note:
Clock Period = 1/Clock Frequency
Example 7:Square wave program
Write a program to generate a continuous square wave with the
period of 500 s with clock period of 325ns, and use bit D0 to
output square wave.Problem Analysis
• In this problem, the period of square wave is 500
s; therefore, the pulse should be ON(logic 1) for
250 s and OFF(logic 0) for remaining 250 s.
• Therefore, the alternate pattern of 0/1 bits can be
provided by loading Accumulator with AA h (1010
1010).
• Now rotating the pattern once through each delay
loop.
500 s
• Bit D0 of output port is used to provide logic 0
and 1.
• The delay of 250s can be easily obtained with an
8-bit delay count and one register.
Example 7:Square wave program
Program Logic
1. MVI D, AA 1
(A) 1 0 1 0
2. ROTATE: MOV A,D
1 0 1 0
3. RLC
4. MOV D,A After RLC 0 1 0 1
5. ANI 01 0 1 0 1
6. OUT 01 ANI 01h 0 0 0 0 0
Logic
7. MVI B, 00 0 1
COUNT (A) 0 1 0 1
8. DELAY: DCR B After
0 1 0AND
1 0 0 0 0
9. JNZ DELAY 0 0 RLC
After 0 1 1 0 1 0
10. JMP ROTATE 1 0 1 0
ANI 01h 0 0 0 0 0
Example 7:Square wave program
Delay Calculation:
 In this problem, the pulse width is relatively small (250 s); therefore, to
obtain accurate output pulse, we should take into account for all the T-
states.
 The total delay should include the delay in the loop and execution time of
the instruction outside the loop.
Example 7:Square wave program
Delay Calculation:
 No. of instruction outside the loop is seven.
Delay outside the loop TO=46 T-states * 325 ns =14.95s
 Delay Loop includes two instruction, with 14 T-States, except for last cycle
11 T-States
Loop Delay TL= 14 T * 325ns * (COUNT -1) + [ 11 T *325ns ]
TL = 4.5 s (COUNT -1) + 3.575 s
 Total delay required = 250 s
TD = TO + TL
250 s = 14.95s + 4.5 s (COUNT -1) + 3.575 s
Count = (52)10
= (34)16
Exercise
Write a program to generate a square wave with the period of 400s with
clock period of 325ns. Use bit D0 to output square wave.

ANS = (42)10
GTU Exam Questions
Sr Questions Marks Year
.
1. Write a set of 8085 assembly language instructions to generate a 0.5 second 4 W’17
delay, if
the crystal frequency is 4 MHz.
2. Explain stack and subroutine with suitable example. 4 S’18
3. Design an up-down counter to count from 0 to 7 and 7 to 0 continuously with a 1- 4 W’18
second delay between each count, and display the count at one of the output
ports. Show the delay calculation
4. Define the concepts of stack and subroutine. Explain the PUSH and POP 3 S’19
instructions of an 8085 microprocessor with example.
References
Book: Microprocessor Architecture, Programming, and Applications with the
8085, Ramesh S. Gaonkar Pub: Penram International
Thank You

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