Slidesaver - App Tcebhm
Slidesaver - App Tcebhm
Master Slave
• TO begin a coiniiiiinication, the lHastei’
first configures the Clock, using a frequency less
than or equal to the maximum frequency the
slave device supports.
SOSPD P Data Re t
R 1. This bi-
directional register ›r
provides the w
transmit and
receive data for the
SPI.
Name Description Access
SOSPCCR SPI Clock Counter Register.
This register controls the MW
frequency of a master’s SCK
Naster Slave
NlS
0
• There is no buffer between the data register
and
the internal shift register. A write to the data
register goes directly into the internal shift
register.
OPTO D.0
ROM
G£'fO P<et 0.1
TD1
G9IO Pon I ORX_CLI RD2
]E]O PO.5 OM ¢
OP.x's .F .I.2s. £.t.x.
c.e.t 0...s _. w.. s
GPT 0.1
PTose*vwd
OO
8CK0
and Cons
Of
SPI
Advantages
• Full duplex coiuiiiunication