Memory

• Stores programs and data

• Primary & Secondary

• Primary(main memory) – fast memory,

volatile(evaporating), work place

• RAM – 32, 64, 128, 256, 512MB ,1GB & 2GB

• 1 bit of information stored in each cell

• Word- groups of cells of fixed size (n bits)

• Word length- no: of bits in each word

• Address is needed to locate a word (no:s that

identify successive locations)

Capacity of the memory is one factor that

characterizes the size of a computer.
• Memory access time: time required to access
one word

• Registers : high speed storage elements. faster

than cache

• Secondary memory: non volatile, slower,

cheaper, cannot be accessed directly by CPU,
higher storage capacity (CD & Thumb)
• Cache – It is random access memory
that a computer microprocessor can
access more quickly than it can access
regular RAM.

OR

• A small, fast memory that acts as a buffer for

a slower, larger memory
• Memory hierarchy: The hierarchical
arrangement of storage in current computer
architectures

cache- main- secondary

 ALU
• Operations are executed here

• To do the operation
- fetch from memory
- do the operation in ALU
- store back in memory

• Operands are stored in registers when brought

to processor
• Arithmetic
– Addition
– Subtraction
• Registers
– Multiplication
– Division
– Comparison - data registers
- Special purpose register
- Memory buffer register
• Logic - Memory data register
– AND - Memory address register
– OR
– NOT
– XOR
 Control Unit

• Coordinates / Directs other Units

• Nerve center that sends control signals to other units

and senses their states
• Timing signals are generated (signals that determine
when a given action is to take place)
• Data transfer btw processor and memory is also
controlled
Computer Operations are

• Accept information through an input unit and

store it in the memory.
• Information stored in the memory is fetched,
under program control, into an ALU to process.
• Processed information leaves through an output
unit.
• All activities are directed by the control unit.
 Basic Operational Concepts
To perform a given task, an appropriate
program consisting of a list of instruction is
stored in the memory.

Individual instructions are brought from the

memory into the processor, which executes
the specified operation.
Add LOCA, R0

Load LOCA, R1
Add R1, R0
 Memory

MAR MDR
Control
PC R
0

R
1
IR Processor

ALU
R
n- 1
n general purpose
registers

Connections between the processor and the memory

 Terms used
• IR - instruction currently being executed
• PC - memory address of next instruction to
be fetched and executed
• MAR - address of location to be accessed
• MDR - data to be written into or read out of
the addressed location
 Functions…
• Instruction Register : contains the
instruction that is being executed. Its output
is available to the control circuits, that
generates the timing signals for control of
the various processing elements involved in
execution of the instruction.
• Program Counter : is a register, that
contains the memory address of the
instruction currently being executed. During
the execution of the current instruction, the
contents of program counter is updated to
correspond to the address of the next
instruction.
 Memory Address Register (MAR) : holds the
address of the memory location to or from
which data is to be transferred.

Memory Data Register (MDR): contains the

data to be written into or read-out of the
addressed memory location.
General- purpose Registers : are used for
holding data, intermediate results of
operations. They are also known as
scratch-pad registers.
 Steps involving instruction fetch
and execution
INSTRUCTION FETCH

• Execution of a program starts by setting the

PC to point to the first instruction of the
program.
• The contents of PC are transferred to the
MAR and a Read control signal is sent to the
memory
How memory & processor can be connected ?
• The addressed word (here it is the first
instruction of the program) is read out of
memory and loaded into the MDR

• The contents of MDR are transferred to the IR

for instruction decoding
How memory & processor can be connected ?
INSTRUCTION EXECUTION

The operation field of the instruction in IR is

examined to determine the type of operation to
be performed by the ALU

The specified operation is performed by

obtaining the operand(s) from the memory
locations or from GP registers.
How memory & processor can be connected ?
• Fetching the operands from the memory requires
sending the memory location address to the MAR and
initiating a Read cycle.

• The operand is read from the memory into the MDR

and then from MDR to the ALU.

• The ALU performs the desired operation on one or

more operands fetched in this manner and sends the
result either to memory location or to a GP register.
How memory & processor can be connected ?
• To Store result in memory location:
• The result is sent to MDR and the address of the
location where the result is to be stored is sent to
MAR and Write cycle is initiated.

• Thus, the execute cycle ends for the current

instruction and the PC is incremented to point to the
next instruction for a new fetch cycle.
How memory & processor can be connected ?
 Bus Structures
• BUS – Group of lines (wires) that serves as
a connecting path for several devices
Single-bus structure
 Data Bus : It is used for transmission of data.
The number of data lines
correspond to the number of bits in a word.

Address Bus: it carries the address of the main

memory location from where the data can
be accessed.

Control Bus: it is used to indicate the direction

of data transfer and to coordinate the timing of
events during the transfer
 Bus Structures
Single-bus structure

Two-bus structure
 Input Output Memory Processor

Single-bus structure

• Only two units can actively use the bus at any given time
• Devices connected to bus vary in speed
Advantages of Single-Bus Structure

• Low Cost
• Flexibility for attaching peripheral devices

Draw Back
low operating speed
Found in small computers such as
minicomputers and microcomputers.
TWO-BUS STRUCTURE
I/O bus

Input
Memory
Processor

Output
 The bus is said to perform two distinct
functions by connecting the I/O units with
memory and processor unit with memory. The
processor interacts with the memory through a
memory bus and handles input/output
functions over I/O bus.

The main advantage of this structure is good

operating speed but on account of more cost.
 Performance
• Performance - measure of how quickly the
computer can execute programs

• Speed – Design of Hardware and its machine

Language

• Best Performance – Design of compiler,

Machine instruction set, and the hardware in a
coordinated way
Execution depends on all units in a computer system
Processor Time depends on the hardware involved in
the execution of individual machine Instruction

Main Cache
memory memory Processor

Bus
 Processor Clock
• Processor circuits are controlled by timing
signal called clock
• Clock cycle – regular time interval
• P – length of one clock cycle is an
important parameters that effects processor
performance .Its inverse is clock rate.
• Hertz (Hz) – cycles per second
• 500 millions cycles per second – 500 MHz

• 1250 millions cycles per second – 1.25 GHz

Basic Performance Equation
NxS
T =
R

T – processor time(program execution time)

N – number of instruction executions
S – avg. no. of basic steps to execute 1
machine instruction
R – clock rate
 Instruction Set
• RISC ( Reduced Instruction Set Computers)
• CISC ( Complex Instruction Set Computers)
 Performance Measurement

• SPEC rating = Running Time On reference Computer

• Running Time On computer Under Test
Multi Processor And Multicomputer

• shared-memory multiprocessor systems

• Message-passing multicomputers