Analogday 1
Analogday 1
on
ANALOG IC DESIGN-DAY1
Outline of the Course
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
CONTENTS
• Introduction to Analog IC Design
1
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Course Objective
This course teaches analog integrated circuit design using CMOS technology.
6
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Course Objective
7
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
VLSI Design
Integrated circuits are also categorized according to the number of transistors
or other active circuit devices they contain.
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Advantages of CMOS Technology
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Advantages of CMOS Technology
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Pentium
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Moore’s Law
In 1965, Gordon E. Moore—co-founder of Intel (NASDAQ: INTC)—postulated that
the number of transistors that can be packed into a given unit of space will double
about every two years.
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Year 1999 2001 2004 2008 2011 2014
Tech.Nod e (nm) 180 130 90 60 40 30
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Die Size Growth
100
Die size (mm)
P6
10 386 486 Pentium ® proc
286
8080 8086
8085 ~7% growth per year
8008
4004 ~2X growth in 10 years
1
1970 1980 1990 2000 2010
Year
13
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Frequency
10000
Doubles every
1000
2 years
Frequency (Mhz)
100 P
6
Penti
10 8085 um ®
8086 proc
8080 486
1 286
386
8008
4004
0.1
1970 1980 1990 2000 2010
Year
ELECTRICAL
ELECTRONICS
1 COMMUNICATION INSTRUMENTATION
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Limitations of Static CMOS
Intel’s Prediction of Power Consumption
19
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
WHAT IS ANALOG
DESIGN?
The Analog IC Design Process
20
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
What is Electrical
Design?
Electrical design is the process of going from the specifications to a circuit solution.
The inputs and outputs of electrical design are:
23
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
What is the Layout
Process?
1) Inputs are the W/L values and the schematic (generally from schematic entry used for
simulation).
2) A CAD tool is used to enter the various geometries. The designer must enter the
location, shape, and level of the particular geometry.
3) During the layout, the designer must obey a set of rules called design rules. These rules
are for the purpose of ensuring the robustness and reliability of the technology.
4) Once the layout is complete, then a process called layout versus schematic (LVS) is
applied to determine if the physical layout represents the electrical schematic.
5) The next step is now that the physical dimensions of the design are known, the
parasitics can be extracted. These parasitics primarily include:
a) Capacitance from a conductor to ground
b) Capacitance between conductors
c) Bulk resistance
6) The extracted parasitics are entered into the simulated database and the design is re-
simulated to insure that the parasitics will not cause the design to fail.
24
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Packaging
Packaging of the integrated circuit is an important part of the physical design process. The
function of packaging is:
1)Protect the integrated circuit
2)Power the integrated circuit
3)Cool the integrated circuit
4)Provide the electrical and mechanical connection between the integrated circuit
U and the outside world.
Packaging steps:
25
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
What is Test Design ?
Types of tests:
• Functional – verification of the nominal specifications
• Parametric – verification of the characteristics to within a specified tolerance
• Static – verification of the static (AC and DC) characteristics of a circuit or system
• Dynamic – verification of the dynamic (transient) characteristics of a circuit or
system
26
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Analog Integrated Circuit Design
Skillset
Characteristics of Analog Integrated Circuit Design
• Done at the circuits level
• Complexity is high
• Continues to provide challenges as technology evolves
• Demands a strong understanding of the principles, concepts and
techniques
• Good designers generally have a good physics background
• Must be able to make appropriate simplifications and assumptions
• Requires a good grasp of both modeling and technology
• Have a wide range of skills - breadth (analog only is rare)
• Be able to learn from failure
• Be able to use simulation correctly
27
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Understanding Technology
Understanding technology helps the analog IC designer to know the limits of the
technology and the influence of the technology on the design.
28
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Understanding Modeling
Modeling:
Modeling is the process by which the electrical properties of an electronic circuit or system are
represented by means of mathematical equations, circuit representations, graphs or tables.
Models permit the predicting or verification of the performance of an electronic circuit or system.
Examples:
Ohm’s law, the large signal model of a MOSFET, the I-V curves of a diode, etc.
Goal:
Models that are simple and allow the designer to understand the circuit
performance. 29
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Complexity in Analog
Design
Analog design is normally done in a non-hierarchical manner and makes
little use of repeated blocks. As a consequence, analog design can become
quite complex and challenging.
30
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Where Is Analog Ic Design
Today?
Analog IC Design has Reached Maturity
There are established fields of application:
• Digital-analog and analog-digital conversion
• Disk drive controllers
• Modems - filters
• Bandgap reference
• Analog phase lock loops
• DC-DC conversion
• Buffers
• Codecs
• Etc.
Existing philosophy regarding analog circuits:
“If it can be done economically by digital, don’t use
analog.” Consequently:
Analog finds applications where speed, area, or power
have advantages over a
digital approach. 31
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Analog IC Design
Challenges
Technology:
• Digital circuits have scaled well with technology
• Analog does not benefit as much from smaller features
- Speed increases
- Gain decreases
- Matching decreases
- Nonlinearity increases
- New issues appear such as gate current leakage
Analog Circuit Challenges:
• Trade offs are necessary between linearity, speed, precision and power
• As analog is combined with more digital, substrate interference will become worse
32
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Digitally Assisted Analog Circuits
Use digital circuits which work better at scaled technologies to improve analog
circuits that do not necessarily improve with technology scaling.
Principles and Techniques:
• Open-loop vs. closed loop
Open loop is less accurate but smaller Faster, less power
- Closed-loop is more accurate but larger Slower, more power
35
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
SUMMARY
• Successful analog IC design proceeds with understanding the circuit before simulation.
• Analog IC design consists of three major steps:
1) Electrical design Topology, W/L values, component values and dc currents
2) Physical design (Layout)
3) Test design (Testing)
• Analog designers must be flexible and have a skill set that allows one to simplify and
understand a complex problem
37
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
SPICE
Go to http://www.analog.com/LTspice
Left-Click on Download LTspice for Windows 7, 8 and 10
Follow the instructions to install
LTspice is a standalone application that runs on your computer
2500+
2500+macromodels
macromodelsofofLegacy
LegacyLinear
LinearTechnology
Technology
products
products
• Stable SPICE circuit simulation with: 1500+
1500+power
powerproducts
products
• Unlimited number of nodes 300+
300+Legacy
LegacyADI
ADIProducts
Products(power
(powerand
andamps)
amps)
• Schematic/symbol editor
• Waveform viewer
• Library of passive devices
• Steady state detection
• Turn on transient SPICE = Simulation Program with
• Step response Integrated Circuit Emphasis
• Efficiency / power computations
• Advanced analysis and simulation options
LTspice
LTspiceisisalso
alsoaagreat
greatschematic
schematiccapture
capture//BOM
BOMtool
tool
Blank schematic
a.k.a.
MasterPiece in progress
Move [F7]
Drag [F8]
Undo [F9]
Delete [Del] Redo [Shift+F9]
Duplicate [Ctrl+C] Rotate [Ctrl+R]
Paste b/t Schematics [Ctrl+V] Mirror [Ctrl+E]
Find [Ctrl+F] Place Comment/text [T]
Place SPICE directive [S]
But what
about
this?
This is the basic voltage source
menu. Use this for DC sources such
as power supplies or bias voltages.
2. Type
“Voltage”
3. Click “OK”
1. Select
“Wire” button
Left-Click ground “Pull” wire through the resistor “Pull” wire down through the capacitor
“Pull” wire up through the source Left-Click here to anchor Left-Click here to anchor & finish
Left-Click here to anchor
Hint:
Hint: Press
Pressthe
theESC
ESCkey
keyatatany
anytime
timetotoclean
cleanup
upthe
theschematic
schematic
1. Select “Label
Net”
2. Enter net
name
3. Place on wire
Right-click on
symbol
Or Right-click on
value
Hints
Use MEG (or meg) to specify 106, not
M
Enter 1 for 1 Farad, not 1F
►
►You
Youcan
canalso
alsoedit
editthe
thevisible
visibleattribute
attributeand
andlabel
labelby
bypointing
pointingatatthe
thetext
textwith
withthe
themouse
mouseand
andthen
thenright-
right-
clicking
clicking
►
►Mouse
Mousecursor
cursorwill
willturn
turninto
intoaatext
textcaret
caret
• Resistors, capacitors, inductors, diodes, Bipolar transistors, MOSFET transistors, JFET transistors,
Independent voltage and current sources
• You can access a database of known devices
Click
“Advanced”
Right-click source
• With the RC circuit in the active window, click on the RUN button on the toolbar
• The Edit Simulation Command window will appear. Set the Stop Time to 60m and click OK.
• Using the mouse, click on the IN node and OUT node to display the input and output voltage waveforms.
Run
Run
Click here for
output
waveform
RCFilterTimeDomain.asc
• To add a measurement cursor to the waveform window, left+click the mouse on the waveform name.
RCFilterTimeDomain.asc
RCFilterTimeDomain.asc
• Split the plot pane by selecting “Add Plot Pane” under the Plot Settings pull-down menu.
• Drag and drop the I(R1) waveform title into the new plot pane
RCFilterTimeDomain.asc
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Summary of the Waveform Viewer
Voltage probe
•
cursor
Plot the current through any component by clicking
on the body of the component
Current probe
cursor of
• When using the current probe, the convention
positive current is from netlist pin #1 to pin #2.
• Add a waveform measurement cursor by left+clicking on the
waveform name. Add a second measurement cursor by
left+clicking on the waveform name again.
-3dB point:
1/(2*pi*R*C) = 159Hz
AC amplitude of 1 sets
magnitude to 0dB
Right-click on .tran
command and select
“AC Analysis”
Right+click to
change the
component
value to {X}
Add
the .param
SPICE
directive (press
S on the keyboard)
• The simulation results are the same as when the component value was defined as 10K.
• The .STEP command can be used to vary a component variable over a range of values to plot a family of
curves.
• This is very powerful and can be used for sensitivity and Monte Carlo Analysis.
Right+click to
change SPICE
directive to
the .step
command
RCFilterACAnalysis_Step Command.asc
• Replaces the default SPICE node names with node names and waveform titles that are easy to understand and
remember
• Allows LTspice circuit nodes to match those on your production schematic, i.e. “TP15”
Without With
LTC3412A_DC_Load.asc
Alt-Left-
Click
Net
Highlighted
LTC3412A_DC_Load.asc
76
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
INTRODUCTION
• Currently, most of the signal processing is computed with digital circuits.
• Since the 80s billions of transistors integrated on a single chip are able to perform
billions of operations per second.
• Advantages of digital signal processing:
• Why do we need then mixed-signal
• Design simplicity.
circuits?
• Automatic design tools available. • Signal processing with sensors:
• Higher noise robustness.
• Compact circuits.
• Disadvantages of digital signal processing:
• Limited resolution.
• Discrete operation.
What is needed?
78
5
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Historcal Facts About MOSFET
• The surface controlled transistor has a very bad drift
• problem. We have been fooling with this problem for a
• long time and have no hope of an early solution. In fact,
• I am not sure I have a strong hope of an eventual solution.
• Gordon Moore
• Fairchild Progress Report, February 15, 1962
83
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Complementary MOSFET Structure
84
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
MOS Symbols
85
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Threshold Voltage
86
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Threshold Voltage
87
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Threshold Voltage
88
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Threshold Voltage
• Where
- ΦMS is the difference between the work functions of the
polysilicon gate and the silicon substrate.
- k is Boltzmann’s constant.
- q is the electron charge.
- Nsub is the doping density of the substrate.
- ni is the density of electrons in undoped silicon.
- Qdep is the charge in the depletion region.
- Cox is the gate oxide capacitance per unit area.
- єsi is the dielectric constant of silicon.
89
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Threshold Voltage
90
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Threshold Voltage
91
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
The Threshold Voltage
∅ 𝐹 𝑃 𝑜 𝑙surface
2. The externally applied gate voltage must be changed to
𝑦 𝑠 𝑖 𝑙 𝑖 𝑐 𝑜 𝑛 inversion, i.e., to change the surface
9
2
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
The Threshold Voltage
The body effect occurs in a MOSFET when the source is not tied to the substrate
(which is always connected to the most negative power supply in the integrated circuit
for n-channel devices and to the most positive for p-channel devices). The substrate
then acts as a “second gate” or a back-gate for the MOSFET
𝐶𝑜 𝑊𝐿 𝑄
=𝑥 𝑜
�
�
𝐶ℎ𝑎𝑟𝑔𝑒 𝑝𝑒𝑟 𝑢𝑛𝑖𝑡 𝐿𝑒𝑛𝑔𝑡ℎ =
𝑣
= 𝐶𝑜𝑥 𝑊𝑉𝑜𝑣
�
𝐿
�
𝑉𝐷
�
𝑆
𝐸𝑙𝑒𝑐𝑡𝑟𝑖𝑐 𝐹𝑖𝑒𝑙𝑑 𝑖𝑛
𝐶ℎ𝑎𝑛𝑛𝑒𝑙 =
𝑉𝐷𝑆 𝑛
𝑉𝑒𝑙𝑜𝑐𝑖𝑡𝑦 𝑜𝑓 𝐶ℎ𝑎𝑟𝑔𝑒 𝑖𝑛 𝐶ℎ𝑎𝑛𝑛𝑒𝑙(𝑣)
�
𝑛 µ�
=µ 𝐸 =
𝐶𝑢𝑟𝑟𝑒𝑛𝑡 𝑖𝑛 𝐶ℎ𝑎𝑛𝑛𝑒𝑙 (𝐼 ) 𝐶
𝑄 𝑉𝐷 𝑆 �
µ
𝐿 𝑜 𝑜
=𝑣∗ 𝑊𝑉
𝑛 *
𝑥 𝑣
�
𝐿
= µ𝑛𝐶𝑜𝑥𝑊(𝑉𝐺𝑆 −
�
𝐼𝐷
𝑉𝑇)𝑉𝐷𝑆 �
=
�
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
MOSFET Current
𝑉𝑜
𝑣
µ𝑛𝐶𝑜𝑥𝑊(𝑉𝐺𝑆 −
𝐼𝐷
𝑉𝑇)𝑉𝐷𝑆 �
= µ𝑛𝐶𝑜𝑥 𝑊𝑉
𝑇𝑟𝑎𝑛𝑠𝑐𝑜𝑛𝑑𝑢𝑐𝑡𝑎𝑛𝑐𝑒 𝑜𝑓
�
𝑜𝑣
�
𝐷
𝐶ℎ𝑎𝑛𝑛𝑒𝑙 𝑔 =
𝑆
𝑃𝑟𝑜𝑐𝑒𝑠𝑠 𝑡𝑟𝑎𝑛𝑠𝑐𝑜𝑛𝑑𝑢𝑐𝑡𝑎𝑛𝑐𝑒 𝑘 ′ 𝑊𝑉
�� = 𝑛
𝑉 �
𝑛
𝑝𝑎𝑟𝑎𝑚𝑒𝑡𝑒𝑟 𝑘 ′ = µ
�
𝑛𝐶 𝑜𝑥 �� 𝑜𝑣 𝐷𝑆
�
Saturation Region
𝑉 ) 2
𝐿
��
𝑘 ′ 𝑊(𝑉 −
�� = 𝑛 2 𝐺𝑆 𝑇
𝑉 ) 2
𝐿
��
• For
v DS vGS – V t
1 2 3 4 VGS 5
20 0
IDS (µA)
W=1 micron
10 L=10 microns
Vt0= 1 volt
Kn=2e-5 (A/v 2)
id
G D
• But the effective length of the channel decreases with increasing VDS
VG > Vt
VS = 0 VDS >> 0
+
L
L
n+ n+
VB = 0
KnW 2
iD -------- v GS – V t
sat = 2L – L
Vt0= 1 volt
60 Kn=2e-5 (A/v 2
)
VGS=2.5V phi =0.6
40 NA=1e15
VGS=2.0V
20
VGS=1.5V
0 VGS=1.0V
0 1 2 3 4
VDS 5
60
VGS=3.0V
50
W=1 micron
L=1 microns
IDS (µA)
40
Vt0= 1 volt
VGS =2.5V 2
Kn=2e-5 (A/v )
30
lambda =
0.8
20
VGS=2.0V
10
VGS=1.5V
0 VGS=1.0V
• We can add a resistor to model the channel length modulation effect for
the large-signal model in saturation
id
G D
+
2 ro
K vGS – Vt
_
–1 W 1
iDS = 2 –1
ro = K n 2L
- -- V GS – V t ------
v I Dsat
DS
107
Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
Drain current versus drain-source voltage for an n-channel MOS
transistor. The dashed curve shows the border between the
triode region and the active region
a) To perform DC operating point analysis, go to Edit and click on Spice Analysis. Select “dc op pnt” and type
.op (or Simply click on .op (right top corner) and type .op)
b) Next go to Simulate and click on Run
c) To see the DC operating points, go to View and click on SPICE Error Log (Shortcut: Ctrl + L)
λ Measurement
To measure λ you need to do a DC sweep of VDS
and plot ID as shown in Figure .
Each curve represents a different VGS value. Any
one of these curves can be used to calculate λ.
Make sure that VBS is 0V for this simulation. T
The formula for calculating λ given two points on
the saturation portion of a single curve is:
Knowing λ and VT0, KP can easily be found from the equation for
MOSFET drain current in the saturation region.
A little algebra gives that KP is
Rather than using a big (and expensive) resistor, let’s look at a NMOS
transistor as an active pullup device
Note that when the transistor is connected this way, it is not an amplifier, it is a two terminal device. When the
gate is connected to the drain of this NMOS device, it will be in saturation, so we get the equation for
the drain current
The I-V characteristic of this pull-up device:
Sensitivity:AN INITIATIVE
LNT Construction OF
Internal Use LARSEN & TOUBRO Industry-led | Real Cases | Engaging Pedagogy | Expert Faculty | Employability
DC Voltage Sources
A current mirror replicates the input current of a current sink or current source as
an output current. The output current may be identical to the input current or can
be a scaled version of it.
VT + VOV
VY = VT + VOV