Revolutionising B.

Tech
 Module 2: Data
Representation and
Operations
Course Name: Computer Architecture and
organization[22CSE104]
Total Hours : 8
Table of Content
• Aim
• Objectives
• Data Types
• Complements
• Fixed Point Representations
• Floating Point Representations
• Other Binary Codes
• Error Detection Codes
• Register Transfer Language
• Register Transfer
• Bus and Memory Transfers
• Arithmetic Microoperations
• Logic Microoperations
• Shift Microoperations
• Arithmetic Logic Shift Unit
Table of Content
• Self Assessments
• Activities
• Did You Know
• Summary
• Terminal Questions
Aim

To equip students in the fundamentals and

understanding the Concepts of Data Representation
and register and micro Operations.
 a. Discuss on the Data representation methods.
b. Understanding different Data types,
c. Understanding and practice of Register and Micro
operations

Objective
Register Transfer & -operations

SIMPLE DIGITAL SYSTEMS

• Combinational and sequential circuits

can be used to create simple digital systems.

• These are the low-level building blocks of a digital computer.

• Simple digital systems are frequently characterized in terms of

• the registers they contain, and
• the operations that they perform.

• Typically,
• What operations are performed on the data in the registers
• What information is passed between registers
DATA
REPRESENTATION

Data Types

Complements

Fixed Point Representations

Floating Point Representations

Other Binary Codes

Error Detection Codes

 DATA Data Types

REPRESENTATION

Information that a Computer is dealing with

* Data
- Numeric Data
Numbers( Integer, real)
- Non-numeric Data
Letters, Symbols

* Relationship between data elements

- Data Structures
Linear Lists, Trees, Rings, etc

* Program(Instruction)
 NUMERIC DATA Data Types
REPRESENTATION
Data
Numeric data - numbers(integer, real)
Non-numeric data - symbols, letters

Number System
Non positional number system
- Roman number system
Positional number system
- Each digit position has a value called a weight
associated with it
- Decimal, Octal, Hexadecimal, Binary
Base (or radix) R number
- Uses R distinct symbols for each digit
- Example AR = an-1 an-2 ... a1 a0 .a-1…a-m
n 1 Radix point(.) separates the integer
- V(AR ) = a R
i  m
i
i
portion and the fractional portion

R = 10 Decimal number system, R = 2 Binary

R = 8 Octal, R = 16 Hexadecimal
 Data Types
WHY POSITIONAL NUMBER SYSTEM IN THE DIGITAL
COMPUTERS ?

Major Consideration is the COST and TIME Binary Addition Table

- Cost of building hardware 0 1

0 0 1
Arithmetic and Logic Unit, CPU, Communications
- Time to processing 1 1 10

Arithmetic - Addition of Numbers - Table for Addition Decimal Addition Table

0 1 2 3 4 5 6 7 8 9

* Non-positional Number System 0 0 1 2 3 4 5 6 7 8 9

1 1 2 3 4 5 6 7 8 9 10
- Table for addition is infinite 2 2 3 4 5 6 7 8 9 1011
--> Impossible to build, very expensive even 3 3 4 5 6 7 8 9 101112
4 4 5 6 7 8 9 10111213
if it can be built 5 5 6 7 8 9 1011121314
6 6 7 8 9 101112131415
7 7 8 9 10111213141516
* Positional Number System 8 8 9 1011121314151617
- Table for Addition is finite 9 9 101112131415161718

--> Physically realizable, but cost wise

the smaller the table size, the less
expensive --> Binary is favorable to Decimal
 Data Types
REPRESENTATION OF NUMBERS
POSITIONAL NUMBERS

Decimal Binary Octal Hexadecimal

00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F

Binary, octal, and hexadecimal conversion

1 2 7 5 4 3 Octal
1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1 Binary
A F 6 3 Hexa
 CONVERSION OF Data Types
BASES

Base R to Decimal Conversion

A = an-1 an-2 an-3 … a0 . a-1 … a-m
V(A) =  ak Rk
(736.4)8 = 7 x 82 + 3 x 81 + 6 x 80 + 4 x 8-1
= 7 x 64 + 3 x 8 + 6 x 1 + 4/8 = (478.5)10
(110110)2 = ... = (54)10
(110.111)2 = ... = (6.785)10
(F3)16 = ... = (243)10
(0.325)6 = ... = (0.578703703 .................) 10
Decimal to Base R number
- Separate the number into its integer and fraction parts and convert
each part separately.
- Convert integer part into the base R number
--> successive divisions by R and accumulation of the remainders.
- Convert fraction part into the base R number
--> successive multiplications by R and accumulation of integer
digits
 Data Types

EXAMPLE
Fraction = 0.6875
Convert 41.687510 to base 2.
0.6875
Integer = 41 x 2
41 1.3750
20 1 x 2
10 0 0.7500
5 0 x 2
2 1 1.5000
1 0 x 2
0 1 1.0000
(41)10 = (101001)2 (0.6875) 10 = (0.1011)2

(41.6875)10 = (101001.1011)2

Exercise
Convert (63)10 to base 2: ?
Convert (1863)10 to base 8: ?
Convert (0.63671875)10 to hexadecimal: ?
 Complements

COMPLEMENT OF NUMBERS

Two types of complements for base R number system:

- R's complement and (R-1)'s complement

The (R-1)'s Complement

Subtract each digit of a number from (R-1)
Example
- 9's complement of 83510 is 16410
- 1's complement of 10102 is 01012(bit by bit complement operation)

The R's Complement

Add 1 to the low-order digit of its (R-1)'s complement

Example
- 10's complement of 83510 is 16410 + 1 = 16510
- 2's complement of 10102 is 01012 + 1 = 01102
 Fixed Point Representations

FIXED POINT NUMBERS

Numbers: Fixed Point Numbers and Floating Point Numbers

Binary Fixed-Point Representation

X = xnxn-1xn-2 ... x1x0. x-1x-2 ... x-m
Sign Bit(xn): 0 for positive - 1 for negative
Remaining Bits(xn-1xn-2 ... x1x0. x-1x-2 ... x-m)
- Following 3 representations
Signed magnitude representation
Signed 1's complement representation
Signed 2's complement representation

Example: Represent +9 and -9 in 7 bit-binary number

Only one way to represent +9 ==> 0 001001
Three different ways to represent -9:
In signed-magnitude: 1 001001
In signed-1's complement: 1 110110
In signed-2's complement: 1 110111

In general, in computers, fixed point numbers are represented

either integer part only or fractional part only.
CHARACTERISTICS OF 3 DIFFERENT Fixed Point Representations

REPRESENTATIONS
Complement
Signed magnitude: Complement only the sign bit
Signed 1's complement: Complement all the bits including sign bit
Signed 2's complement: Take the 2's complement of the number,

Maximum and Minimum Representable Numbers and Representation of Zero

Xincluding
= xn xn-1 ...itsx0sign
. x-1 bit.
... x-m

Signed Magnitude
Max: 2n - 2-m 011 ... 11.11 ... 1
Min: -(2n - 2-m) 111 ... 11.11 ... 1
Zero: +0 000 ... 00.00 ... 0
-0 100 ... 00.00 ... 0
Signed 2’s Complement
Signed 1’s Complement
Max: 2n - 2-m 011 ... 11.11 ... 1
Max: 2 - 2
n -m
011 ... 11.11 ... 1 Min: -2n 100 ... 00.00 ... 0
Min: -(2n - 2-m) 100 ... 00.00 ... 0 Zero: 0 000 ... 00.00 ... 0
Zero: +0 000 ... 00.00 ... 0
-0 111 ... 11.11 ... 1
 Fixed Point Representations
ARITHMETIC ADDITION: SIGNED
MAGNITUDE
[1] Compare their signs
[2] If two signs are the same ,
ADD the two magnitudes - Look out for an overflow
[3] If not the same , compare the relative magnitudes of the numbers and
then SUBTRACT the smaller from the larger --> need a subtractor to add
[4] Determine the sign of the result

6+9 -6 + 9
6 0110 9 1001
+) 9 1001 -)6 0110
15 1111 -> 01111 3 0011 -> 00011

6 + (- 9) -6 + (-9)
9 1001 6 0110
-) 6 0110 +) 9 1001
- 3 0011 -> 10011 -15 1111 -> 11111
Overflow 9 + 9 or (-9) + (-9)
9 1001
+) 9 1001
overflow (1)0010
ARITHMETIC ADDITION: SIGNED 2’s
Fixed Point Representations
COMPLEMENT

Add the two numbers, including their sign bit, and discard any carry out of
leftmost (sign) bit

Example
6 0 0110 -6 1 1010
+) 9 0 1001 +) 9 0 1001
15 0 1111 3 0 0011

6 0 0110 -9 1 0111
+) -9 1 0111 +) -9 1 0111
-3 1 1101 -18 (1)0 1110
x’n-1y’n-1sn-1
(cn-1  cn)
9 0 1001 overflow
+) 9 0 1001
18 1 0010 2 operands have the same sign
xn-1yn s’n-1 and the result sign changes
xn-1yn-1s’n-1 + x’n-1y’n-1sn-1
(cn-1  cn)
 ARITHMETIC ADDITION: SIGNED 1’s
Fixed Point Representations
COMPLEMENT

Add the two numbers, including their sign bits.

- If there is a carry out of the most significant (sign) bit, the result is
incremented by 1 and the
carry is discarded.

Example end-around carry

6 0 0110 -6 1 1001
+) -9 1 0110 +) 9 0 1001
-3 1 1100 (1) 0(1)0010
+) 1
3 0 0011
not overflow (cn-1  cn) = 0

-9 1 0110 9 0 1001
+) -9 1 0110 +) 9 0 1001
(1)0 1100 1 (1)0010
+) 1
0 1101
overflow
(cn-1  cn)
 Fixed Point Representations

COMPARISON OF REPRESENTATIONS

* Easiness of negative conversion

S + M > 1’s Complement > 2’s Complement

* Hardware

- S+M: Needs an adder and a subtractor for Addition

- 1’s and 2’s Complement: Need only an adder

* Speed of Arithmetic

2’s Complement > 1’s Complement(end-around C)

* Recognition of Zero

2’s Complement is fast

 ARITHMETIC Fixed Point Representations

SUBTRACTION

Arithmetic Subtraction in 2’s complement

Take the complement of the subtrahend (including the sign bit)

and add it to the minuend including the sign bits.

(A)-(-B) =( A)+ B
(A)- B=(A)+( -B)
 FLOATING POINT NUMBER Floating Point Representation

REPRESENTATION

* The location of the fractional point is not fixed to a certain location

* The range of the representable numbers is wide

F = EM

mn ekek-1 ... e0 mn-1mn-2 … m0 . m-1 … m-m

sign exponent mantissa

- Mantissa
Signed fixed point number, either an integer or a fractional number

- Exponent
Designates the position of the radix point

Decimal Value

V(F) = V(M) * RV(E) M: Mantissa

E: Exponent
R: Radix
 Floating Point Representation

FLOATING POINT NUMBERS

Example sign sign
0 .1234567 0 04
mantissa exponent
==> +.1234567 x 10+04
Note:
In Floating Point Number representation, only Mantissa(M) and
Exponent(E) are explicitly represented. The Radix(R) and the position
of the Radix Point are implied.

Example
A binary number +1001.11 in 16-bit floating point number representation
(6-bit exponent and 10-bit fractional mantissa)

0 0 00100 100111000
Sign Exponent Mantissa
or
0 0 00101 010011100
CHARACTERISTICS OF FLOATING POINT NUMBER
Floating Point Representation
REPRESENTATIONS

Normal Form

- There are many different floating point number representations of

the same number
--> Need for a unified representation in a given computer

- the most significant position of the mantissa contains a non-zero digit

Representation of Zero

- Zero
Mantissa = 0

- Real Zero
Mantissa = 0
Exponent
= smallest representable number
which is represented as
00 ... 0
<-- Easily identified by the hardware
INTERNAL REPRESENTATION AND EXTERNAL
REPRESENTATION

Another
Computer External
Representation

External Internal
Representation Human
Representation
CPU
Memory

External
Device Representation

External Representations Internal Representations

- Presentability - Efficiency
- Efficiency Memory space
Communication Processing time
Reliability - Easy to convert to
- Easy to handle external representation
- BCD, ASCII, EBCDIC - Fixed and Floating points
 External Representations

EXTERNAL REPRESENTATION
Numbers
Most of numbers stored in the computer are eventually changed
by some kinds of calculations
--> Internal Representation for calculation efficiency
--> Final results need to be converted to as External Representation
for presentability

Alphabets, Symbols, and some Numbers

Elements of these information do not change in the course of processing
--> No needs for Internal Representation since they are not used
for calculations
--> External Representation for processing and presentability
Decimal BCD Code
0 0000
1 0001
2 0010
Example 3 0011
Decimal Number: 4-bit Binary Code 4 0100
BCD(Binary Coded Decimal) 5 0101
6 0110
7 0111
8 1000
9 1001
 External Representations

OTHER DECIMAL CODES

Decimal BCD(8421) 2421 84-2-1 Excess-3

0 0000 0000 0000 0011
1 0001 0001 0111 0100
2 0010 0010 0110 0101
3 0011 0011 0101 0110
4 0100 0100 0100 0111
5 0101 1011 1011 1000
6 0110 1100 1010 1001
7 0111 1101 1001 1010 Note: 8,4,2,-2,1,-1 in this table is the weight
8 1000 1110 1000 1011 associated with each bit position.
9 1001 1111 1111 1100 d3 d2 d1 d0: symbol in the codes

BCD: d3 x 8 + d2 x 4 + d1 x 2 + d0 x 1
==> 8421 code.
2421: d3 x 2 + d2 x 4 + d1 x 2 + d0 x 1
84-2-1: d3 x 8 + d2 x 4 + d1 x (-2) + d0 x (-1)
Excess-3: BCD + 3
BCD: It is difficult to obtain the 9's complement.
However, it is easily obtained with the other codes listed above.
==> Self-complementing codes
 Other Binary codes

GRAY CODE
* Characterized by having their representations of the binary integers differ
in only one digit between consecutive integers

* Useful in analog-digital conversion.

Decimal Gray Binary

number g3 g 2 g 1 g 0 b 3 b2 b1 b0
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 1 0 0 1 0
3 0 0 1 0 0 0 1 1
4 0 1 1 0 0 1 0 0
4-bit Gray codes 5 0 1 1 1 0 1 0 1
6 0 1 0 1 0 1 1 0
7 0 1 0 0 0 1 1 1
8 1 1 0 0 1 0 0 0
9 1 1 0 1 1 0 0 1
10 1 1 1 1 1 0 1 0
11 1 1 1 0 1 0 1 1
12 1 0 1 0 1 1 0 0
13 1 0 1 1 1 1 0 1
14 1 0 0 1 1 1 1 0
15 1 0 0 0 1 1 1 1
 Other Binary codes

GRAY CODE - ANALYSIS

Letting gngn-1 ... g1 g0 be the (n+1)-bit Gray code

for the binary number bnbn-1 ... b1b0

gi = bi  bi+1 , 0  i  n-1
gn = bn Reflection of Gray codes
and
 0 0 0 0 00 0 000
bn-i = gn  gn-1  . . .  gn-i 1 0 1 0 01 0 001
bn = gn 1 1 0 11 0 011
1 0 0 10 0 010
1 10 0 110
1 11 0 111
1 01 0 101
Note: 1 00 0 100
1 100
The Gray code has a reflection property 1 101
- easy to construct a table without calculation, 1 111
- for any n: reflect case n-1 about a 1 010
1 011
mirror at its bottom and prefix 0 and 1 1 001
to top and bottom halves, respectively 1 101
1 000
 Other Binary codes

CHARACTER REPRESENTATION ASCII

ASCII (American Standard Code for Information Interchange) Code

MSB (3 bits)
0 1 2 3 4 5 6 7

LSB 0 NUL DLE SP 0 @ P ‘ P

(4 bits) 1 SOH DC1 ! 1 A Q a q
2 STX DC2 “ 2 B R b r
3 ETX DC3 # 3 C S c s
4 EOT DC4 $ 4 D T d t
5 ENQ NAK % 5 E U e u
6 ACK SYN & 6 F V f v
7 BEL ETB ‘ 7 G W g w
8 BS CAN ( 8 H X h x
9 HT EM ) 9 I Y I y
A LF SUB * : J Z j z
B VT ESC + ; K [ k {
C FF FS , < L \ l |
D CR GS - = M ] m }
E SO RS . > N m n ~
F SI US / ? O n o DEL
 Other Binary codes

CONTROL CHARACTER REPRESENTAION (ACSII)

NUL Null DC1 Device Control 1

SOH Start of Heading (CC) DC2 Device Control 2
STX Start of Text (CC) DC3 Device Control 3
ETX End of Text (CC) DC4 Device Control 4
EOT End of Transmission (CC) NAK Negative Acknowledge (CC)
ENQ Enquiry (CC) SYN Synchronous Idle (CC)
ACK Acknowledge (CC) ETB End of Transmission Block (CC)
BEL Bell CAN Cancel
BS Backspace (FE) EM End of Medium
HT Horizontal Tab. (FE) SUB Substitute
LF Line Feed (FE) ESC Escape
VT Vertical Tab. (FE) FS File Separator (IS)
FF Form Feed (FE) GS Group Separator (IS)
CR Carriage Return (FE) RS Record Separator (IS)
SO Shift Out US Unit Separator (IS)
SI Shift In DEL Delete
DLE Data Link Escape (CC)
(CC) Communication Control
(FE) Format Effector
(IS) Information Separator
 Error Detecting codes

ERROR DETECTING CODES

Parity System

- Simplest method for error detection

- One parity bit attached to the information
- Even Parity and Odd Parity

Even Parity
- One bit is attached to the information so that
the total number of 1 bits is an even number

1011001 0
1010010 1

Odd Parity
- One bit is attached to the information so that
the total number of 1 bits is an odd number

1011001 1
1010010 0
 PARITY BIT GENERATION

Access User Info

Parity Bit Generation

For b6b5... b0(7-bit information); even parity bit beven

Administrator
beven = b6  b5  ...  b0
Display Retrieve User Info
Account
User Profile
For odd parity bit Info

bodd = beven  1 = beven

User Account Info

Validate
Update
User Info
Enter/Update/ Delete
Update/Delete User Info
User Info
 Error Detecting codes

PARITY GENERATOR AND PARITY CHECKER

Parity Generator Circuit(even parity)

b6
b5 beven
b4
b3
b2
b1

b0
Parity Checker
beven
b6
b5
b4
b3
b2 Even Parity
b1 error indicator

b0
Register Transfer & -operations

REGISTER TRANSFER AND MICROOPERATIONS

• Register Transfer Language

• Register Transfer

• Bus and Memory Transfers

• Arithmetic Microoperations

• Logic Microoperations

• Shift Microoperations

• Arithmetic Logic Shift Unit

Register Transfer & -operations Register Transfer Language

MICROOPERATIONS (1)

• The operations on the data in registers are called

microoperations.
• The functions built into registers are examples of
microoperations
• Shift
• Load
• Clear
• Increment
• …
Register Transfer & -operations Register Transfer Language

MICROOPERATION (2)

An elementary operation performed (during

one clock pulse), on the information stored
in one or more registers

Registers ALU 1 clock cycle

(R) (f)

R  f(R, R)
f: shift, load, clear, increment, add, subtract, complement,
and, or, xor, …
Register Transfer & -operations Register Transfer Language

ORGANIZATION OF A DIGITAL SYSTEM

• Definition of the (internal) organization of a computer

- Set of registers and their functions

- Microoperations set

Set of allowable microoperations provided

by the organization of the computer

- Control signals that initiate the sequence of

microoperations (to perform the functions)
Register Transfer & -operations Register Transfer Language

REGISTER TRANSFER LEVEL

• Viewing a computer, or any digital system, in this

way is called the register transfer level

• This is because we’re focusing on

• The system’s registers
• The data transformations in them, and
• The data transfers between them.
Register Transfer & -operations Register Transfer Language

REGISTER TRANSFER LANGUAGE

• Rather than specifying a digital system in words, a specific

notation is used, register transfer language

• For any function of the computer, the register transfer

language can be used to describe the (sequence of)
microoperations

• Register transfer language

• A symbolic language
• A convenient tool for describing the internal organization of digital
computers
• Can also be used to facilitate the design process of digital systems.
Register Transfer & -operations Register Transfer Language

DESIGNATION OF REGISTERS

• Registers are designated by capital letters, sometimes

followed by numbers (e.g., A, R13, IR)
• Often the names indicate function:
• MAR - memory address register
• PC - program counter
• IR - instruction register

• Registers and their contents can be viewed and

represented in various ways
• A register can be viewed as a single entity:

MAR

• Registers may also be represented showing the bits of data they

contain
Register Transfer & -operations Register Transfer Language

DESIGNATION OF REGISTERS

• Designation of a register
- a register
- portion of a register
- a bit of a register

• Common ways of drawing the block diagram of a register

Register Showing individual bits

R1 7 6 5 4 3 2 1 0
15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields
Register Transfer & -operations Register Transfer

REGISTER TRANSFER

• Copying the contents of one register to another is a register

transfer

• A register transfer is indicated as

R2  R1

• In this case the contents of register R2 are copied

(loaded) into register R1
• A simultaneous transfer of all bits from the source R1 to
the destination register R2, during one clock
pulse
• Note that this is a non-destructive; i.e. the contents of
R1 are not altered by copying (loading) them to R2
Register Transfer & -operations Register Transfer

REGISTER TRANSFER

• A register transfer such as

R3  R5

Implies that the digital system has

• the data lines from the source register (R5) to the

destination register (R3)
• Parallel load in the destination register (R3)
• Control lines to perform the action
Register Transfer & -operations Register Transfer

CONTROL FUNCTIONS

• Often actions need to only occur if a certain condition is

true
• This is similar to an “if” statement in a programming
language
• In digital systems, this is often done via a control signal,
called a control function
• If the signal is 1, the action takes place
• This is represented as:

P: R2  R1

Which means “if P = 1, then load the contents of register

R1 into register R2”, i.e., if (P = 1) then (R2  R1)
Register Transfer & -operations Register Transfer
HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS

Implementation of controlled transfer

P: R2 R1

Block diagram Control P Load

R2 Clock
Circuit
n
R1

Timing diagram t t+1

Clock

Load
Transfer occurs here

• The same clock controls the circuits that generate the control function
and the destination register
• Registers are assumed to use positive-edge-triggered flip-flops
Register Transfer & -operations Register Transfer

SIMULTANEOUS OPERATIONS

• If two or more operations are to occur

simultaneously, they are separated with commas

P: R3  R5, MAR  IR

• Here, if the control function P = 1, load the

contents of R5 into R3, and at the same time
(clock), load the contents of register IR into
register MAR
Register Transfer & -operations Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols Description Examples

Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)

Arrow  Denotes transfer of information R2  R1

Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A  B, B 
A
Register Transfer & -operations Register Transfer

CONNECTING REGISTERS

• In a digital system with many registers, it is impractical

to have data and control lines to directly allow each
register to be loaded with the contents of every
possible other registers

• To completely connect n registers  n(n-1) lines

• O(n2) cost
• This is not a realistic approach to use in a large digital system

• Instead, take a different approach

• Have one centralized set of circuits for data transfer –
the bus
• Have control circuits to select which register is the
source, and which is the destination
Register Transfer & -operations Bus and Memory Transfers

BUS AND BUS TRANSFER

Bus is a path(of a group of wires) over which information is transferred, from
any of several sources to any of several destinations.
From a register to bus: BUS  R
Register A Register B Register C Register D

Bus lines

Register A Register B Register C Register D

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

B1 C1 D 1 B2 C2 D 2 B3 C3 D 3 B4 C4 D 4

0 0 0 0
4 x1 4 x1 4 x1 4 x1
MUX MUX MUX MUX

x
select
y

4-line bus
Register Transfer & -operations Bus and Memory Transfers

TRANSFER FROM BUS TO A DESTINATION REGISTER

Bus lines

Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D 0 D1 D2 D 3
z E (enable)
Select 2x4
w
Decoder

Three-State Bus Buffers

Normal input A Output Y=A if C=1
High-impedence if C=0
Control input C

Bus line with three-state buffers

Bus line for bit 0
A0
B0
C0
D0

S0 0
Select 1
S1 2
Enable 3
Register Transfer & -operations Bus and Memory Transfers

BUS TRANSFER IN RTL

• Depending on whether the bus is to be mentioned

explicitly or not, register transfer can be indicated as
either
R2 R1
or
BUS R1, R2  BUS

• In the former case the bus is implicit, but in the latter, it

is explicitly indicated
Register Transfer & -operations Bus and Memory Transfers

MEMORY (RAM)
• Memory (RAM) can be thought as a sequential circuits
containing some number of registers
• These registers hold the words of memory
• Each of the r registers is indicated by an address
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data data input lines
• Assume the RAM contains r = 2k words. It needs the
n
following
• n data input lines address lines
• n data output lines k
RAM
• Read
k address lines unit
• A Read control line Write
• A Write control line n
data output lines
Register Transfer & -operations Bus and Memory Transfers

MEMORY TRANSFER
• Collectively, the memory is viewed at the register level
as a device, M.
• Since it contains multiple locations, we must specify
which address in memory we will be using
• This is done by indexing memory references

• Memory is usually accessed in computer systems by

putting the desired address in a special register, the
Memory Address Register (MAR, or AR)
• When memory is accessed, the contents of the MAR get
sent to the memory unit’s address lines
M
Memory Read
AR
unit Write

Data out Data in

Register Transfer & -operations Bus and Memory Transfers

MEMORY READ

• To read a value from a location in memory and load it

into a register, the register transfer language notation
looks like this:
R1  M[MAR]

• This causes the following to occur

• The contents of the MAR get sent to the memory address lines
• A Read (= 1) gets sent to the memory unit
• The contents of the specified address are put on the memory’s
output data lines
• These get sent over the bus to be loaded into register R1
Register Transfer & -operations Bus and Memory Transfers

MEMORY WRITE

• To write a value from a register to a location in memory

looks like this in register transfer language:

M[MAR]  R1

• This causes the following to occur

• The contents of the MAR get sent to the memory address lines
• A Write (= 1) gets sent to the memory unit
• The values in register R1 get sent over the bus to the data input
lines of the memory
• The values get loaded into the specified address in the memory
Register Transfer & -operations Bus and Memory Transfers

SUMMARY OF R. TRANSFER MICROOPERATIONS

A B Transfer content of reg. B into reg. A

AR DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A  constant Transfer a binary constant into reg. A
ABUS  R1, Transfer content of R1 into bus A and, at the same time,
R2 ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR  M Memory read operation: transfers content of
memory word specified by AR into DR
M  DR Memory write operation: transfers content of
DR into memory word specified by AR
Register Transfer & -operations Arithmetic Microoperations

MICROOPERATIONS

• Computer system microoperations are of four types:

- Register transfer microoperations

- Arithmetic microoperations
- Logic microoperations
- Shift microoperations
Register Transfer & -operations Arithmetic Microoperations

ARITHMETIC MICROOPERATIONS
• The basic arithmetic microoperations are
• Addition
• Subtraction
• Increment
• Decrement

• The additional arithmetic microoperations are

• Add with carry
• Subtract with borrow
• Transfer/Load
• etc. …

Summary of Typical Arithmetic Micro-Operations

R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
Register Transfer & -operations Arithmetic Microoperations

BINARY ADDER / SUBTRACTOR / INCREMENTER

B3 A3 B2 A2 B1 A1 B0 A0

Binary Adder C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0

C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

Binary Incrementer A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0
Register Transfer & -operations Arithmetic Microoperations

ARITHMETIC CIRCUIT
Cin
S1
S0
A0 X0 C0
S1 D0
S0 FA
B0 0 4x1 Y0 C1
1 MUX
2
3
A1 X1 C1
S1 FA D1
S0
B1 0 4x1 Y1 C2
1 MUX
2
3
A2 X2 C2
S1 FA D2
S0
B2 0 4x1 Y2 C3
1 MUX
2
3
A3 X3 C3
S1 D3
S0 FA
B3 0 4x1 Y3 C4
1 MUX
2
3 Cout
0 1

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A
Register Transfer & -operations Logic Microoperations

LOGIC MICROOPERATIONS
• Specify binary operations on the strings of bits in registers
• Logic microoperations are bit-wise operations, i.e., they work on the
individual bits of data
• useful for bit manipulations on binary data
• useful for making logical decisions based on the bit value
• There are, in principle, 16 different logic functions that
can be defined over two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

• However, most systems only implement four of these

• AND (), OR (), XOR (), Complement/NOT
• The others can be created from combination of these
Register Transfer & -operations Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

• List of Logic Microoperations
- 16 different logic operations with 2 binary vars.
n
- n binary vars → 2 2 functions

• Truth tables for 16 functions of 2 variables and the

corresponding 16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy F AB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y F AB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's
Register Transfer & -operations Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

Ai
0
Bi

1
4X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement
Register Transfer & -operations Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

• Logic microoperations can be used to manipulate
individual bits or a portions of a word in a register

• Consider the data in a register A. In another register, B, is

bit data that will be used to modify the contents of A

• Selective-set A  A+B
• Selective-complement A  AB
• Selective-clear A  A • B’
• Mask (Delete) A  A•B
• Clear A  AB
• Insert A  (A • B) + C
• Compare A  AB
• ...
Register Transfer & -operations Logic Microoperations

SELECTIVE SET

• In a selective set operation, the bit pattern in B is used to

set certain bits in A

1 1 0 0 At
1 0 1 0B
1 1 1 0 At+1 (A  A + B)

• If a bit in B is set to 1, that same position in A gets set to

1, otherwise that bit in A keeps its previous value
Register Transfer & -operations Logic Microoperations

SELECTIVE COMPLEMENT

• In a selective complement operation, the bit pattern in B

is used to complement certain bits in A

1 1 0 0 At
1 0 1 0B
0 1 1 0 At+1 (A  A  B)

• If a bit in B is set to 1, that same position in A gets

complemented from its original value, otherwise it is
unchanged
Register Transfer & -operations Logic Microoperations

SELECTIVE CLEAR

• In a selective clear operation, the bit pattern in B is used

to clear certain bits in A

1 1 0 0 At
1 0 1 0B
0 1 0 0 At+1 (A  A  B’)

• If a bit in B is set to 1, that same position in A gets set to

0, otherwise it is unchanged
Register Transfer & -operations Logic Microoperations

MASK OPERATION

• In a mask operation, the bit pattern in B is used to clear

certain bits in A

1 1 0 0 At
1 0 1 0B
1 0 0 0 At+1 (A  A  B)

• If a bit in B is set to 0, that same position in A gets set to

0, otherwise it is unchanged
Register Transfer & -operations Logic Microoperations

CLEAR OPERATION

• In a clear operation, if the bits in the same position in A

and B are the same, they are cleared in A, otherwise they
are set in A

1 1 0 0 At
1 0 1 0B
0 1 1 0 At+1 (A  A  B)
Register Transfer & -operations Logic Microoperations

INSERT OPERATION
• An insert operation is used to introduce a specific bit pattern
into A register, leaving the other bit positions unchanged
• This is done as
• A mask operation to clear the desired bit positions,
followed by
• An OR operation to introduce the new bits into the
desired positions
• Example
• Suppose you wanted to introduce 1010 into the low
order four bits of A: 1101 1000 1011 0001 A
(Original) 1101 1000
1011 1010 A (Desired)

• 1101 1000 1011 0001 A (Original)

1111 1111 1111 0000 Mask
1101 1000 1011 0000 A
(Intermediate)
0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)
Register Transfer & -operations Shift Microoperations

SHIFT MICROOPERATIONS
• There are three types of shifts
• Logical shift
• Circular shift
• Arithmetic shift
• What differentiates them is the information that goes
into the serial input

• A right shift operation

Serial
input

Serial
• A left shift operation input
Register Transfer & -operations Shift Microoperations

LOGICAL SHIFT
• In a logical shift the serial input to the shift is a 0.

• A right logical shift operation:

0

• A left logical shift operation: 0

• In a Register Transfer Language, the following notation is used

• shl for a logical shift left
• shr for a logical shift right
• Examples:
• R2  shr R2
• R3  shl R3
Register Transfer & -operations Shift Microoperations

CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted
out of the other end of the register.

• A right circular shift operation:

• A left circular shift operation:

• In a RTL, the following notation is used

• cil for a circular shift left
• cir for a circular shift right
• Examples:
• R2  cir R2
• R3  cil R3
Register Transfer & -operations Shift Microoperations

ARITHMETIC SHIFT
• An arithmetic shift is meant for signed binary numbers
(integer)
• An arithmetic left shift multiplies a signed number by two
• An arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must
keep the sign of the number the same as it performs the
multiplication or division
• A right arithmetic shift operation:

sign
bit

• A left arithmetic shift operation:

0
sign
bit
Register Transfer & -operations Shift Microoperations

ARITHMETIC SHIFT
• An left arithmetic shift operation must be checked for the
overflow
0
sign
bit

Before the shift, if the leftmost two

V bits differ, the shift will result in an
overflow

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3
Register Transfer & -operations Shift Microoperations

HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

0 for shift right (down)

Serial Select
input (IR) 1 for shift left (up)

S
MUX H0
0
1
A0

A1 S
MUX H1
0
A2 1

A3
S
MUX H2
0
1

S
MUX H3
0
1

Serial
input (IL)
Register Transfer & -operations Shift Microoperations

ARITHMETIC LOGIC SHIFT UNIT

S3
S2 Ci
S1
S0

Arithmetic D i
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi
Ai
Circuit
Ai-1 shr
Ai+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F=A+B+1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=AB XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F
Did You Know?
1. Data representation in COA is important because it affects the performance
and efficiency of the computer system.
2. Efficient data representation can reduce the amount of memory required to
store data, and can improve the speed at which data is processed and
transmitted.
3. Additionally, understanding data representation is essential for writing
efficient and error-free code in programming languages that interact with the
computer's hardware.
4. Error detection codes are an important part of COA because they help
ensure the integrity of data during transmission or storage.
5. By detecting errors early on, these codes can help prevent data corruption
and improve the reliability and performance of computer systems.
6. A register is a group of flip-flops used to store binary information within a
digital system. Registers are used to hold data temporarily, to enable
processing, or to store data between different operations within a system.
Registers are also used to hold addresses and control signals in
microprocessors.
7. Micro-operations are combined to form complex operations and instructions
that are executed by microprocessors. The design and implementation of
Summary

Outcomes:
a. Discuss the theory Data Representation methods
b. Discuss the impact of data types and register data
transfer operations on computing system performance.
c. Illustrate the different error detection codes
Terminal Questions
1) What are the different data types?
2) What are the different Arithmetic Micro operations, logic micro operations, Shift micro
operations?
Reference Links

• https://www.geekforgeeks.org/computer organization
Reference Material:
• M. Moris Mano, “Computer Systems Architecture”, 4th Edition, Pearson/PHI,
ISBN:10:0131755633
Thank you