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Digital coding and logic signals

This document covers various digital coding methods and logic signals, including Binary Coded Decimal (BCD), Gray Code, ASCII, and Unicode, along with error detection techniques like Parity and Cyclic Redundancy Check (CRC). It discusses the representation of logic levels, noise margins, and the importance of logic gates in digital electronics. Additionally, it explains the concepts of timing diagrams and truth tables in relation to logic circuits.

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0% found this document useful (0 votes)
11 views52 pages

Digital coding and logic signals

This document covers various digital coding methods and logic signals, including Binary Coded Decimal (BCD), Gray Code, ASCII, and Unicode, along with error detection techniques like Parity and Cyclic Redundancy Check (CRC). It discusses the representation of logic levels, noise margins, and the importance of logic gates in digital electronics. Additionally, it explains the concepts of timing diagrams and truth tables in relation to logic circuits.

Uploaded by

thenuramail99
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 52

IE2010 – Digital

Electronics
LECTURE 2 – DIGITAL CODING AND LOGIC SIGNALS
This week
Binary Coded Decimal (BCD)
The Gray Code
ASCII Code
Unicode
Parity Method for Error Detection
Cyclic Redundancy Check (CRC)
Logic Levels
Noise Margins
Logic Signals
Introduction to Logic Gates

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Binary Coded Decimal (BCD)
Each decimal digit is represented by a 4bit binary number.
o 0 - 0000
o 1 - 0001
o 2 - 0010
o 3 - 0011
o 4 - 0100
o 5 - 0101
o 6 - 0110
o 7 - 0111
o 8 - 1000
o 9 - 1001

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Binary Coded Decimal (BCD)
cntd.
There are 16 combinations which could be realized from 4 binary digits.
However, following binary combinations are considered to be invalid since they do not represent
numbers from 0 to 9.
◦ 1010, 1011, 1100, 1101, 1110, 1111

BCD is used in keyboards inputs, digital readouts, binary to seven segment decoders and etc.

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Pros and Cons of BCD
Advantage: easy to convert
Disadvantage: takes more bits to store a number

255 = 1111 1111 = FF (binary code)


255 = 0010 0101 0101 = 255 (BCD code)
takes only 8 bits in binary, takes 12 bits in BCD.

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BCD Conversion Examples
8421
8 4 2 1

1000 0100 0010 0001

1001000001100111
Put into groups of 4 digits starting from the LSB. Padded with front zeros for MSB to make 4 digit group
1001 0000 0110 0111

9 0 6 7
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BCD Addition
BCD addition is similar to binary addition if the sum of the two digits which are being added is
less than or equal to 9.
Example: 0001010101101001 + 0100001000110000
0001 0101 0110 1001
+0100 +0010 +0011 +0000
0101 0111 1001 1001

Notice that all the numbers are less than or equal to 9

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BCD Addition cntd.
If the sum of the two digits which are being added is greater than 9, a 6(binary – 0110) is added
to the invalid code and a 1(binary - 0001) is carried to the neighboring number .

0001 0001 0100 1001


+0101 +0100 +0011 +0100
0110 0101 0111 1101 Greater
than 9
Carry 1 +0001 +0110 +6
0110 0101 1000 10011

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The Gray Code
Gray code is a special non-numeric coding method used in digital
applications.
Also called a ‘thumbwheel’ code because a thumbwheel for choosing
a decimal digit can only change to an adjacent value with each click
of the thumbwheel
This allows the binary output of the thumbwheel to only change one
bit at a time;
Can help reduce circuit complexity and also reduce signal noise

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A mechanical disk for
gray code

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Gray code example
Check below an example of a 4-bit gray code.

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The Gray Code cntd.
The most important feature of the gray code is that it exhibits only a single bit
change from one code to the next in sequence.
This property is very important in applications like shaft position encoders,
where error susceptibility increases with the number of bit changes between
adjacent numbers in the sequence.
Gray code is not an arithmetic code because there are no weights assigned to
each bit position in Gray Code.

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Binary to Gray Code Conversion
1. The most significant bit (left-most) in the Gray code is the same as the corresponding MSB in
the binary number.
2. Going from left to right, add each adjacent pair of binary code bits to get the next Gray code
bit. Discard carries.

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Gray Code to Binary Conversion
1. The most significant bit (left-most) in the binary code is the same as the corresponding bit in
the Gray code.
2. Add each binary code bit generated to the Gray code bit in the next adjacent position.
Discard carries.

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ASCII Code
ASCII is the abbreviation for American Standard Code for Information Interchange.
ASCII is a universally accepted alphanumeric code used in most computers and other electronic
equipment.
ASCII has 128 characters and symbols represented by a 7-bit binary code ( 27=128) .
Typically 8 bits are actually used with the 8th bit being zero or used for error detection (parity
checking)
This is enough to represent the Latin alphabet, A-Z, a-z, 0-9, punctuation marks, some symbols
like $.
The first thirty-two codes in the ASCII table represent the control characters that are used to
issue control commands between two devices communicating via ASCII coding.

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Unicode
UNICODE is a 16-bit code for representing alphanumeric data.
With 16 bits, can represent 216 or 65536 different symbols.
16 bits = 2 Bytes per character.
◦ $0041-005A A-Z $0061-4007A a-z
Some other alphabet/symbol ranges
◦ $3400-3d2d Korean Hangul Symbols
◦ $3040-318F Hiranga, Katakana, Bopomofo, Hangul
◦ $4E00-9FFF Han (Chinese, Japenese, Korean)
UNICODE is used by Web browsers, Java, most software these days.

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Error Codes
Error coding methods are useful in detecting errors occurred during the transmission of binary
data over a network medium.
1. Parity Check
2. Cyclic Redundancy Check
3. Hamming Code (Not Discussed in lecture)

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Parity Method for Error Detection
Many systems use a parity bit as a means for bit error detection.
Any group of bits contain either an even or an odd number of 1s.
A parity bit is attached to a group of bits to make the total number of 1s in a group always even
or always odd.
An even parity bit makes the total number of 1s even, and an odd parity bit makes the total odd.
A given system operates with even or odd parity, but not both.

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Parity Check

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Error Detection with Parity
Check
Consider a communication system which uses Even parity check.
BCD Code BCD Code

00101 00001

Parity Bit Parity Bit

Parity Check : PASS Parity Check : FAIL

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Cyclic Redundancy Check (CRC)
The cyclic redundancy check (CRC) is used for detecting transmission errors when digital data
are transferred on a communication link.
In CRC, a certain number of check bits, sometimes called a checksum, are appended to the data
bits that are being transmitted.
The transmitted data are tested by the receiver for errors using the CRC.
CRC cannot detect every possible error, but is much more efficient than the parity check.

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Modulo-2 Operation
Simply put, CRC is based on the division of two binary numbers.
Binary division is just a series of subtractions and shifts.
For the subtraction, modulo-2 operations could be used.
A simple rule for modulo-2 is that the output is 1 if the inputs are different; otherwise, it is 0.

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CRC Process
1. Select a fixed generator code; it can have fewer bits than the data bits to be checked. This code is
understood in advance by both the sending and receiving devices and must be the same for both.

2. Append a n-1 0s to the data bits where the number of bits in the generator code is n.
3. Divide the data bits including the appended bits by the generator code bits using modulo-2.
4. If the remainder is 0, the data and appended bits are sent as is.
5. If the remainder is not 0, the appended bits are made equal to the remainder bits in order to get a 0
remainder before data are sent.
6. At the receiving end, the receiver divides the incoming appended data bit code by the same
generator code as used by the sender.
7. If the remainder is 0, there is no error detected (it is possible in rare cases for multiple errors to
cancel). If the remainder is not 0, an error has been detected in the transmission and a retransmission
is requested by the receiver.

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CRC Example
Determine the transmitted CRC for the following byte of data (D) and generator code (G). Verify
that the remainder is 0.
◦ D: 11010011
◦ G: 1010

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CRC Example cntd.
Since the generator code has 4 data bits, add three (4-1) 0s (blue) to the data byte. The
appended data (D’) is

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CRC Example cntd.
Divide the appended data by the generator code (red) using the modulo-2 operation until all bits
have been used.

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CRC Example cntd.
Remainder = 010. Since the remainder is not 0, append the data with the three remainder bits
(blue). Then divide by the generator code (red). The transmitted CRC is 11010011010.

Remainder = 0

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Logic Levels
Binary logic contains two logic levels.
◦ HIGH (1)
◦ LOW (0)

Ideally, logic levels are represented by two distinct voltage levels.


Practically, we cannot always achieve a given voltage level to represent a logic level in a digital
circuit.
External factors like noise, efficiency of the power supply affect the voltage levels in a digital
circuit.
Hence the HIGH and LOW logic levels are defined as two distinct ranges, instead of defining
them as two distinct voltage levels.

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Logic Levels cntd.

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Logic Levels cntd.
Any voltage between VH(min) and VH(max) are accepted as logic HIGH.
Any voltage between VL(min) and VL(max) are accepted as logic LOW.
Any voltage between VL(max) and VH(min) are considered as unacceptable to any logic level.

The actual voltage level used for the logic HIGH depends on the nominal supply voltage of the
IC/ microcontroller.
The most common logic HIGH voltage levels seen in ICs are 3.3 V and 5 V.

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Noise Margins
The logic level ranges for input pins and output pins are different in a logic IC.
The output of a logic IC needs to be accurate as possible.
Hence the variation of logic level voltage is minimized in output pins.
The input pins of a logic IC needs to be sensitive enough to capture the distorted/ attenuated
logic signals.
Hence the variation of logic level voltage is maximized in input pins.

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Noise Margins cntd.

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Noise Margins cntd.
VOH– Lowest Acceptable Output HIGH Voltage
VOL – Highest Acceptable Output LOW Voltage
VIH – Lowest Acceptable Input HIGH Voltage
VIL – Highest Acceptable Input LOW Voltage

High Noise Margin (NMH) = VOH - VIH


Low Noise Margin (NML) = VIL - VOL

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Noise Margins cntd.
Worst Case Output Signal Worst Case Input Signal

Addition
of Noise
Noise Margins

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Logic Signals
Information is represented as 1s and 0s digital systems.
This information is transmitted as binary waveforms or binary signals.
Logic signals can be periodic or non-periodic.

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Logic Signals cntd.

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Period, Frequency and Duty
Cycle
Period =T
Frequency = 1/T
Duty Cycle = (tw / T) x 100%

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Clock Signals
In digital systems, all waveforms are synchronized with a basic timing waveform
called the clock.
The clock is a periodic waveform in which each interval between pulses (the
period) equals the time for one bit.

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Timing Diagrams
A timing diagram is a graph of digital waveforms showing the actual time
relationship of two or more waveforms and how each waveform changes in
relation to the others.

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Logic gates
Logic gates are the fundamental building blocks of digital electronics
The Digital World is a world of ones (1’s) and zeros (0’s). It utilizes circuits
that are ON or OFF, logic conditions that are TRUE or FALSE and voltages
that are HIGH or LOW.
Positive Logic: Logic 1 is represented by more positive voltage.
◦ +5V = logic 1
◦ 0V = logic 0

Negative Logic : Logic 1 is represented by more negative voltage.


◦ +5V = logic 0
◦ 0V = logic 1

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Logic gates cntd.
Logic 1 and logic 0 represent TRUE and FALSE conditions.
◦ Eg: If the logic variable A= “door is closed”, then A=1 means that the door
is closed and A=0 means that the door is not closed.

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Truth table
A table that lists all the possible combinations of input variables and the
corresponding outputs is called a “Truth Table”.
It shows how the logic circuits output responds to various combinations of logic
levels at the inputs

Switch 1 Switch 1 Switch 2 Output

Output OFF OFF OFF

Switch 2 OFF ON GLOW


ON OFF GLOW
ON ON GLOW

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NOT Gate
Input Output
𝒙= 𝑨
0 1
1 0

Timing Diagram

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AND Gate
𝒙= 𝑨 . 𝑩
A B X
0 0 0
0 1 0
1 0 0
1 1 1

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OR Gate
𝒙= 𝑨+𝑩
A B X
0 0 0
0 1 1
1 0 1
1 1 1

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Universal Gates
NAND and NOR gates are known as universal gates.
The universal gates can be arranged in different ways to implement any other logic gate.

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NAND Gate
𝒙= 𝑨 . 𝑩
A B X
0 0 1
0 1 1
1 0 1
1 1 0

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NOR Gate
𝒙= 𝑨+𝑩
A B X
0 0 1
0 1 0
1 0 0
1 1 0

49
XOR Gate
𝒙= 𝑨⊕ 𝑩
A B X
0 0 0
0 1 1
1 0 1
1 1 0

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XNOR Gate
𝒙= 𝑨⊕ 𝑩
A B X
0 0 1
0 1 0
1 0 0
1 1 1

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Thank you

06/02/2025 52

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