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Memory Interfacing in 8051

External memory interfacing in the 8051 microcontroller connects additional RAM and ROM to enhance memory capacity for complex programs and data storage. It utilizes dedicated pins and control signals for data flow management, addressing the limitations of the microcontroller's internal memory. Techniques like absolute and linear decoding are employed for memory address selection, allowing for flexible and cost-effective system designs.

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S SIVA KOHILA
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8 views23 pages

Memory Interfacing in 8051

External memory interfacing in the 8051 microcontroller connects additional RAM and ROM to enhance memory capacity for complex programs and data storage. It utilizes dedicated pins and control signals for data flow management, addressing the limitations of the microcontroller's internal memory. Techniques like absolute and linear decoding are employed for memory address selection, allowing for flexible and cost-effective system designs.

Uploaded by

S SIVA KOHILA
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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MEMORY INTERFACING IN

8051
What is External Memory Interfacing?

 External memory interfacing in 8051 microcontroller involves connecting


external memory devices such as RAM and ROM to the microcontroller
to provide additional memory space.
 This allows the microcontroller to execute larger and more complex
programs, store more data, and perform more complex operations.
 External memory interfacing typically involves connecting the memory
devices to the microcontroller through a data bus and an address bus.
 The data bus is used to transfer data between the microcontroller and
the memory device, while the address bus is used to select a specific
memory location in the memory device.
PINS/CONTROL SIGNALS INVOLVED

 To interface with external memory, the 8051 microcontroller uses


dedicated pins such as
ALE (Address Latch Enable),
PSEN (Program Store Enable), and
RD (Read) and WR (Write) signals.
 These signals are used to control the flow of data between the
microcontroller and the external memory device.
Why memory interfacing is
needed???
External memory interfacing is necessary in the 8051 microcontroller for several reasons:
 Limited internal memory: The 8051 microcontroller has a limited amount of internal
memory, including 128 bytes of RAM and 4KB of on-chip ROM. This memory may not be
sufficient for some applications that require larger program memory or more data storage.
 Larger programs: For applications that require larger programs, such as complex algorithms
or multiple functions, external memory interfacing can provide the necessary program
memory space to store these programs.
 Data storage: Applications that require the storage of large amounts of data, such as data
logging or data analysis, may require external memory interfacing to store the data.
 Flexibility: External memory interfacing provides greater flexibility in the design of
embedded systems, allowing for customization and adaptability to meet specific application
requirements.
 Cost-effective: External memory devices such as RAM and ROM are relatively inexpensive,
making it cost-effective to interface them with the microcontroller instead of using more
expensive on-chip memory.
8051 to ROM INTERFACING
8051 TO RAM
COMPONENTS OF MEMORY
INTERFACING
The memory interfacing requires to following components as follows.
 Select the chip.
 Identify the register.
 Enable the appropriate buffer.
MEMORY ADDRESS DECODING

 ABSOLUTE DECODING

 LINEAR DECODING
ABSOLUTE DECODING
 In this technique, all the higher address lines are decoded to select the memory chip,
and the memory chip is chosen only for the logic levels defined in these high-order
address lines and no other logic levels will select the chip.
LINEAR DECODING

 Linear decoding –
 Individual high-order address lines can be used to pick memory chips in
compact systems, eliminating the need for hardware for decoding logic. Linear
decoding is the term for this method.
 Partial decoding is another name for this process.
 It lowers the cost of encoding and circuitry, but it has the disadvantage of
requiring multiple addresses (shadow addresses).
 The addressing of RAM using the linear encoding technique is seen in Figure
10. After inversion, A is a line attached to the chip select signal of the EPROM
and then to the chip select signal of the RAM. As a result, EPROM is selected
when the status of A line is “empty,” and RAM is selected when the status of
the A15 line is “one.” Since the other address lines aren’t used to generate
chip pick signals, their status isn’t taken into account.
PROBLEM

 An 8051 based system requires external memory of four 4 kbytes of


SRAM each and two chips of EPROM of size 2 kbytes. The EPROM starts
at address 2000H. SRAM address map follows EPROM map. Give the
complete interface.
IO INTERFACING IN 8051

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