Digital Fundamentals

Eleventh Edition

Floyd

Functions of Combinational
Logic-II

Chapter 6
Decoders
A decoder is a logic circuit that detects the presence of a
specific combination of bits at its input. Two simple
decoders that detect the presence of the binary code 0011
are shown. The first has an active HIGH output; the
second has an active LOW output.

A0 A0
A1 X A1 X

A2 A2

A3 A3

Active HIGH decoder for 0011 Active LOW decoder for 0011
Decoders

Question Assume the output of the decoder shown is a

logic 1. What are the inputs to the decoder?

A0 = 0
A1 = 1
1
A2 = 0
A3 = 1
Decoders
IC decoders have multiple outputs to decode any
combination of inputs. For example the binary-to-decimal
decoder shown here has 16 outputs – one for each
combination of binary inputs.
Question
Bin/Dec
0 1
For the input shown, 1 1
1
2
what is the output? 3
4
1
1
1 A0 5 1
6 1
4-bit binary 1 A1 7 1 Decimal
input 0 A2 8 1 outputs
9 1
1 A3 10 1
11 0
12 1
13 1
14 1
15 1
Decoders
Decoders

X/Y
0
A specific integrated circuit decoder is 1
2
the 74HC154 (shown as a 4-to-16 3
4
decoder). It includes two active LOW A0
5
1 6
A1
chip select lines which must be at the A2
2
4
7
8
A3 8 9
active level to enable the outputs. 10
11
These lines can be used to expand the 12
13

decoder to larger inputs. CS1

14
& 15
CS2 EN
74HC154
Decoders
BCD-to-decimal decoders accept a binary BCD/DEC (1)
coded decimal input and activate one of 0
(2)
1
ten possible decimal digit indications. 2
(3)
(15) (4)
A0 1 3
Example A1 (14) 2 4
(5)
A2 (13) 4 5
(6)
Assume the inputs to the A3
(12)
8 6
(7)
(9)
74HC42 decoder are the 7
(10)
sequence 0101, 0110, 0011, and 8
(11)
9
0010. Describe the output.
74HC42
Solution
All lines are HIGH except for one active
output, which is LOW. The active outputs are
5, 6, 3, and 2 in that order.
Decoders
BCD Decoder/Driver

Another useful decoder is the 74LS47. This is a BCD-to-

seven segment display with active LOW outputs.
VCC

(16)
The a-g outputs are BCD/7-seg
(4)
designed for much higher BI/RBO
(13)
BI/RBO
(7) a
current than most devices (1)
1
b
(12)
(hence the word driver in BCD
inputs
(2)
2
4
c
(11)
Outputs
(10) to seven
the name). (6)
8
d
(9) segment
e
(3) (15) device
LT LT f
(5) (14)
RBI RBI g

74LS47 (8)

GND
BCD Decoder/Driver

Here the 7447A is an connected to an LED seven segment

display. Notice the current limiting resistors, required to
prevent overdriving the LED display.
LT: lamp test
BI: blanking input
RBI: ripple blanking input
RBO: ripple blanking output +5.0 V
1.0 kW
+5.0 V
74LS47 16
R's = MAN72
BCD/7-seg
3 VCC 330 W 3, 9, 14
LT a 13 1 a
4
BI/RBO b 12 13 b
5 RBI 11 10
c c
6 A 10 8
d d
2 B e 9 7 e
BCD
input 1 C f 15 2 f
g 14 11 g
7
D
GND
8
BCD Decoder/Driver
The 74LS47 features leading zero suppression, which blanks
unnecessary leading zeros but keeps significant zeros as
illustrated here. The BI/RBO output is connected to the RBI
input of the next decoder.

0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0

RBI LT 8 4 2 1 RBI LT 8 4 2 1 RBI LT 8 4 2 1 RBI LT 8 4 2 1

74LS47 74LS47 74LS47 74LS47

g f e d c b a BI/RBO g f e d c b a BI/RBO g f e d c b a BI/RBO g f e d c b a BI/RBO

Blanked Blanked
Depending on the display type, current
limiting resistors may be required.
BCD Decoder/Driver
Trailing zero suppression blanks unnecessary trailing zeros
to the right of the decimal point as illustrated here. The RBI
input is connected to the BI/RBO output of the following
decoder.
0 1 0 1 0 1 1 1 0 0 0 0 0 0 0 0

RBI LT 8 4 2 1 RBI LT 8 4 2 1 RBI LT 8 4 2 1 RBI LT 8 4 2 1

74LS47 74LS47 74LS47 74LS47

g f e d c b a BI/RBO g f e d c b a BI/RBO g f e d c b a BI/RBO g f e d c b a BI/RBO

1 0 0

Blanked Blanked
Decimal
point
Encoders
An encoder accepts an active logic level on one of its
inputs and converts it to a coded output, such as BCD
or binary.
The decimal to BCD is an
A0
encoder with an input for each
of the ten decimal digits and
four outputs that represent the A1
BCD code for the active digit.
The basic logic diagram is A2
shown. There is no zero input
because the outputs are all A3
LOW when the input is zero.
Encoders

Example Show how the decimal-to-BCD encoder converts

the decimal number 3 into a BCD 0011.

Solution The top two OR gates have ones as indicated

with the red lines. Thus the output is 0011.
0
1 1 A0 = 1+3+5+7+9
2 0

1
3 1
A1 = 2+3+6+7

0
4 0 0
5
6 0 A2 = 4+5+6+7
0
7
0
8 0
A3 = 8+9
9 0
Encoders

A3 = 8+9 A0 = 1+3+5+7+9
A1 = 2+3+6+7
A2 = 4+5+6+7
Encoders
The 74HC147 is an example of an IC encoder. It is has ten
active-LOW inputs and converts the active input to an
active-LOW BCD output.

This device is offers VCC

additional flexibility in that
(16)
it is a priority encoder.
(11)
This means that if more (12)
1
2
than one input is active, the (13)
3 (9)
(1) 1
one with the highest order Decimal
4
2
(7)
BCD
(2) 5
decimal digit will be active. input
(3) 6
4 (6) output
(14)
(4) 8
7
(5)
8
(10) 9
(8)
The next slide shows an application …
GND
Encoders

R7 R8 R9
Keyboard
encoder
7 8 9

1
R4 R5 R6 2
3
1
4
5
2 BCD complement of
4
6 8 key press
4 5 6 7
8
9

R1 R2 R3

1 2 3

R0

0
The zero line is not needed by the
encoder, but may be used by other
circuits to detect a key press.
Code converters
There are various code converters that change one code to
another. Two examples are the four bit binary-to-Gray converter
and the Gray-to-binary converter.

Example Show the conversion of binary 0111 to Gray and back.

Solution 0 1 LSB
1 0
LSB
0 1
1 0

1 1 1 1

0 0
0 MSB 0 MSB
Binary-to-Gray Gray-to-Binary
Multiplexers
A multiplexer (MUX) selects one data line from two or more
input lines and routes data from the selected line to the output.
The particular data line that is selected is determined by the
select inputs.
MUX
Two select lines are 0
Data
shown here to choose any select
1

of the four data inputs. 0 Data

1 output
Data
2
inputs
3
Multiplexers
Multiplexers

Question
Which data line is selected
if S1S0 = 10?

MUX
Solution D2 0
Data
1
select

0 Data
1 output
Data
2
inputs
3
Multiplexers
Question

Solution
Demultiplexers
A demultiplexer (DEMUX) performs the opposite function
from a MUX. It switches data from one input line to two or
more data lines depending on the select inputs.

The 74LS138 was introduced

DEMUX
previously as a decoder but can Y
A0 0

also serve as a DEMUX. When Data Y

select A1 1

connected as a DEMUX, data is lines

A2
Y
2
Data
applied to one of the enable Y
3 outputs
inputs, and routed to the selected Y
G1 4

output line depending on the Enable Y

G2A
5

inputs Y
select variables. Note that the G2B 6

Y
outputs are active-LOW as 7

illustrated in the following 74LS138

example…
Demultiplexers
Parity Generators/Checkers
Parity is an error detection method that uses an extra bit
appended to a group of bits to force them to be either odd
or even. In even parity, the total number of ones is even;
in odd parity the total number of ones is odd.

Example The ASCII letter S is 1010011. Show the parity

bit for the letter S with odd and even parity.

Solution S with odd parity = 11010011

S with even parity = 01010011
Parity Generators/Checkers
The 74LS280 can be used to generate a parity bit or to
check an incoming data stream for even or odd parity.

Checker: The 74LS280 can test codes

with up to 9 bits. The even output will
normally be HIGH if the data lines have (8)
A
(9)
even parity; otherwise it will be LOW. B
(10)
Likewise, the odd output will normally be (11)
C
D (5) S Even
HIGH if the data lines have odd parity; Data (12)
E (6) S Odd
inputs
otherwise it will be LOW. (13)
F
(1)
G
(2)
H
(4)
Generator: To generate even parity, the I

parity bit is taken from the odd parity

output. To generate odd parity, the output 74LS280
is taken from the even parity output.
Selected Key Terms

Full-adder A digital circuit that adds two bits and an input

carry bit to produce a sum and an output carry.

Cascading Connecting two or more similar devices in a

manner that expands the capability of one device.

Ripple carry A method of binary addition in which the output

carry from each adder becomes the input carry of
the next higher order adder.

Look-ahead
A method of binary addition whereby carries from
carry
the preceding adder stages are anticipated, thus
eliminating carry propagation delays.
Selected Key Terms

Decoder A digital circuit that converts coded information into

a familiar or noncoded form.

Encoder A digital circuit that converts information into a

coded form.
Priority An encoder in which only the highest value input
encoder digit is encoded and any other active input is ignored.

Multiplexer A circuit that switches digital data from several input

(MUX) lines onto a single output line in a specified time
sequence.

Demultiplexer A circuit that switches digital data from one input line
(DEMUX) onto a several output lines in a specified time
sequence.