INTERRUPT
Interrupt :
INTERRUPTS
An interrupt is an event which informs the CPU that its service (action) is
needed. It causes the microprocessor to temporarily work on a different
task, and then later return to its previous task.
An interrupt is used to cause a temporary halt in the execution of program.
Microprocessor responds to the interrupt with an interrupt service
routine (ISR), which is short program or subroutine that instructs the
microprocessor on how to handle the interrupt.
The process generally starts from the I/O device
The process is asynchronous.
INTERRUPTS
An 8086 interrupts can come from any one of following the
three sources
i. External signal applied to the non-maskable (NMI) input pin
or to the interrupt (INTR) pin.
-> Hardware Interrupt
ii. Execution of the interrupt instruction, INT
-> Software Interrupt
iii. Error condition produced in the 8086 by the
execution of an instruction
Basic Procedure for Processing
Interrupts
When an interrupt is executed, the MPU:
Finishes executing its current instruction (if any).
Saves (PUSH) the flag register, IP and CS register in the stack.
Goes to a fixed memory location pointed with CS:IP in vector
table
Reads the address of the associated ISR.
Jumps to that address and executes the ISR.
Gets (POP) the flag register, CS:IP register from the stack.
Continues executing the previous job (if any).
Summary
8086 INTERRUPT CATEGORIES
i) Based on how interrupt request is received-
1. Hardware Interrupt:
When microprocessors receive interrupt signals through pins (hardware) of
microprocessor, they are known as Hardware Interrupts. They are – INTR, NMI etc.
2. Software interrupt:
Software Interrupts are those which are inserted in between the program which means
these are mnemonics of microprocessor. Instructions for these software is INT Type
number ( INT 0, INT 21H)
8086 INTERRUPT CATAGORIES
ii) Based on Vector address-
1. Vectored Interrupt:
Vectored Interrupts are those which have fixed vector address and after executing these,
program control is transferred to that address. Example: INT 0, INT 1 etc.
2. Non-vectored interrupt:
Non-Vectored Interrupts are those in which vector address is not predefined (need to
supply by interrupting device). The interrupting device gives the address of sub-routine
for these interrupts.
INTR is a non vectored interrupt i.e 8086 does not know where the branching address
locate.
8086 INTERRUPT CATAGORIES
iii)
1. Maskable Interrupt:
Maskable Interrupts are those which can be disabled or ignored by the microprocessor.
Whenever an external signal activates the INTR pin, the microprocessor will be
interrupted only if interrupts are enabled using set interrupt (STI) Flag instruction. That
is, INTR can be masked. INTR is a non vectored interrupt, which means, the 8086 does
not the ISR address.
2. Non-maskable interrupt:
Non-Maskable Interrupts are those which cannot be disabled or ignored by
microprocessor. Example: RESET.
In the 8086 there are a total of 256 interrupts (or interrupt types):
-INT 00H
-INT 01H
-……….
-INT FFH
If two or more interrupts occur at the same time, the highest priority
interrupt will be serviced first and then the next-higher-priority
interrupt will be serviced.
For every interrupt there must be a program associated with it .
This program is called Interrupt Service Routine (ISR)
It is also called an interrupt handler.
But where the interrupt handler.
-- In the Interrupt Vector Table (IVT)
The interrupt vector (or interrupt pointer) table is the link between an
interrupt type code and the procedure that has been designated to service
interrupts associated with that code. 8086 supports total 256 types i.e. 00H to
FFH. For each type it has to reserve four bytes i.e. double word.
INT 12H
Interrupt vector(type) number 18 (12H)
Physical Address= 18x4=72=48H
Or Physical address: 12H*4H= 48H
0048H-0049 contains IP of ISR
004AH-004BH contains CS of ISR
Type 0 interrupts: This interrupt is also known as the divide by zero
interrupt. For cases where the quotient becomes particularly large to be
placed / adjusted an error might occur.
Type 1 interrupts: This is also known as the single step interrupt. This
type of interrupt is primarily used for debugging purposes in assembly
language.
Type 2 interrupts: also known as the non-maskable NMI interrupts.
These type of interrupts are used for emergency scenarios such as power
failure, RAM failure.
Type 3 interrupts: These type of interrupts are also known as breakpoint
interrupts. When this interrupt occurs a program would execute up to its
break point.
Type 4 interrupts: Also known as overflow interrupts is generally existent
after an arithmetic operation was performed.
8259A Priority PIC
• The 8259A is a programmable
interrupt controller (PIC).
• It is designed to allow prioritizing and
handling of hardware interrupt requests
from peripheral devices
• It funnels the interrupt signals into a
single interrupt input on the processor
INTA SEQUENCE
