To secure a challenging position where I can effectively contribute my skills as an Engineer, acquiring competent Technical Skills.
TECHNICAL AREA OF INTERESTS
ASIC design, automation and Verification, Validation, Physical design, FPGA based system design, RTL Design, Physical design, Synthesis/STA, Low-power designs, Digital design.
TOOLS KNOWN
Cadence RTL compiler, SoC Encounter, ModelSim, Altera Quartus, Cadence NCSim, ICCR, Virtuoso, Synopsys-VCS, Xilinx, ngspice, microwind, Silvaco-TCAD, Psim, Tina-TI.
Embedded Pogramming IDE & tools - Keil, MPLAB, MATLAB.
LANGUAGES KNOWN
Verilog HDL, System Verilog, VHDL, PERL, TCL, C, C++ Basics.
Verification Methodologies: OVM, UVM
To secure a challenging position where I can effectively contribute my skills as an Engineer, acquiring competent Technical Skills.
TECHNICAL AREA OF INTERESTS
ASIC design, automation and Verification, Validation, Physical design, FPGA based system design, RTL Design, Physical design, Synthesis/STA, Low-power designs, Digital design.
TOOLS KNOWN
Cadence RTL compiler, SoC Encounter, ModelSim, Altera Quartus, Cadence NCSim, ICCR, Virtuoso, Synopsys-VCS, Xilinx, ngspice, microwind, Silvaco-TCAD, Psim, Tina-TI.
Embedded Pogramming IDE & tools - Keil, MPLAB, MATLAB.
LANGUAGES KNOWN
Verilog HDL, System Verilog, VHDL, PERL, TCL, C, C++ Basics.
Verification Methodologies: OVM, UVM
