Register of 80386
- 1. 1 EAX AH AX AL ACCUMULATOR EBX BH BX BL BASE INDEX ECX CH CX CL COUNT EDX DH DX DL DATA ESP SP STACK POINTER EBP BP BASE POINTER EDI DI DESTINATION INDEX ESI SI SOURCE INDEX 32 BIT NAMES 16 bit names 8 bit names Registers of 80386 Fig1:Registers of 80386 Registers of 80386Friday, August 22, 2014
- 2. 2 EIP IP ACCUMULATOR EFLAGS FLAGS FLAGS CS CODE DS DATA ES EXTRA SS STACK FS GS • FS and GS registers have no special names. Registers of 80386Friday, August 22, 2014
- 3. 3Registers of 80386Friday, August 22, 2014
- 4. Register Organization Eight 32 - bit general purpose registers which may be used as either 8 bit or 16 bit registers. A 32 - bit register known as an extended register, is represented by the register name with prefix E. Example : A 32 bit register corresponding to AX is EAX, similarly BX is EBX etc. The 16 bit registers BP, SP, SI and DI in 8086 are now available with their extended size of 32 bit and are names as EBP,ESP,ESI and EDI. 4Registers of 80386Friday, August 22, 2014
- 5. AX represents the lower 16 bit of the 32 bit register EAX. BP, SP, SI, DI represents the lower 16 bit of their 32 bit counterparts, and can be used as independent 16 bit registers. The six segment registers available in 80386 are CS, SS, DS, ES, FS and GS. The CS and SS are the code and the stack segment registers respectively, while DS, ES, FS, GS are 4 data segment registers. A 16 bit instruction pointer IP is available along with 32 bit counterpart EIP. 5Registers of 80386Friday, August 22, 2014
- 6. 6Registers of 80386Friday, August 22, 2014
- 7. 7 Flags 1. C (Carry) –It holds the carry after calculations. 2. P (Parity) –Parity is a logic 0 for odd parity and a logic 1 for even parity. Parity is a count of ones in a number expressed as even or odd. 3. A (Auxiliary carry) –Carry occurs bits positions 3 and 5 of the results. 4. Z (Zero) – The zero flag shows that the result of an arithmetic or logical operation is zero. When Z = 1, the result is zero. When Z = 0, the result was non-zero. 5. T (Trap) – Enables trapping through an on-chip debugging facility. Registers of 80386Friday, August 22, 2014
- 8. 8 Cont’d. . . 6. S (Sign) – The sign flag holds the arithmetic sign after an arithmetic or a logical operation. If S =1 the sign bit is set and the result is negative. If S = 0, the sign bit is not set and the result is positive. 7. I (Interrupt) – The interrupt flag controls the operations of the INTR(Interrupt request) input pint. If I =1, the INTR pin is enabled; if I =0, the INTR pin is disabled. 8. VM (virtual mode) – If this flag set, the 80386 enters the virtual mode within the protected mode. In this mode, if any privileged instruction is executed, an exception 13 is generated. Registers of 80386Friday, August 22, 2014
- 9. Cont’d. . . Registers of 80386 9 9. RF(resume) – The resume flag is used with debugging to control the resumption of execution after the next instruction. 10. NT (nested task) – The nested task flag is used to indicated that the current task is nested within another task in protected mode operation. This flag is when the task I nested by software. 11. IOPL (I/O Privilege level) – IOPL is used in protected mode operation to select the privilege level for I./O devices. IF the current privilege level is higher or more trusted than the IOPL, I/O executed without hindrance. If the IOPL is lower than the current privilege level, an interrupt occurs. Friday, August 22, 2014
- 10. 10Registers of 80386 S.N. Parameter 8086 80386 1 Number of Pins 40 132 2 Pin Nature DIP No DIP 3 Clock rate Supports 5,8 & 10Mhz 16 & 20 MHz 4 Operating Mode 2(viz. minimum & Maximum) 3(viz. real, protected & virtual) 5 Signal Category 3 2 6 Number of Registers 14, 16bit 16, 32 bit 7 Architecture(Processor) 16bit 32bit 8 Architecture Composition in unit 2 (viz. EU, BIU) 3(CPU,MMU & BCU) 9 Data Bus 16 bit 32 bit 10 Address Bus 20 bit 32 bit 11 Memory Access Up to 1 MB Up to 4 Gb 12 Power Consumption High Low 13 Cost High Low Friday, August 22, 2014