Dependencies
This document discusses different types of dependencies that can occur in programs: - Data dependencies occur when an instruction refers to data from a previous instruction. There are three types: true data dependencies where an instruction depends on a previous result; output dependencies where two instructions write to the same register; and anti-dependencies where an instruction depends on data that could be overwritten. - Control dependencies occur when the execution of one instruction depends on the outcome of another instruction, such as in an if-then statement. - Resource conflicts occur when two instructions need the same hardware resource at the same time, such as a functional unit or register, stalling execution even if the instructions do not have a data or control dependency.
![CONTINUE . . .
MOV r1,[mem]
MOV r3,r1
MOV r2,5
(Load r1 from memory)
(r3 = r1;)
(r2 = 5;)
The superscalar machine would execute the first and
third instructions in parallel, yet have to wait anyway for
the first instruction to finish before executing the second
This holds up MULTIPLE pipelines](https://image.slidesharecdn.com/cacaca-140303053553-phpapp01/85/Dependencies-7-320.jpg)
Dependencies
- 3. DEPENDENCIES o In this section we shall consider: Data Dependence. Control Dependence.
- 4. DATA DEPENDENCIES A data dependency is a situation in which a program statement (instruction) refers to the data of a preceding statement.
- 5. TYPES OF DATA DEPENDENCIES Three cases are exist… True Data Dependence (flow dependence – read after write) Output Dependence (write after write) Anti Dependence (write after read)
- 6. TRUE DATA DEPENDENCY True data dependency is where one instruction depends on the final outcome of a previous instruction. Also known as flow dependency or read after write dependency Consider the code: ADD r1,r2 (r1 =r1+r2;) MOV r3,r1 (r3 = r1;) Can fetch and decode second instruction in parallel with first Can NOT execute second instruction until first is finished
- 7. CONTINUE . . . MOV r1,[mem] MOV r3,r1 MOV r2,5 (Load r1 from memory) (r3 = r1;) (r2 = 5;) The superscalar machine would execute the first and third instructions in parallel, yet have to wait anyway for the first instruction to finish before executing the second This holds up MULTIPLE pipelines
- 8. OUTPUT DEPENDENCY This type of dependency occurs when two instructions both write a result. If an instruction depends on the intermediate result, problems could occur Also known as write-write dependency R3 = R3 + R5; (I1) R4 = R3 + 1; (I2) R3 = R5 + 1; (I3) R7 = R3 + R4; (I4) I2 depends on result of I1 and I4 depends on result of I3 – true data dependency If I3 completes before I1, result from I1 will be written lost – output (write-write) dependency
- 9. ANTIDEPENDENCY(WRITE AFTER READ) Called Antidependency because it is the exact opposite of data dependency Data dependency: instruction 2 depends on data from instruction 1 Antidependency: instruction 1 depends on data that could be destroyed by instruction 2
- 10. CONTROL DEPENDENCY S1. if (a == b) S2. a = a + b S3. b = a + b
- 11. RESOURCE CONFLICT Two or more instructions requiring access to the same resource at the same time -- e.g. functional units, registers, bus Similar to true data dependency, but it is possible to duplicate resources
- 12. COMPARISON OF TRUE DATA, PROCEDURAL, AND RESOURCE CONFLICT DEPENDENCIES